From e1ffceb078c6bc8a674077b29aee0926bbb54131 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Wed, 19 Aug 2015 15:19:47 +0200 Subject: [PATCH] ARM: imx53: qsrb: fix PMIC interrupt level The MC34708 PMIC interrupt level is active high, but was set to active low in the devicetree, probably as a result of a copy and paste error from the QSB board. This caused IRQ storms and led to the kernel disabling the PMIC interrupt. Signed-off-by: Lucas Stach Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53-qsrb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx53-qsrb.dts b/arch/arm/boot/dts/imx53-qsrb.dts index 66e47de5e826..96d7eede412e 100644 --- a/arch/arm/boot/dts/imx53-qsrb.dts +++ b/arch/arm/boot/dts/imx53-qsrb.dts @@ -36,7 +36,7 @@ pinctrl-0 = <&pinctrl_pmic>; reg = <0x08>; interrupt-parent = <&gpio5>; - interrupts = <23 0x8>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; regulators { sw1_reg: sw1a { regulator-name = "SW1"; -- 2.20.1