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ARM: tegra: Add high speed UARTs to Jetson TK1 device tree
2015-12-17
Bill Huang
clk: tegra: Read correct IDDQ register in PLL_SS registration
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2015-12-17
Bill Huang
clk: tegra: Fix WARN_ON in PLL_RE registration
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2015-12-17
Bill Huang
clk: tegra: Add Super Gen5 Logic
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2015-12-17
Bill Huang
clk: tegra: pll: Add logic for SS
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2015-12-17
Bill Huang
clk: tegra: pll: Add Set_default logic
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2015-12-17
Bill Huang
clk: tegra: pll: Adjust vco_min if SDM present
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2015-11-20
Bill Huang
clk: tegra: pll: Add code to handle if resets are supported...
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2015-11-20
Bill Huang
clk: tegra: pll: Change misc_reg count from 3 to 6
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2013-08-20
Bill Huang
ARM: tegra: configure power off for Dalmore
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2013-08-14
Bill Huang
mfd: palmas: Add power off control
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2012-09-14
Bill Huang
mfd: dt: tps65910: Add power off control
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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2012-09-14
Bill Huang
mfd: dt: tps6586x: Add power off control
Signed-off-by:
Bill Huang
<bilhuang@nvidia.com>
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