Documentation/devicetree/bindings/clock/zx296718-clk.txt

   1 Device Tree Clock bindings for ZTE zx296718
   2
   3 This binding uses the common clock binding[1].
   4
   5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
   6
   7 Required properties:
   8 - compatible : shall be one of the following:
   9         "zte,zx296718-topcrm":
  10                 zx296718 top clock selection, divider and gating
  11
  12         "zte,zx296718-lsp0crm" and
  13         "zte,zx296718-lsp1crm":
  14                 zx296718 device level clock selection and gating
  15
  16 - reg: Address and length of the register set
  17
  18 The clock consumer should specify the desired clock by having the clock
  19 ID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296718-clock.h
  20 for the full list of zx296718 clock IDs.
  21
  22
  23 topclk: topcrm@1461000 {
  24         compatible = "zte,zx296718-topcrm-clk";
  25         reg = <0x01461000 0x1000>;
  26         #clock-cells = <1>;
  27 };
  28
  29 usbphy0:usb-phy0 {
  30         compatible = "zte,zx296718-usb-phy";
  31         #phy-cells = <0>;
  32         clocks = <&topclk USB20_PHY_CLK>;
  33         clock-names = "phyclk";
  34         status = "okay";
  35 };