Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt

   1 * Axis ARTPEC-6 PCIe interface
   2
   3 This PCIe host controller is based on the Synopsys DesignWare PCIe IP
   4 and thus inherits all the common properties defined in designware-pcie.txt.
   5
   6 Required properties:
   7 - compatible: "axis,artpec6-pcie", "snps,dw-pcie"
   8 - reg: base addresses and lengths of the PCIe controller (DBI),
   9         the phy controller, and configuration address space.
  10 - reg-names: Must include the following entries:
  11         - "dbi"
  12         - "phy"
  13         - "config"
  14 - interrupts: A list of interrupt outputs of the controller. Must contain an
  15   entry for each entry in the interrupt-names property.
  16 - interrupt-names: Must include the following entries:
  17         - "msi": The interrupt that is asserted when an MSI is received
  18 - axis,syscon-pcie: A phandle pointing to the ARTPEC-6 system controller,
  19         used to enable and control the Synopsys IP.
  20
  21 Example:
  22
  23         pcie@f8050000 {
  24                 compatible = "axis,artpec6-pcie", "snps,dw-pcie";
  25                 reg = <0xf8050000 0x2000
  26                        0xf8040000 0x1000
  27                        0xc0000000 0x2000>;
  28                 reg-names = "dbi", "phy", "config";
  29                 #address-cells = <3>;
  30                 #size-cells = <2>;
  31                 device_type = "pci";
  32                           /* downstream I/O */
  33                 ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
  34                           /* non-prefetchable memory */
  35                           0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
  36                 num-lanes = <2>;
  37                 bus-range = <0x00 0xff>;
  38                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
  39                 interrupt-names = "msi";
  40                 #interrupt-cells = <1>;
  41                 interrupt-map-mask = <0 0 0 0x7>;
  42                 interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
  43                                 <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
  44                                 <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
  45                                 <0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
  46                 axis,syscon-pcie = <&syscon>;
  47         };