arch/arm/boot/dts/at91sam9g45.dtsi

   1 /*
   2  * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
   3  *                    applies to AT91SAM9G45, AT91SAM9M10,
   4  *                    AT91SAM9G46, AT91SAM9M11 SoC
   5  *
   6  *  Copyright (C) 2011 Atmel,
   7  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include <dt-bindings/dma/at91.h>
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/clock/at91.h>
  18
  19 / {
  20         model = "Atmel AT91SAM9G45 family SoC";
  21         compatible = "atmel,at91sam9g45";
  22         interrupt-parent = <&aic>;
  23
  24         aliases {
  25                 serial0 = &dbgu;
  26                 serial1 = &usart0;
  27                 serial2 = &usart1;
  28                 serial3 = &usart2;
  29                 serial4 = &usart3;
  30                 gpio0 = &pioA;
  31                 gpio1 = &pioB;
  32                 gpio2 = &pioC;
  33                 gpio3 = &pioD;
  34                 gpio4 = &pioE;
  35                 tcb0 = &tcb0;
  36                 tcb1 = &tcb1;
  37                 i2c0 = &i2c0;
  38                 i2c1 = &i2c1;
  39                 ssc0 = &ssc0;
  40                 ssc1 = &ssc1;
  41                 pwm0 = &pwm0;
  42         };
  43         cpus {
  44                 #address-cells = <0>;
  45                 #size-cells = <0>;
  46
  47                 cpu {
  48                         compatible = "arm,arm926ej-s";
  49                         device_type = "cpu";
  50                 };
  51         };
  52
  53         memory {
  54                 reg = <0x70000000 0x10000000>;
  55         };
  56
  57         clocks {
  58                 slow_xtal: slow_xtal {
  59                         compatible = "fixed-clock";
  60                         #clock-cells = <0>;
  61                         clock-frequency = <0>;
  62                 };
  63
  64                 main_xtal: main_xtal {
  65                         compatible = "fixed-clock";
  66                         #clock-cells = <0>;
  67                         clock-frequency = <0>;
  68                 };
  69
  70                 adc_op_clk: adc_op_clk{
  71                         compatible = "fixed-clock";
  72                         #clock-cells = <0>;
  73                         clock-frequency = <300000>;
  74                 };
  75         };
  76
  77         ahb {
  78                 compatible = "simple-bus";
  79                 #address-cells = <1>;
  80                 #size-cells = <1>;
  81                 ranges;
  82
  83                 apb {
  84                         compatible = "simple-bus";
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87                         ranges;
  88
  89                         aic: interrupt-controller@fffff000 {
  90                                 #interrupt-cells = <3>;
  91                                 compatible = "atmel,at91rm9200-aic";
  92                                 interrupt-controller;
  93                                 reg = <0xfffff000 0x200>;
  94                                 atmel,external-irqs = <31>;
  95                         };
  96
  97                         ramc0: ramc@ffffe400 {
  98                                 compatible = "atmel,at91sam9g45-ddramc";
  99                                 reg = <0xffffe400 0x200>;
 100                                 clocks = <&ddrck>;
 101                                 clock-names = "ddrck";
 102                         };
 103
 104                         ramc1: ramc@ffffe600 {
 105                                 compatible = "atmel,at91sam9g45-ddramc";
 106                                 reg = <0xffffe600 0x200>;
 107                                 clocks = <&ddrck>;
 108                                 clock-names = "ddrck";
 109                         };
 110
 111                         pmc: pmc@fffffc00 {
 112                                 compatible = "atmel,at91sam9g45-pmc";
 113                                 reg = <0xfffffc00 0x100>;
 114                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 115                                 interrupt-controller;
 116                                 #address-cells = <1>;
 117                                 #size-cells = <0>;
 118                                 #interrupt-cells = <1>;
 119
 120                                 main_osc: main_osc {
 121                                         compatible = "atmel,at91rm9200-clk-main-osc";
 122                                         #clock-cells = <0>;
 123                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 124                                         clocks = <&main_xtal>;
 125                                 };
 126
 127                                 main: mainck {
 128                                         compatible = "atmel,at91rm9200-clk-main";
 129                                         #clock-cells = <0>;
 130                                         clocks = <&main_osc>;
 131                                 };
 132
 133                                 plla: pllack {
 134                                         compatible = "atmel,at91rm9200-clk-pll";
 135                                         #clock-cells = <0>;
 136                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 137                                         clocks = <&main>;
 138                                         reg = <0>;
 139                                         atmel,clk-input-range = <2000000 32000000>;
 140                                         #atmel,pll-clk-output-range-cells = <4>;
 141                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0
 142                                                                        695000000 750000000 1 0
 143                                                                        645000000 700000000 2 0
 144                                                                        595000000 650000000 3 0
 145                                                                        545000000 600000000 0 1
 146                                                                        495000000 555000000 1 1
 147                                                                        445000000 500000000 2 1
 148                                                                        400000000 450000000 3 1>;
 149                                 };
 150
 151                                 plladiv: plladivck {
 152                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 153                                         #clock-cells = <0>;
 154                                         clocks = <&plla>;
 155                                 };
 156
 157                                 utmi: utmick {
 158                                         compatible = "atmel,at91sam9x5-clk-utmi";
 159                                         #clock-cells = <0>;
 160                                         interrupts-extended = <&pmc AT91_PMC_LOCKU>;
 161                                         clocks = <&main>;
 162                                 };
 163
 164                                 mck: masterck {
 165                                         compatible = "atmel,at91rm9200-clk-master";
 166                                         #clock-cells = <0>;
 167                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 168                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 169                                         atmel,clk-output-range = <0 133333333>;
 170                                         atmel,clk-divisors = <1 2 4 3>;
 171                                 };
 172
 173                                 usb: usbck {
 174                                         compatible = "atmel,at91sam9x5-clk-usb";
 175                                         #clock-cells = <0>;
 176                                         clocks = <&plladiv>, <&utmi>;
 177                                 };
 178
 179                                 prog: progck {
 180                                         compatible = "atmel,at91sam9g45-clk-programmable";
 181                                         #address-cells = <1>;
 182                                         #size-cells = <0>;
 183                                         interrupt-parent = <&pmc>;
 184                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 185
 186                                         prog0: prog0 {
 187                                                 #clock-cells = <0>;
 188                                                 reg = <0>;
 189                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 190                                         };
 191
 192                                         prog1: prog1 {
 193                                                 #clock-cells = <0>;
 194                                                 reg = <1>;
 195                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 196                                         };
 197                                 };
 198
 199                                 systemck {
 200                                         compatible = "atmel,at91rm9200-clk-system";
 201                                         #address-cells = <1>;
 202                                         #size-cells = <0>;
 203
 204                                         ddrck: ddrck {
 205                                                 #clock-cells = <0>;
 206                                                 reg = <2>;
 207                                                 clocks = <&mck>;
 208                                         };
 209
 210                                         uhpck: uhpck {
 211                                                 #clock-cells = <0>;
 212                                                 reg = <6>;
 213                                                 clocks = <&usb>;
 214                                         };
 215
 216                                         pck0: pck0 {
 217                                                 #clock-cells = <0>;
 218                                                 reg = <8>;
 219                                                 clocks = <&prog0>;
 220                                         };
 221
 222                                         pck1: pck1 {
 223                                                 #clock-cells = <0>;
 224                                                 reg = <9>;
 225                                                 clocks = <&prog1>;
 226                                         };
 227                                 };
 228
 229                                 periphck {
 230                                         compatible = "atmel,at91rm9200-clk-peripheral";
 231                                         #address-cells = <1>;
 232                                         #size-cells = <0>;
 233                                         clocks = <&mck>;
 234
 235                                         pioA_clk: pioA_clk {
 236                                                 #clock-cells = <0>;
 237                                                 reg = <2>;
 238                                         };
 239
 240                                         pioB_clk: pioB_clk {
 241                                                 #clock-cells = <0>;
 242                                                 reg = <3>;
 243                                         };
 244
 245                                         pioC_clk: pioC_clk {
 246                                                 #clock-cells = <0>;
 247                                                 reg = <4>;
 248                                         };
 249
 250                                         pioDE_clk: pioDE_clk {
 251                                                 #clock-cells = <0>;
 252                                                 reg = <5>;
 253                                         };
 254
 255                                         trng_clk: trng_clk {
 256                                                 #clock-cells = <0>;
 257                                                 reg = <6>;
 258                                         };
 259
 260                                         usart0_clk: usart0_clk {
 261                                                 #clock-cells = <0>;
 262                                                 reg = <7>;
 263                                         };
 264
 265                                         usart1_clk: usart1_clk {
 266                                                 #clock-cells = <0>;
 267                                                 reg = <8>;
 268                                         };
 269
 270                                         usart2_clk: usart2_clk {
 271                                                 #clock-cells = <0>;
 272                                                 reg = <9>;
 273                                         };
 274
 275                                         usart3_clk: usart3_clk {
 276                                                 #clock-cells = <0>;
 277                                                 reg = <10>;
 278                                         };
 279
 280                                         mci0_clk: mci0_clk {
 281                                                 #clock-cells = <0>;
 282                                                 reg = <11>;
 283                                         };
 284
 285                                         twi0_clk: twi0_clk {
 286                                                 #clock-cells = <0>;
 287                                                 reg = <12>;
 288                                         };
 289
 290                                         twi1_clk: twi1_clk {
 291                                                 #clock-cells = <0>;
 292                                                 reg = <13>;
 293                                         };
 294
 295                                         spi0_clk: spi0_clk {
 296                                                 #clock-cells = <0>;
 297                                                 reg = <14>;
 298                                         };
 299
 300                                         spi1_clk: spi1_clk {
 301                                                 #clock-cells = <0>;
 302                                                 reg = <15>;
 303                                         };
 304
 305                                         ssc0_clk: ssc0_clk {
 306                                                 #clock-cells = <0>;
 307                                                 reg = <16>;
 308                                         };
 309
 310                                         ssc1_clk: ssc1_clk {
 311                                                 #clock-cells = <0>;
 312                                                 reg = <17>;
 313                                         };
 314
 315                                         tcb0_clk: tcb0_clk {
 316                                                 #clock-cells = <0>;
 317                                                 reg = <18>;
 318                                         };
 319
 320                                         pwm_clk: pwm_clk {
 321                                                 #clock-cells = <0>;
 322                                                 reg = <19>;
 323                                         };
 324
 325                                         adc_clk: adc_clk {
 326                                                 #clock-cells = <0>;
 327                                                 reg = <20>;
 328                                         };
 329
 330                                         dma0_clk: dma0_clk {
 331                                                 #clock-cells = <0>;
 332                                                 reg = <21>;
 333                                         };
 334
 335                                         uhphs_clk: uhphs_clk {
 336                                                 #clock-cells = <0>;
 337                                                 reg = <22>;
 338                                         };
 339
 340                                         lcd_clk: lcd_clk {
 341                                                 #clock-cells = <0>;
 342                                                 reg = <23>;
 343                                         };
 344
 345                                         ac97_clk: ac97_clk {
 346                                                 #clock-cells = <0>;
 347                                                 reg = <24>;
 348                                         };
 349
 350                                         macb0_clk: macb0_clk {
 351                                                 #clock-cells = <0>;
 352                                                 reg = <25>;
 353                                         };
 354
 355                                         isi_clk: isi_clk {
 356                                                 #clock-cells = <0>;
 357                                                 reg = <26>;
 358                                         };
 359
 360                                         udphs_clk: udphs_clk {
 361                                                 #clock-cells = <0>;
 362                                                 reg = <27>;
 363                                         };
 364
 365                                         aestdessha_clk: aestdessha_clk {
 366                                                 #clock-cells = <0>;
 367                                                 reg = <28>;
 368                                         };
 369
 370                                         mci1_clk: mci1_clk {
 371                                                 #clock-cells = <0>;
 372                                                 reg = <29>;
 373                                         };
 374
 375                                         vdec_clk: vdec_clk {
 376                                                 #clock-cells = <0>;
 377                                                 reg = <30>;
 378                                         };
 379                                 };
 380                         };
 381
 382                         rstc@fffffd00 {
 383                                 compatible = "atmel,at91sam9g45-rstc";
 384                                 reg = <0xfffffd00 0x10>;
 385                         };
 386
 387                         pit: timer@fffffd30 {
 388                                 compatible = "atmel,at91sam9260-pit";
 389                                 reg = <0xfffffd30 0xf>;
 390                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 391                                 clocks = <&mck>;
 392                         };
 393
 394
 395                         shdwc@fffffd10 {
 396                                 compatible = "atmel,at91sam9rl-shdwc";
 397                                 reg = <0xfffffd10 0x10>;
 398                         };
 399
 400                         tcb0: timer@fff7c000 {
 401                                 compatible = "atmel,at91rm9200-tcb";
 402                                 reg = <0xfff7c000 0x100>;
 403                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
 404                                 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
 405                                 clock-names = "t0_clk", "t1_clk", "t2_clk";
 406                         };
 407
 408                         tcb1: timer@fffd4000 {
 409                                 compatible = "atmel,at91rm9200-tcb";
 410                                 reg = <0xfffd4000 0x100>;
 411                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
 412                                 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
 413                                 clock-names = "t0_clk", "t1_clk", "t2_clk";
 414                         };
 415
 416                         dma: dma-controller@ffffec00 {
 417                                 compatible = "atmel,at91sam9g45-dma";
 418                                 reg = <0xffffec00 0x200>;
 419                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 420                                 #dma-cells = <2>;
 421                                 clocks = <&dma0_clk>;
 422                                 clock-names = "dma_clk";
 423                         };
 424
 425                         pinctrl@fffff200 {
 426                                 #address-cells = <1>;
 427                                 #size-cells = <1>;
 428                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 429                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 430
 431                                 atmel,mux-mask = <
 432                                       /*    A         B     */
 433                                        0xffffffff 0xffc003ff  /* pioA */
 434                                        0xffffffff 0x800f8f00  /* pioB */
 435                                        0xffffffff 0x00000e00  /* pioC */
 436                                        0xffffffff 0xff0c1381  /* pioD */
 437                                        0xffffffff 0x81ffff81  /* pioE */
 438                                       >;
 439
 440                                 /* shared pinctrl settings */
 441                                 adc0 {
 442                                         pinctrl_adc0_adtrg: adc0_adtrg {
 443                                                 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 444                                         };
 445                                         pinctrl_adc0_ad0: adc0_ad0 {
 446                                                 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 447                                         };
 448                                         pinctrl_adc0_ad1: adc0_ad1 {
 449                                                 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 450                                         };
 451                                         pinctrl_adc0_ad2: adc0_ad2 {
 452                                                 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 453                                         };
 454                                         pinctrl_adc0_ad3: adc0_ad3 {
 455                                                 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 456                                         };
 457                                         pinctrl_adc0_ad4: adc0_ad4 {
 458                                                 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 459                                         };
 460                                         pinctrl_adc0_ad5: adc0_ad5 {
 461                                                 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 462                                         };
 463                                         pinctrl_adc0_ad6: adc0_ad6 {
 464                                                 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 465                                         };
 466                                         pinctrl_adc0_ad7: adc0_ad7 {
 467                                                 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 468                                         };
 469                                 };
 470
 471                                 dbgu {
 472                                         pinctrl_dbgu: dbgu-0 {
 473                                                 atmel,pins =
 474                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A */
 475                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
 476                                         };
 477                                 };
 478
 479                                 i2c0 {
 480                                         pinctrl_i2c0: i2c0-0 {
 481                                                 atmel,pins =
 482                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA21 periph A TWCK0 */
 483                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
 484                                         };
 485                                 };
 486
 487                                 i2c1 {
 488                                         pinctrl_i2c1: i2c1-0 {
 489                                                 atmel,pins =
 490                                                         <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A TWCK1 */
 491                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
 492                                         };
 493                                 };
 494
 495                                 isi {
 496                                         pinctrl_isi: isi-0 {
 497                                                 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
 498                                                               AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* D9 */
 499                                                               AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
 500                                                               AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* D11 */
 501                                                               AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
 502                                                               AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
 503                                                               AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
 504                                                               AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
 505                                                               AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
 506                                                               AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
 507                                                               AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
 508                                                               AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
 509                                                               AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
 510                                                               AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
 511                                                               AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* HSYNC */
 512                                                               AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* MCK */>;
 513                                         };
 514                                 };
 515
 516                                 usart0 {
 517                                         pinctrl_usart0: usart0-0 {
 518                                                 atmel,pins =
 519                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A with pullup */
 520                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
 521                                         };
 522
 523                                         pinctrl_usart0_rts: usart0_rts-0 {
 524                                                 atmel,pins =
 525                                                         <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
 526                                         };
 527
 528                                         pinctrl_usart0_cts: usart0_cts-0 {
 529                                                 atmel,pins =
 530                                                         <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
 531                                         };
 532                                 };
 533
 534                                 uart1 {
 535                                         pinctrl_usart1: usart1-0 {
 536                                                 atmel,pins =
 537                                                         <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
 538                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB5 periph A */
 539                                         };
 540
 541                                         pinctrl_usart1_rts: usart1_rts-0 {
 542                                                 atmel,pins =
 543                                                         <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
 544                                         };
 545
 546                                         pinctrl_usart1_cts: usart1_cts-0 {
 547                                                 atmel,pins =
 548                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
 549                                         };
 550                                 };
 551
 552                                 usart2 {
 553                                         pinctrl_usart2: usart2-0 {
 554                                                 atmel,pins =
 555                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
 556                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB7 periph A */
 557                                         };
 558
 559                                         pinctrl_usart2_rts: usart2_rts-0 {
 560                                                 atmel,pins =
 561                                                         <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PC9 periph B */
 562                                         };
 563
 564                                         pinctrl_usart2_cts: usart2_cts-0 {
 565                                                 atmel,pins =
 566                                                         <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
 567                                         };
 568                                 };
 569
 570                                 usart3 {
 571                                         pinctrl_usart3: usart3-0 {
 572                                                 atmel,pins =
 573                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
 574                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB8 periph A */
 575                                         };
 576
 577                                         pinctrl_usart3_rts: usart3_rts-0 {
 578                                                 atmel,pins =
 579                                                         <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
 580                                         };
 581
 582                                         pinctrl_usart3_cts: usart3_cts-0 {
 583                                                 atmel,pins =
 584                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
 585                                         };
 586                                 };
 587
 588                                 nand {
 589                                         pinctrl_nand: nand-0 {
 590                                                 atmel,pins =
 591                                                         <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PC8 gpio RDY pin pull_up*/
 592                                                          AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PC14 gpio enable pin pull_up */
 593                                         };
 594                                 };
 595
 596                                 macb {
 597                                         pinctrl_macb_rmii: macb_rmii-0 {
 598                                                 atmel,pins =
 599                                                         <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA10 periph A */
 600                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A */
 601                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
 602                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
 603                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
 604                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
 605                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA16 periph A */
 606                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 607                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA18 periph A */
 608                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
 609                                         };
 610
 611                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 612                                                 atmel,pins =
 613                                                         <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA6 periph B */
 614                                                          AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA7 periph B */
 615                                                          AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA8 periph B */
 616                                                          AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA9 periph B */
 617                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 618                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 619                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA29 periph B */
 620                                                          AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
 621                                         };
 622                                 };
 623
 624                                 mmc0 {
 625                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 626                                                 atmel,pins =
 627                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A */
 628                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 629                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA2 periph A with pullup */
 630                                         };
 631
 632                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 633                                                 atmel,pins =
 634                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
 635                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
 636                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA5 periph A with pullup */
 637                                         };
 638
 639                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 640                                                 atmel,pins =
 641                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
 642                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 643                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
 644                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA9 periph A with pullup */
 645                                         };
 646                                 };
 647
 648                                 mmc1 {
 649                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 650                                                 atmel,pins =
 651                                                         <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA31 periph A */
 652                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA22 periph A with pullup */
 653                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA23 periph A with pullup */
 654                                         };
 655
 656                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 657                                                 atmel,pins =
 658                                                         <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA24 periph A with pullup */
 659                                                          AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA25 periph A with pullup */
 660                                                          AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA26 periph A with pullup */
 661                                         };
 662
 663                                         pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
 664                                                 atmel,pins =
 665                                                         <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA27 periph A with pullup */
 666                                                          AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA28 periph A with pullup */
 667                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA29 periph A with pullup */
 668                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA30 periph A with pullup */
 669                                         };
 670                                 };
 671
 672                                 ssc0 {
 673                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 674                                                 atmel,pins =
 675                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A */
 676                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A */
 677                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD2 periph A */
 678                                         };
 679
 680                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 681                                                 atmel,pins =
 682                                                         <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A */
 683                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD4 periph A */
 684                                                          AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD5 periph A */
 685                                         };
 686                                 };
 687
 688                                 ssc1 {
 689                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 690                                                 atmel,pins =
 691                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A */
 692                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A */
 693                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
 694                                         };
 695
 696                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 697                                                 atmel,pins =
 698                                                         <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD13 periph A */
 699                                                          AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A */
 700                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
 701                                         };
 702                                 };
 703
 704                                 spi0 {
 705                                         pinctrl_spi0: spi0-0 {
 706                                                 atmel,pins =
 707                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A SPI0_MISO pin */
 708                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A SPI0_MOSI pin */
 709                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A SPI0_SPCK pin */
 710                                         };
 711                                 };
 712
 713                                 spi1 {
 714                                         pinctrl_spi1: spi1-0 {
 715                                                 atmel,pins =
 716                                                         <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A SPI1_MISO pin */
 717                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A SPI1_MOSI pin */
 718                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
 719                                         };
 720                                 };
 721
 722                                 tcb0 {
 723                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 724                                                 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 725                                         };
 726
 727                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 728                                                 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 729                                         };
 730
 731                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 732                                                 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 733                                         };
 734
 735                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 736                                                 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 737                                         };
 738
 739                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 740                                                 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 741                                         };
 742
 743                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 744                                                 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 745                                         };
 746
 747                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 748                                                 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 749                                         };
 750
 751                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 752                                                 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 753                                         };
 754
 755                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 756                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 757                                         };
 758                                 };
 759
 760                                 tcb1 {
 761                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 762                                                 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 763                                         };
 764
 765                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 766                                                 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 767                                         };
 768
 769                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 770                                                 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 771                                         };
 772
 773                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 774                                                 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 775                                         };
 776
 777                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 778                                                 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 779                                         };
 780
 781                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 782                                                 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 783                                         };
 784
 785                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 786                                                 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 787                                         };
 788
 789                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 790                                                 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 791                                         };
 792
 793                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 794                                                 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 795                                         };
 796                                 };
 797
 798                                 fb {
 799                                         pinctrl_fb: fb-0 {
 800                                                 atmel,pins =
 801                                                         <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE0 periph A */
 802                                                          AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE2 periph A */
 803                                                          AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE3 periph A */
 804                                                          AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE4 periph A */
 805                                                          AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE5 periph A */
 806                                                          AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE6 periph A */
 807                                                          AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE7 periph A */
 808                                                          AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE8 periph A */
 809                                                          AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE9 periph A */
 810                                                          AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE10 periph A */
 811                                                          AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE11 periph A */
 812                                                          AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE12 periph A */
 813                                                          AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE13 periph A */
 814                                                          AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE14 periph A */
 815                                                          AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE15 periph A */
 816                                                          AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE16 periph A */
 817                                                          AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE17 periph A */
 818                                                          AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE18 periph A */
 819                                                          AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE19 periph A */
 820                                                          AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE20 periph A */
 821                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
 822                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE22 periph A */
 823                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
 824                                                          AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
 825                                                          AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
 826                                                          AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
 827                                                          AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
 828                                                          AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
 829                                                          AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
 830                                                          AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
 831                                         };
 832                                 };
 833
 834                                 pioA: gpio@fffff200 {
 835                                         compatible = "atmel,at91rm9200-gpio";
 836                                         reg = <0xfffff200 0x200>;
 837                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 838                                         #gpio-cells = <2>;
 839                                         gpio-controller;
 840                                         interrupt-controller;
 841                                         #interrupt-cells = <2>;
 842                                         clocks = <&pioA_clk>;
 843                                 };
 844
 845                                 pioB: gpio@fffff400 {
 846                                         compatible = "atmel,at91rm9200-gpio";
 847                                         reg = <0xfffff400 0x200>;
 848                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 849                                         #gpio-cells = <2>;
 850                                         gpio-controller;
 851                                         interrupt-controller;
 852                                         #interrupt-cells = <2>;
 853                                         clocks = <&pioB_clk>;
 854                                 };
 855
 856                                 pioC: gpio@fffff600 {
 857                                         compatible = "atmel,at91rm9200-gpio";
 858                                         reg = <0xfffff600 0x200>;
 859                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 860                                         #gpio-cells = <2>;
 861                                         gpio-controller;
 862                                         interrupt-controller;
 863                                         #interrupt-cells = <2>;
 864                                         clocks = <&pioC_clk>;
 865                                 };
 866
 867                                 pioD: gpio@fffff800 {
 868                                         compatible = "atmel,at91rm9200-gpio";
 869                                         reg = <0xfffff800 0x200>;
 870                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 871                                         #gpio-cells = <2>;
 872                                         gpio-controller;
 873                                         interrupt-controller;
 874                                         #interrupt-cells = <2>;
 875                                         clocks = <&pioDE_clk>;
 876                                 };
 877
 878                                 pioE: gpio@fffffa00 {
 879                                         compatible = "atmel,at91rm9200-gpio";
 880                                         reg = <0xfffffa00 0x200>;
 881                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 882                                         #gpio-cells = <2>;
 883                                         gpio-controller;
 884                                         interrupt-controller;
 885                                         #interrupt-cells = <2>;
 886                                         clocks = <&pioDE_clk>;
 887                                 };
 888                         };
 889
 890                         dbgu: serial@ffffee00 {
 891                                 compatible = "atmel,at91sam9260-usart";
 892                                 reg = <0xffffee00 0x200>;
 893                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 894                                 pinctrl-names = "default";
 895                                 pinctrl-0 = <&pinctrl_dbgu>;
 896                                 clocks = <&mck>;
 897                                 clock-names = "usart";
 898                                 status = "disabled";
 899                         };
 900
 901                         usart0: serial@fff8c000 {
 902                                 compatible = "atmel,at91sam9260-usart";
 903                                 reg = <0xfff8c000 0x200>;
 904                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 905                                 atmel,use-dma-rx;
 906                                 atmel,use-dma-tx;
 907                                 pinctrl-names = "default";
 908                                 pinctrl-0 = <&pinctrl_usart0>;
 909                                 clocks = <&usart0_clk>;
 910                                 clock-names = "usart";
 911                                 status = "disabled";
 912                         };
 913
 914                         usart1: serial@fff90000 {
 915                                 compatible = "atmel,at91sam9260-usart";
 916                                 reg = <0xfff90000 0x200>;
 917                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 918                                 atmel,use-dma-rx;
 919                                 atmel,use-dma-tx;
 920                                 pinctrl-names = "default";
 921                                 pinctrl-0 = <&pinctrl_usart1>;
 922                                 clocks = <&usart1_clk>;
 923                                 clock-names = "usart";
 924                                 status = "disabled";
 925                         };
 926
 927                         usart2: serial@fff94000 {
 928                                 compatible = "atmel,at91sam9260-usart";
 929                                 reg = <0xfff94000 0x200>;
 930                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 931                                 atmel,use-dma-rx;
 932                                 atmel,use-dma-tx;
 933                                 pinctrl-names = "default";
 934                                 pinctrl-0 = <&pinctrl_usart2>;
 935                                 clocks = <&usart2_clk>;
 936                                 clock-names = "usart";
 937                                 status = "disabled";
 938                         };
 939
 940                         usart3: serial@fff98000 {
 941                                 compatible = "atmel,at91sam9260-usart";
 942                                 reg = <0xfff98000 0x200>;
 943                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
 944                                 atmel,use-dma-rx;
 945                                 atmel,use-dma-tx;
 946                                 pinctrl-names = "default";
 947                                 pinctrl-0 = <&pinctrl_usart3>;
 948                                 clocks = <&usart3_clk>;
 949                                 clock-names = "usart";
 950                                 status = "disabled";
 951                         };
 952
 953                         macb0: ethernet@fffbc000 {
 954                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 955                                 reg = <0xfffbc000 0x100>;
 956                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
 957                                 pinctrl-names = "default";
 958                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 959                                 clocks = <&macb0_clk>, <&macb0_clk>;
 960                                 clock-names = "hclk", "pclk";
 961                                 status = "disabled";
 962                         };
 963
 964                         trng@fffcc000 {
 965                                 compatible = "atmel,at91sam9g45-trng";
 966                                 reg = <0xfffcc000 0x4000>;
 967                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
 968                                 clocks = <&trng_clk>;
 969                         };
 970
 971                         i2c0: i2c@fff84000 {
 972                                 compatible = "atmel,at91sam9g10-i2c";
 973                                 reg = <0xfff84000 0x100>;
 974                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
 975                                 pinctrl-names = "default";
 976                                 pinctrl-0 = <&pinctrl_i2c0>;
 977                                 #address-cells = <1>;
 978                                 #size-cells = <0>;
 979                                 clocks = <&twi0_clk>;
 980                                 status = "disabled";
 981                         };
 982
 983                         i2c1: i2c@fff88000 {
 984                                 compatible = "atmel,at91sam9g10-i2c";
 985                                 reg = <0xfff88000 0x100>;
 986                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
 987                                 pinctrl-names = "default";
 988                                 pinctrl-0 = <&pinctrl_i2c1>;
 989                                 #address-cells = <1>;
 990                                 #size-cells = <0>;
 991                                 clocks = <&twi1_clk>;
 992                                 status = "disabled";
 993                         };
 994
 995                         ssc0: ssc@fff9c000 {
 996                                 compatible = "atmel,at91sam9g45-ssc";
 997                                 reg = <0xfff9c000 0x4000>;
 998                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 999                                 pinctrl-names = "default";
1000                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
1001                                 clocks = <&ssc0_clk>;
1002                                 clock-names = "pclk";
1003                                 status = "disabled";
1004                         };
1005
1006                         ssc1: ssc@fffa0000 {
1007                                 compatible = "atmel,at91sam9g45-ssc";
1008                                 reg = <0xfffa0000 0x4000>;
1009                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
1010                                 pinctrl-names = "default";
1011                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1012                                 clocks = <&ssc1_clk>;
1013                                 clock-names = "pclk";
1014                                 status = "disabled";
1015                         };
1016
1017                         adc0: adc@fffb0000 {
1018                                 #address-cells = <1>;
1019                                 #size-cells = <0>;
1020                                 compatible = "atmel,at91sam9g45-adc";
1021                                 reg = <0xfffb0000 0x100>;
1022                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
1023                                 clocks = <&adc_clk>, <&adc_op_clk>;
1024                                 clock-names = "adc_clk", "adc_op_clk";
1025                                 atmel,adc-channels-used = <0xff>;
1026                                 atmel,adc-vref = <3300>;
1027                                 atmel,adc-startup-time = <40>;
1028                                 atmel,adc-res = <8 10>;
1029                                 atmel,adc-res-names = "lowres", "highres";
1030                                 atmel,adc-use-res = "highres";
1031
1032                                 trigger@0 {
1033                                         reg = <0>;
1034                                         trigger-name = "external-rising";
1035                                         trigger-value = <0x1>;
1036                                         trigger-external;
1037                                 };
1038                                 trigger@1 {
1039                                         reg = <1>;
1040                                         trigger-name = "external-falling";
1041                                         trigger-value = <0x2>;
1042                                         trigger-external;
1043                                 };
1044
1045                                 trigger@2 {
1046                                         reg = <2>;
1047                                         trigger-name = "external-any";
1048                                         trigger-value = <0x3>;
1049                                         trigger-external;
1050                                 };
1051
1052                                 trigger@3 {
1053                                         reg = <3>;
1054                                         trigger-name = "continuous";
1055                                         trigger-value = <0x6>;
1056                                 };
1057                         };
1058
1059                         isi@fffb4000 {
1060                                 compatible = "atmel,at91sam9g45-isi";
1061                                 reg = <0xfffb4000 0x4000>;
1062                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
1063                                 clocks = <&isi_clk>;
1064                                 clock-names = "isi_clk";
1065                                 pinctrl-names = "default";
1066                                 pinctrl-0 = <&pinctrl_isi>;
1067                                 status = "disabled";
1068                         };
1069
1070                         pwm0: pwm@fffb8000 {
1071                                 compatible = "atmel,at91sam9rl-pwm";
1072                                 reg = <0xfffb8000 0x300>;
1073                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1074                                 #pwm-cells = <3>;
1075                                 clocks = <&pwm_clk>;
1076                                 status = "disabled";
1077                         };
1078
1079                         mmc0: mmc@fff80000 {
1080                                 compatible = "atmel,hsmci";
1081                                 reg = <0xfff80000 0x600>;
1082                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1083                                 pinctrl-names = "default";
1084                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
1085                                 dma-names = "rxtx";
1086                                 #address-cells = <1>;
1087                                 #size-cells = <0>;
1088                                 clocks = <&mci0_clk>;
1089                                 clock-names = "mci_clk";
1090                                 status = "disabled";
1091                         };
1092
1093                         mmc1: mmc@fffd0000 {
1094                                 compatible = "atmel,hsmci";
1095                                 reg = <0xfffd0000 0x600>;
1096                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
1097                                 pinctrl-names = "default";
1098                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
1099                                 dma-names = "rxtx";
1100                                 #address-cells = <1>;
1101                                 #size-cells = <0>;
1102                                 clocks = <&mci1_clk>;
1103                                 clock-names = "mci_clk";
1104                                 status = "disabled";
1105                         };
1106
1107                         watchdog@fffffd40 {
1108                                 compatible = "atmel,at91sam9260-wdt";
1109                                 reg = <0xfffffd40 0x10>;
1110                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1111                                 atmel,watchdog-type = "hardware";
1112                                 atmel,reset-type = "all";
1113                                 atmel,dbg-halt;
1114                                 atmel,idle-halt;
1115                                 status = "disabled";
1116                         };
1117
1118                         spi0: spi@fffa4000 {
1119                                 #address-cells = <1>;
1120                                 #size-cells = <0>;
1121                                 compatible = "atmel,at91rm9200-spi";
1122                                 reg = <0xfffa4000 0x200>;
1123                                 interrupts = <14 4 3>;
1124                                 pinctrl-names = "default";
1125                                 pinctrl-0 = <&pinctrl_spi0>;
1126                                 clocks = <&spi0_clk>;
1127                                 clock-names = "spi_clk";
1128                                 status = "disabled";
1129                         };
1130
1131                         spi1: spi@fffa8000 {
1132                                 #address-cells = <1>;
1133                                 #size-cells = <0>;
1134                                 compatible = "atmel,at91rm9200-spi";
1135                                 reg = <0xfffa8000 0x200>;
1136                                 interrupts = <15 4 3>;
1137                                 pinctrl-names = "default";
1138                                 pinctrl-0 = <&pinctrl_spi1>;
1139                                 clocks = <&spi1_clk>;
1140                                 clock-names = "spi_clk";
1141                                 status = "disabled";
1142                         };
1143
1144                         usb2: gadget@fff78000 {
1145                                 #address-cells = <1>;
1146                                 #size-cells = <0>;
1147                                 compatible = "atmel,at91sam9rl-udc";
1148                                 reg = <0x00600000 0x80000
1149                                        0xfff78000 0x400>;
1150                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
1151                                 clocks = <&udphs_clk>, <&utmi>;
1152                                 clock-names = "pclk", "hclk";
1153                                 status = "disabled";
1154
1155                                 ep0 {
1156                                         reg = <0>;
1157                                         atmel,fifo-size = <64>;
1158                                         atmel,nb-banks = <1>;
1159                                 };
1160
1161                                 ep1 {
1162                                         reg = <1>;
1163                                         atmel,fifo-size = <1024>;
1164                                         atmel,nb-banks = <2>;
1165                                         atmel,can-dma;
1166                                         atmel,can-isoc;
1167                                 };
1168
1169                                 ep2 {
1170                                         reg = <2>;
1171                                         atmel,fifo-size = <1024>;
1172                                         atmel,nb-banks = <2>;
1173                                         atmel,can-dma;
1174                                         atmel,can-isoc;
1175                                 };
1176
1177                                 ep3 {
1178                                         reg = <3>;
1179                                         atmel,fifo-size = <1024>;
1180                                         atmel,nb-banks = <3>;
1181                                         atmel,can-dma;
1182                                 };
1183
1184                                 ep4 {
1185                                         reg = <4>;
1186                                         atmel,fifo-size = <1024>;
1187                                         atmel,nb-banks = <3>;
1188                                         atmel,can-dma;
1189                                 };
1190
1191                                 ep5 {
1192                                         reg = <5>;
1193                                         atmel,fifo-size = <1024>;
1194                                         atmel,nb-banks = <3>;
1195                                         atmel,can-dma;
1196                                         atmel,can-isoc;
1197                                 };
1198
1199                                 ep6 {
1200                                         reg = <6>;
1201                                         atmel,fifo-size = <1024>;
1202                                         atmel,nb-banks = <3>;
1203                                         atmel,can-dma;
1204                                         atmel,can-isoc;
1205                                 };
1206                         };
1207
1208                         sckc@fffffd50 {
1209                                 compatible = "atmel,at91sam9x5-sckc";
1210                                 reg = <0xfffffd50 0x4>;
1211
1212                                 slow_osc: slow_osc {
1213                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1214                                         #clock-cells = <0>;
1215                                         atmel,startup-time-usec = <1200000>;
1216                                         clocks = <&slow_xtal>;
1217                                 };
1218
1219                                 slow_rc_osc: slow_rc_osc {
1220                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1221                                         #clock-cells = <0>;
1222                                         atmel,startup-time-usec = <75>;
1223                                         clock-frequency = <32768>;
1224                                         clock-accuracy = <50000000>;
1225                                 };
1226
1227                                 clk32k: slck {
1228                                         compatible = "atmel,at91sam9x5-clk-slow";
1229                                         #clock-cells = <0>;
1230                                         clocks = <&slow_rc_osc &slow_osc>;
1231                                 };
1232                         };
1233
1234                         rtc@fffffd20 {
1235                                 compatible = "atmel,at91sam9260-rtt";
1236                                 reg = <0xfffffd20 0x10>;
1237                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1238                                 clocks = <&clk32k>;
1239                                 status = "disabled";
1240                         };
1241
1242                         rtc@fffffdb0 {
1243                                 compatible = "atmel,at91rm9200-rtc";
1244                                 reg = <0xfffffdb0 0x30>;
1245                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1246                                 status = "disabled";
1247                         };
1248
1249                         gpbr: syscon@fffffd60 {
1250                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
1251                                 reg = <0xfffffd60 0x10>;
1252                                 status = "disabled";
1253                         };
1254                 };
1255
1256                 fb0: fb@0x00500000 {
1257                         compatible = "atmel,at91sam9g45-lcdc";
1258                         reg = <0x00500000 0x1000>;
1259                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1260                         pinctrl-names = "default";
1261                         pinctrl-0 = <&pinctrl_fb>;
1262                         clocks = <&lcd_clk>, <&lcd_clk>;
1263                         clock-names = "hclk", "lcdc_clk";
1264                         status = "disabled";
1265                 };
1266
1267                 nand0: nand@40000000 {
1268                         compatible = "atmel,at91rm9200-nand";
1269                         #address-cells = <1>;
1270                         #size-cells = <1>;
1271                         reg = <0x40000000 0x10000000
1272                                0xffffe200 0x200
1273                               >;
1274                         atmel,nand-addr-offset = <21>;
1275                         atmel,nand-cmd-offset = <22>;
1276                         atmel,nand-has-dma;
1277                         pinctrl-names = "default";
1278                         pinctrl-0 = <&pinctrl_nand>;
1279                         gpios = <&pioC 8 GPIO_ACTIVE_HIGH
1280                                  &pioC 14 GPIO_ACTIVE_HIGH
1281                                  0
1282                                 >;
1283                         status = "disabled";
1284                 };
1285
1286                 usb0: ohci@00700000 {
1287                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1288                         reg = <0x00700000 0x100000>;
1289                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1290                         //TODO
1291                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1292                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1293                         status = "disabled";
1294                 };
1295
1296                 usb1: ehci@00800000 {
1297                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1298                         reg = <0x00800000 0x100000>;
1299                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1300                         //TODO
1301                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1302                         clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
1303                         status = "disabled";
1304                 };
1305         };
1306
1307         i2c@0 {
1308                 compatible = "i2c-gpio";
1309                 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1310                          &pioA 21 GPIO_ACTIVE_HIGH /* scl */
1311                         >;
1312                 i2c-gpio,sda-open-drain;
1313                 i2c-gpio,scl-open-drain;
1314                 i2c-gpio,delay-us = <5>;        /* ~100 kHz */
1315                 #address-cells = <1>;
1316                 #size-cells = <0>;
1317                 status = "disabled";
1318         };
1319 };