arch/arm/boot/dts/da850.dtsi

   1 /*
   2  * Copyright 2012 DENX Software Engineering GmbH
   3  * Heiko Schocher <hs@denx.de>
   4  *
   5  * This program is free software; you can redistribute  it and/or modify it
   6  * under  the terms of  the GNU General  Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10 #include "skeleton.dtsi"
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12
  13 / {
  14         arm {
  15                 #address-cells = <1>;
  16                 #size-cells = <1>;
  17                 ranges;
  18                 intc: interrupt-controller@fffee000 {
  19                         compatible = "ti,cp-intc";
  20                         interrupt-controller;
  21                         #interrupt-cells = <1>;
  22                         ti,intc-size = <101>;
  23                         reg = <0xfffee000 0x2000>;
  24                 };
  25         };
  26         soc@1c00000 {
  27                 compatible = "simple-bus";
  28                 model = "da850";
  29                 #address-cells = <1>;
  30                 #size-cells = <1>;
  31                 ranges = <0x0 0x01c00000 0x400000>;
  32                 interrupt-parent = <&intc>;
  33
  34                 pmx_core: pinmux@14120 {
  35                         compatible = "pinctrl-single";
  36                         reg = <0x14120 0x50>;
  37                         #address-cells = <1>;
  38                         #size-cells = <0>;
  39                         pinctrl-single,bit-per-mux;
  40                         pinctrl-single,register-width = <32>;
  41                         pinctrl-single,function-mask = <0xf>;
  42                         status = "disabled";
  43
  44                         serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
  45                                 pinctrl-single,bits = <
  46                                         /* UART0_RTS UART0_CTS */
  47                                         0x0c 0x22000000 0xff000000
  48                                 >;
  49                         };
  50                         serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
  51                                 pinctrl-single,bits = <
  52                                         /* UART0_TXD UART0_RXD */
  53                                         0x0c 0x00220000 0x00ff0000
  54                                 >;
  55                         };
  56                         serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
  57                                 pinctrl-single,bits = <
  58                                         /* UART1_CTS UART1_RTS */
  59                                         0x00 0x00440000 0x00ff0000
  60                                 >;
  61                         };
  62                         serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
  63                                 pinctrl-single,bits = <
  64                                         /* UART1_TXD UART1_RXD */
  65                                         0x10 0x22000000 0xff000000
  66                                 >;
  67                         };
  68                         serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
  69                                 pinctrl-single,bits = <
  70                                         /* UART2_CTS UART2_RTS */
  71                                         0x00 0x44000000 0xff000000
  72                                 >;
  73                         };
  74                         serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
  75                                 pinctrl-single,bits = <
  76                                         /* UART2_TXD UART2_RXD */
  77                                         0x10 0x00220000 0x00ff0000
  78                                 >;
  79                         };
  80                         i2c0_pins: pinmux_i2c0_pins {
  81                                 pinctrl-single,bits = <
  82                                         /* I2C0_SDA,I2C0_SCL */
  83                                         0x10 0x00002200 0x0000ff00
  84                                 >;
  85                         };
  86                         i2c1_pins: pinmux_i2c1_pins {
  87                                 pinctrl-single,bits = <
  88                                         /* I2C1_SDA, I2C1_SCL */
  89                                         0x10 0x00440000 0x00ff0000
  90                                 >;
  91                         };
  92                         mmc0_pins: pinmux_mmc_pins {
  93                                 pinctrl-single,bits = <
  94                                         /* MMCSD0_DAT[3] MMCSD0_DAT[2]
  95                                          * MMCSD0_DAT[1] MMCSD0_DAT[0]
  96                                          * MMCSD0_CMD    MMCSD0_CLK
  97                                          */
  98                                         0x28 0x00222222  0x00ffffff
  99                                 >;
 100                         };
 101                         ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
 102                                 pinctrl-single,bits = <
 103                                         /* EPWM0A */
 104                                         0xc 0x00000002 0x0000000f
 105                                 >;
 106                         };
 107                         ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
 108                                 pinctrl-single,bits = <
 109                                         /* EPWM0B */
 110                                         0xc 0x00000020 0x000000f0
 111                                 >;
 112                         };
 113                         ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
 114                                 pinctrl-single,bits = <
 115                                         /* EPWM1A */
 116                                         0x14 0x00000002 0x0000000f
 117                                 >;
 118                         };
 119                         ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
 120                                 pinctrl-single,bits = <
 121                                         /* EPWM1B */
 122                                         0x14 0x00000020 0x000000f0
 123                                 >;
 124                         };
 125                         ecap0_pins: pinmux_ecap0_pins {
 126                                 pinctrl-single,bits = <
 127                                         /* ECAP0_APWM0 */
 128                                         0x8 0x20000000 0xf0000000
 129                                 >;
 130                         };
 131                         ecap1_pins: pinmux_ecap1_pins {
 132                                 pinctrl-single,bits = <
 133                                         /* ECAP1_APWM1 */
 134                                         0x4 0x40000000 0xf0000000
 135                                 >;
 136                         };
 137                         ecap2_pins: pinmux_ecap2_pins {
 138                                 pinctrl-single,bits = <
 139                                         /* ECAP2_APWM2 */
 140                                         0x4 0x00000004 0x0000000f
 141                                 >;
 142                         };
 143                         spi0_pins: pinmux_spi0_pins {
 144                                 pinctrl-single,bits = <
 145                                         /* SIMO, SOMI, CLK */
 146                                         0xc 0x00001101 0x0000ff0f
 147                                 >;
 148                         };
 149                         spi0_cs0_pin: pinmux_spi0_cs0 {
 150                                 pinctrl-single,bits = <
 151                                         /* CS0 */
 152                                         0x10 0x00000010 0x000000f0
 153                                 >;
 154                         };
 155                         spi1_pins: pinmux_spi1_pins {
 156                                 pinctrl-single,bits = <
 157                                         /* SIMO, SOMI, CLK */
 158                                         0x14 0x00110100 0x00ff0f00
 159                                 >;
 160                         };
 161                         spi1_cs0_pin: pinmux_spi1_cs0 {
 162                                 pinctrl-single,bits = <
 163                                         /* CS0 */
 164                                         0x14 0x00000010 0x000000f0
 165                                 >;
 166                         };
 167                         mdio_pins: pinmux_mdio_pins {
 168                                 pinctrl-single,bits = <
 169                                         /* MDIO_CLK, MDIO_D */
 170                                         0x10 0x00000088 0x000000ff
 171                                 >;
 172                         };
 173                         mii_pins: pinmux_mii_pins {
 174                                 pinctrl-single,bits = <
 175                                         /*
 176                                          * MII_TXEN, MII_TXCLK, MII_COL
 177                                          * MII_TXD_3, MII_TXD_2, MII_TXD_1
 178                                          * MII_TXD_0
 179                                          */
 180                                         0x8 0x88888880 0xfffffff0
 181                                         /*
 182                                          * MII_RXER, MII_CRS, MII_RXCLK
 183                                          * MII_RXDV, MII_RXD_3, MII_RXD_2
 184                                          * MII_RXD_1, MII_RXD_0
 185                                          */
 186                                         0xc 0x88888888 0xffffffff
 187                                 >;
 188                         };
 189
 190                 };
 191                 edma0: edma@0 {
 192                         compatible = "ti,edma3-tpcc";
 193                         /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
 194                         reg =   <0x0 0x8000>;
 195                         reg-names = "edma3_cc";
 196                         interrupts = <11 12>;
 197                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 198                         #dma-cells = <2>;
 199
 200                         ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
 201                 };
 202                 edma0_tptc0: tptc@8000 {
 203                         compatible = "ti,edma3-tptc";
 204                         reg =   <0x8000 0x400>;
 205                         interrupts = <13>;
 206                         interrupt-names = "edm3_tcerrint";
 207                 };
 208                 edma0_tptc1: tptc@8400 {
 209                         compatible = "ti,edma3-tptc";
 210                         reg =   <0x8400 0x400>;
 211                         interrupts = <32>;
 212                         interrupt-names = "edm3_tcerrint";
 213                 };
 214                 edma1: edma@230000 {
 215                         compatible = "ti,edma3-tpcc";
 216                         /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
 217                         reg =   <0x230000 0x8000>;
 218                         reg-names = "edma3_cc";
 219                         interrupts = <93 94>;
 220                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 221                         #dma-cells = <2>;
 222
 223                         ti,tptcs = <&edma1_tptc0 7>;
 224                 };
 225                 edma1_tptc0: tptc@238000 {
 226                         compatible = "ti,edma3-tptc";
 227                         reg =   <0x238000 0x400>;
 228                         interrupts = <95>;
 229                         interrupt-names = "edm3_tcerrint";
 230                 };
 231                 serial0: serial@42000 {
 232                         compatible = "ns16550a";
 233                         reg = <0x42000 0x100>;
 234                         reg-shift = <2>;
 235                         interrupts = <25>;
 236                         status = "disabled";
 237                 };
 238                 serial1: serial@10c000 {
 239                         compatible = "ns16550a";
 240                         reg = <0x10c000 0x100>;
 241                         reg-shift = <2>;
 242                         interrupts = <53>;
 243                         status = "disabled";
 244                 };
 245                 serial2: serial@10d000 {
 246                         compatible = "ns16550a";
 247                         reg = <0x10d000 0x100>;
 248                         reg-shift = <2>;
 249                         interrupts = <61>;
 250                         status = "disabled";
 251                 };
 252                 rtc0: rtc@23000 {
 253                         compatible = "ti,da830-rtc";
 254                         reg = <0x23000 0x1000>;
 255                         interrupts = <19
 256                                       19>;
 257                         status = "disabled";
 258                 };
 259                 i2c0: i2c@22000 {
 260                         compatible = "ti,davinci-i2c";
 261                         reg = <0x22000 0x1000>;
 262                         interrupts = <15>;
 263                         #address-cells = <1>;
 264                         #size-cells = <0>;
 265                         status = "disabled";
 266                 };
 267                 i2c1: i2c@228000 {
 268                         compatible = "ti,davinci-i2c";
 269                         reg = <0x228000 0x1000>;
 270                         interrupts = <51>;
 271                         #address-cells = <1>;
 272                         #size-cells = <0>;
 273                         status = "disabled";
 274                 };
 275                 wdt: wdt@21000 {
 276                         compatible = "ti,davinci-wdt";
 277                         reg = <0x21000 0x1000>;
 278                         status = "disabled";
 279                 };
 280                 mmc0: mmc@40000 {
 281                         compatible = "ti,da830-mmc";
 282                         reg = <0x40000 0x1000>;
 283                         interrupts = <16>;
 284                         dmas = <&edma0 16 0>, <&edma0 17 0>;
 285                         dma-names = "rx", "tx";
 286                         status = "disabled";
 287                 };
 288                 mmc1: mmc@21b000 {
 289                         compatible = "ti,da830-mmc";
 290                         reg = <0x21b000 0x1000>;
 291                         interrupts = <72>;
 292                         dmas = <&edma1 28 0>, <&edma1 29 0>;
 293                         dma-names = "rx", "tx";
 294                         status = "disabled";
 295                 };
 296                 ehrpwm0: pwm@300000 {
 297                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 298                                      "ti,am33xx-ehrpwm";
 299                         #pwm-cells = <3>;
 300                         reg = <0x300000 0x2000>;
 301                         status = "disabled";
 302                 };
 303                 ehrpwm1: pwm@302000 {
 304                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 305                                      "ti,am33xx-ehrpwm";
 306                         #pwm-cells = <3>;
 307                         reg = <0x302000 0x2000>;
 308                         status = "disabled";
 309                 };
 310                 ecap0: ecap@306000 {
 311                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 312                                      "ti,am33xx-ecap";
 313                         #pwm-cells = <3>;
 314                         reg = <0x306000 0x80>;
 315                         status = "disabled";
 316                 };
 317                 ecap1: ecap@307000 {
 318                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 319                                      "ti,am33xx-ecap";
 320                         #pwm-cells = <3>;
 321                         reg = <0x307000 0x80>;
 322                         status = "disabled";
 323                 };
 324                 ecap2: ecap@308000 {
 325                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 326                                      "ti,am33xx-ecap";
 327                         #pwm-cells = <3>;
 328                         reg = <0x308000 0x80>;
 329                         status = "disabled";
 330                 };
 331                 spi0: spi@41000 {
 332                         #address-cells = <1>;
 333                         #size-cells = <0>;
 334                         compatible = "ti,da830-spi";
 335                         reg = <0x41000 0x1000>;
 336                         num-cs = <6>;
 337                         ti,davinci-spi-intr-line = <1>;
 338                         interrupts = <20>;
 339                         status = "disabled";
 340                 };
 341                 spi1: spi@30e000 {
 342                         #address-cells = <1>;
 343                         #size-cells = <0>;
 344                         compatible = "ti,da830-spi";
 345                         reg = <0x30e000 0x1000>;
 346                         num-cs = <4>;
 347                         ti,davinci-spi-intr-line = <1>;
 348                         interrupts = <56>;
 349                         dmas = <&edma0 18 0>, <&edma0 19 0>;
 350                         dma-names = "rx", "tx";
 351                         status = "disabled";
 352                 };
 353                 mdio: mdio@224000 {
 354                         compatible = "ti,davinci_mdio";
 355                         #address-cells = <1>;
 356                         #size-cells = <0>;
 357                         reg = <0x224000 0x1000>;
 358                         status = "disabled";
 359                 };
 360                 eth0: ethernet@220000 {
 361                         compatible = "ti,davinci-dm6467-emac";
 362                         reg = <0x220000 0x4000>;
 363                         ti,davinci-ctrl-reg-offset = <0x3000>;
 364                         ti,davinci-ctrl-mod-reg-offset = <0x2000>;
 365                         ti,davinci-ctrl-ram-offset = <0>;
 366                         ti,davinci-ctrl-ram-size = <0x2000>;
 367                         local-mac-address = [ 00 00 00 00 00 00 ];
 368                         interrupts = <33
 369                                         34
 370                                         35
 371                                         36
 372                                         >;
 373                         status = "disabled";
 374                 };
 375                 gpio: gpio@226000 {
 376                         compatible = "ti,dm6441-gpio";
 377                         gpio-controller;
 378                         #gpio-cells = <2>;
 379                         reg = <0x226000 0x1000>;
 380                         interrupts = <42 IRQ_TYPE_EDGE_BOTH
 381                                 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
 382                                 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
 383                                 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
 384                                 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
 385                         ti,ngpio = <144>;
 386                         ti,davinci-gpio-unbanked = <0>;
 387                         status = "disabled";
 388                 };
 389
 390                 mcasp0: mcasp@100000 {
 391                         compatible = "ti,da830-mcasp-audio";
 392                         reg = <0x100000 0x2000>,
 393                               <0x102000 0x400000>;
 394                         reg-names = "mpu", "dat";
 395                         interrupts = <54>;
 396                         interrupt-names = "common";
 397                         status = "disabled";
 398                         dmas = <&edma0 1 1>,
 399                                 <&edma0 0 1>;
 400                         dma-names = "tx", "rx";
 401                 };
 402         };
 403         aemif: aemif@68000000 {
 404                 compatible = "ti,da850-aemif";
 405                 #address-cells = <2>;
 406                 #size-cells = <1>;
 407
 408                 reg = <0x68000000 0x00008000>;
 409                 ranges = <0 0 0x60000000 0x08000000
 410                           1 0 0x68000000 0x00008000>;
 411                 status = "disabled";
 412         };
 413 };