arch/arm/boot/dts/meson8b.dtsi

   1 /*
   2  * Copyright 2015 Endless Mobile, Inc.
   3  * Author: Carlo Caione <carlo@endlessm.com>
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This library is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License as
  12  *     published by the Free Software Foundation; either version 2 of the
  13  *     License, or (at your option) any later version.
  14  *
  15  *     This library is distributed in the hope that it will be useful,
  16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *     GNU General Public License for more details.
  19  *
  20  *     You should have received a copy of the GNU General Public License
  21  *     along with this program. If not, see <http://www.gnu.org/licenses/>.
  22  *
  23  * Or, alternatively,
  24  *
  25  *  b) Permission is hereby granted, free of charge, to any person
  26  *     obtaining a copy of this software and associated documentation
  27  *     files (the "Software"), to deal in the Software without
  28  *     restriction, including without limitation the rights to use,
  29  *     copy, modify, merge, publish, distribute, sublicense, and/or
  30  *     sell copies of the Software, and to permit persons to whom the
  31  *     Software is furnished to do so, subject to the following
  32  *     conditions:
  33  *
  34  *     The above copyright notice and this permission notice shall be
  35  *     included in all copies or substantial portions of the Software.
  36  *
  37  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  38  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  39  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  40  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  41  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  42  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  43  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  44  *     OTHER DEALINGS IN THE SOFTWARE.
  45  */
  46
  47 #include <dt-bindings/clock/meson8b-clkc.h>
  48 #include <dt-bindings/gpio/meson8b-gpio.h>
  49 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
  50 #include "skeleton.dtsi"
  51
  52 / {
  53         interrupt-parent = <&gic>;
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@200 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a5";
  62                         next-level-cache = <&L2>;
  63                         reg = <0x200>;
  64                 };
  65
  66                 cpu@201 {
  67                         device_type = "cpu";
  68                         compatible = "arm,cortex-a5";
  69                         next-level-cache = <&L2>;
  70                         reg = <0x201>;
  71                 };
  72
  73                 cpu@202 {
  74                         device_type = "cpu";
  75                         compatible = "arm,cortex-a5";
  76                         next-level-cache = <&L2>;
  77                         reg = <0x202>;
  78                 };
  79
  80                 cpu@203 {
  81                         device_type = "cpu";
  82                         compatible = "arm,cortex-a5";
  83                         next-level-cache = <&L2>;
  84                         reg = <0x203>;
  85                 };
  86         };
  87
  88         soc {
  89                 compatible = "simple-bus";
  90                 #address-cells = <1>;
  91                 #size-cells = <1>;
  92                 ranges;
  93
  94                 L2: l2-cache-controller@c4200000 {
  95                         compatible = "arm,pl310-cache";
  96                         reg = <0xc4200000 0x1000>;
  97                         cache-unified;
  98                         cache-level = <2>;
  99                 };
 100
 101                 gic: interrupt-controller@c4301000 {
 102                         compatible = "arm,cortex-a9-gic";
 103                         reg = <0xc4301000 0x1000>,
 104                               <0xc4300100 0x0100>;
 105                         interrupt-controller;
 106                         #interrupt-cells = <3>;
 107                 };
 108
 109                 reset: reset-controller@c1104404 {
 110                         compatible = "amlogic,meson8b-reset";
 111                         reg = <0xc1104404 0x20>;
 112                         #reset-cells = <1>;
 113                 };
 114
 115                 wdt: watchdog@c1109900 {
 116                         compatible = "amlogic,meson8b-wdt";
 117                         reg = <0xc1109900 0x8>;
 118                         interrupts = <0 0 1>;
 119                 };
 120
 121                 timer@c1109940 {
 122                         compatible = "amlogic,meson6-timer";
 123                         reg = <0xc1109940 0x18>;
 124                         interrupts = <0 10 1>;
 125                 };
 126
 127                 uart_AO: serial@c81004c0 {
 128                         compatible = "amlogic,meson-uart";
 129                         reg = <0xc81004c0 0x18>;
 130                         interrupts = <0 90 1>;
 131                         clocks = <&clkc CLKID_CLK81>;
 132                         status = "disabled";
 133                 };
 134
 135                 uart_A: serial@c11084c0 {
 136                         compatible = "amlogic,meson-uart";
 137                         reg = <0xc11084c0 0x18>;
 138                         interrupts = <0 26 1>;
 139                         clocks = <&clkc CLKID_CLK81>;
 140                         status = "disabled";
 141                 };
 142
 143                 uart_B: serial@c11084dc {
 144                         compatible = "amlogic,meson-uart";
 145                         reg = <0xc11084dc 0x18>;
 146                         interrupts = <0 75 1>;
 147                         clocks = <&clkc CLKID_CLK81>;
 148                         status = "disabled";
 149                 };
 150
 151                 uart_C: serial@c1108700 {
 152                         compatible = "amlogic,meson-uart";
 153                         reg = <0xc1108700 0x18>;
 154                         interrupts = <0 93 1>;
 155                         clocks = <&clkc CLKID_CLK81>;
 156                         status = "disabled";
 157                 };
 158
 159                 clkc: clock-controller@c1104000 {
 160                         #clock-cells = <1>;
 161                         compatible = "amlogic,meson8b-clkc";
 162                         reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
 163                 };
 164
 165                 pwm_ab: pwm@8550 {
 166                         compatible = "amlogic,meson8b-pwm";
 167                         reg = <0xc1108550 0x10>;
 168                         #pwm-cells = <3>;
 169                         status = "disabled";
 170                 };
 171
 172                 pwm_cd: pwm@8650 {
 173                         compatible = "amlogic,meson8b-pwm";
 174                         reg = <0xc1108650 0x10>;
 175                         #pwm-cells = <3>;
 176                         status = "disabled";
 177                 };
 178
 179                 pwm_ef: pwm@86c0 {
 180                         compatible = "amlogic,meson8b-pwm";
 181                         reg = <0xc11086c0 0x10>;
 182                         #pwm-cells = <3>;
 183                         status = "disabled";
 184                 };
 185
 186                 pinctrl_cbus: pinctrl@c1109880 {
 187                         compatible = "amlogic,meson8b-cbus-pinctrl";
 188                         reg = <0xc1109880 0x10>;
 189                         #address-cells = <1>;
 190                         #size-cells = <1>;
 191                         ranges;
 192
 193                         gpio: banks@c11080b0 {
 194                                 reg = <0xc11080b0 0x28>,
 195                                       <0xc11080e8 0x18>,
 196                                       <0xc1108120 0x18>,
 197                                       <0xc1108030 0x38>;
 198                                 reg-names = "mux", "pull", "pull-enable", "gpio";
 199                                 gpio-controller;
 200                                 #gpio-cells = <2>;
 201                         };
 202                 };
 203
 204                 pinctrl_aobus: pinctrl@c8100084 {
 205                         compatible = "amlogic,meson8b-aobus-pinctrl";
 206                         reg = <0xc8100084 0xc>;
 207                         #address-cells = <1>;
 208                         #size-cells = <1>;
 209                         ranges;
 210
 211                         gpio_ao: ao-bank@c1108030 {
 212                                 reg = <0xc8100014 0x4>,
 213                                       <0xc810002c 0x4>,
 214                                       <0xc8100024 0x8>;
 215                                 reg-names = "mux", "pull", "gpio";
 216                                 gpio-controller;
 217                                 #gpio-cells = <2>;
 218                         };
 219
 220                         uart_ao_a_pins: uart_ao_a {
 221                                 mux {
 222                                         groups = "uart_tx_ao_a", "uart_rx_ao_a";
 223                                         function = "uart_ao";
 224                                 };
 225                         };
 226                 };
 227         };
 228 }; /* end of / */