arch/arm/mach-imx/mach-mx31lite.c

   1 /*
   2  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   3  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
   4  *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   5  *  Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/types.h>
  19 #include <linux/init.h>
  20 #include <linux/kernel.h>
  21 #include <linux/memory.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/gpio.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/smsc911x.h>
  26 #include <linux/mfd/mc13783.h>
  27 #include <linux/spi/spi.h>
  28 #include <linux/usb/otg.h>
  29 #include <linux/usb/ulpi.h>
  30 #include <linux/mtd/physmap.h>
  31 #include <linux/delay.h>
  32 #include <linux/regulator/machine.h>
  33 #include <linux/regulator/fixed.h>
  34
  35 #include <asm/mach-types.h>
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/time.h>
  38 #include <asm/mach/map.h>
  39 #include <asm/page.h>
  40 #include <asm/setup.h>
  41
  42 #include "board-mx31lite.h"
  43 #include "common.h"
  44 #include "devices-imx31.h"
  45 #include "ehci.h"
  46 #include "hardware.h"
  47 #include "iomux-mx3.h"
  48 #include "ulpi.h"
  49
  50 /*
  51  * This file contains the module-specific initialization routines.
  52  */
  53
  54 static unsigned int mx31lite_pins[] = {
  55         /* UART1 */
  56         MX31_PIN_CTS1__CTS1,
  57         MX31_PIN_RTS1__RTS1,
  58         MX31_PIN_TXD1__TXD1,
  59         MX31_PIN_RXD1__RXD1,
  60         /* SPI 0 */
  61         MX31_PIN_CSPI1_SCLK__SCLK,
  62         MX31_PIN_CSPI1_MOSI__MOSI,
  63         MX31_PIN_CSPI1_MISO__MISO,
  64         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
  65         MX31_PIN_CSPI1_SS0__SS0,
  66         MX31_PIN_CSPI1_SS1__SS1,
  67         MX31_PIN_CSPI1_SS2__SS2,
  68         /* LAN9117 IRQ pin */
  69         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
  70         /* SPI 1 */
  71         MX31_PIN_CSPI2_SCLK__SCLK,
  72         MX31_PIN_CSPI2_MOSI__MOSI,
  73         MX31_PIN_CSPI2_MISO__MISO,
  74         MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  75         MX31_PIN_CSPI2_SS0__SS0,
  76         MX31_PIN_CSPI2_SS1__SS1,
  77         MX31_PIN_CSPI2_SS2__SS2,
  78 };
  79
  80 /* UART */
  81 static const struct imxuart_platform_data uart_pdata __initconst = {
  82         .flags = IMXUART_HAVE_RTSCTS,
  83 };
  84
  85 /* SPI */
  86 static int spi0_internal_chipselect[] = {
  87         MXC_SPI_CS(0),
  88         MXC_SPI_CS(1),
  89         MXC_SPI_CS(2),
  90 };
  91
  92 static const struct spi_imx_master spi0_pdata __initconst = {
  93         .chipselect     = spi0_internal_chipselect,
  94         .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
  95 };
  96
  97 static const struct mxc_nand_platform_data
  98 mx31lite_nand_board_info __initconst  = {
  99         .width = 1,
 100         .hw_ecc = 1,
 101 };
 102
 103 static struct smsc911x_platform_config smsc911x_config = {
 104         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 105         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 106         .flags          = SMSC911X_USE_16BIT,
 107 };
 108
 109 static struct resource smsc911x_resources[] = {
 110         {
 111                 .start          = MX31_CS4_BASE_ADDR,
 112                 .end            = MX31_CS4_BASE_ADDR + 0x100,
 113                 .flags          = IORESOURCE_MEM,
 114         }, {
 115                 /* irq number is run-time assigned */
 116                 .flags          = IORESOURCE_IRQ,
 117         },
 118 };
 119
 120 static struct platform_device smsc911x_device = {
 121         .name           = "smsc911x",
 122         .id             = -1,
 123         .num_resources  = ARRAY_SIZE(smsc911x_resources),
 124         .resource       = smsc911x_resources,
 125         .dev            = {
 126                 .platform_data = &smsc911x_config,
 127         },
 128 };
 129
 130 /*
 131  * SPI
 132  *
 133  * The MC13783 is the only hard-wired SPI device on the module.
 134  */
 135
 136 static int spi1_internal_chipselect[] = {
 137         MXC_SPI_CS(0),
 138 };
 139
 140 static const struct spi_imx_master spi1_pdata __initconst = {
 141         .chipselect     = spi1_internal_chipselect,
 142         .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
 143 };
 144
 145 static struct mc13xxx_platform_data mc13783_pdata __initdata = {
 146         .flags = MC13XXX_USE_RTC,
 147 };
 148
 149 static struct spi_board_info mc13783_spi_dev __initdata = {
 150         .modalias       = "mc13783",
 151         .max_speed_hz   = 1000000,
 152         .bus_num        = 1,
 153         .chip_select    = 0,
 154         .platform_data  = &mc13783_pdata,
 155         /* irq number is run-time assigned */
 156 };
 157
 158 /*
 159  * USB
 160  */
 161
 162 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 163                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 164
 165 static int usbh2_init(struct platform_device *pdev)
 166 {
 167         int pins[] = {
 168                 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
 169                 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
 170                 MX31_PIN_USBH2_CLK__USBH2_CLK,
 171                 MX31_PIN_USBH2_DIR__USBH2_DIR,
 172                 MX31_PIN_USBH2_NXT__USBH2_NXT,
 173                 MX31_PIN_USBH2_STP__USBH2_STP,
 174         };
 175
 176         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
 177
 178         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
 179         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
 180         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
 181         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
 182         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
 183         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
 184         mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
 185         mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
 186         mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
 187         mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
 188         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
 189         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
 190
 191         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
 192
 193         /* chip select */
 194         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
 195                                 "USBH2_CS");
 196         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
 197         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
 198
 199         mdelay(10);
 200
 201         return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
 202 }
 203
 204 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
 205         .init   = usbh2_init,
 206         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 207 };
 208
 209 /*
 210  * NOR flash
 211  */
 212
 213 static struct physmap_flash_data nor_flash_data = {
 214         .width  = 2,
 215 };
 216
 217 static struct resource nor_flash_resource = {
 218         .start  = 0xa0000000,
 219         .end    = 0xa1ffffff,
 220         .flags  = IORESOURCE_MEM,
 221 };
 222
 223 static struct platform_device physmap_flash_device = {
 224         .name   = "physmap-flash",
 225         .id     = 0,
 226         .dev    = {
 227                 .platform_data  = &nor_flash_data,
 228         },
 229         .resource = &nor_flash_resource,
 230         .num_resources = 1,
 231 };
 232
 233 /*
 234  * This structure defines the MX31 memory map.
 235  */
 236 static struct map_desc mx31lite_io_desc[] __initdata = {
 237         {
 238                 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
 239                 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
 240                 .length = MX31_CS4_SIZE,
 241                 .type = MT_DEVICE
 242         }
 243 };
 244
 245 /*
 246  * Set up static virtual mappings.
 247  */
 248 void __init mx31lite_map_io(void)
 249 {
 250         mx31_map_io();
 251         iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
 252 }
 253
 254 static int mx31lite_baseboard;
 255 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
 256
 257 static struct regulator_consumer_supply dummy_supplies[] = {
 258         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
 259         REGULATOR_SUPPLY("vddvario", "smsc911x"),
 260 };
 261
 262 static void __init mx31lite_init(void)
 263 {
 264         imx31_soc_init();
 265
 266         mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
 267                                       "mx31lite");
 268
 269         imx31_add_imx_uart0(&uart_pdata);
 270         imx31_add_spi_imx0(&spi0_pdata);
 271
 272         /* NOR and NAND flash */
 273         platform_device_register(&physmap_flash_device);
 274         imx31_add_mxc_nand(&mx31lite_nand_board_info);
 275
 276         imx31_add_spi_imx1(&spi1_pdata);
 277
 278         regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
 279 }
 280
 281 static void __init mx31lite_late(void)
 282 {
 283         int ret;
 284
 285         if (mx31lite_baseboard == MX31LITE_DB)
 286                 mx31lite_db_init();
 287
 288         mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
 289         spi_register_board_info(&mc13783_spi_dev, 1);
 290
 291         /* USB */
 292         usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 293                         ULPI_OTG_DRVVBUS_EXT);
 294         if (usbh2_pdata.otg)
 295                 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
 296
 297         /* SMSC9117 IRQ pin */
 298         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
 299         if (ret)
 300                 pr_warn("could not get LAN irq gpio\n");
 301         else {
 302                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 303                 smsc911x_resources[1].start =
 304                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 305                 smsc911x_resources[1].end =
 306                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 307                 platform_device_register(&smsc911x_device);
 308         }
 309 }
 310
 311 static void __init mx31lite_timer_init(void)
 312 {
 313         mx31_clocks_init(26000000);
 314 }
 315
 316 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
 317         /* Maintainer: Freescale Semiconductor, Inc. */
 318         .atag_offset = 0x100,
 319         .map_io = mx31lite_map_io,
 320         .init_early = imx31_init_early,
 321         .init_irq = mx31_init_irq,
 322         .init_time      = mx31lite_timer_init,
 323         .init_machine = mx31lite_init,
 324         .init_late      = mx31lite_late,
 325         .restart        = mxc_restart,
 326 MACHINE_END