arch/arm/mach-realview/realview_eb.c

   1 /*
   2  *  linux/arch/arm/mach-realview/realview_eb.c
   3  *
   4  *  Copyright (C) 2004 ARM Limited
   5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/device.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/pl061.h>
  27 #include <linux/amba/mmci.h>
  28 #include <linux/amba/pl022.h>
  29 #include <linux/io.h>
  30 #include <linux/irqchip/arm-gic.h>
  31 #include <linux/platform_data/clk-realview.h>
  32 #include <linux/reboot.h>
  33
  34 #include "hardware.h"
  35 #include <asm/irq.h>
  36 #include <asm/mach-types.h>
  37 #include <asm/pgtable.h>
  38 #include <asm/hardware/cache-l2x0.h>
  39 #include <asm/smp_twd.h>
  40 #include <asm/system_info.h>
  41 #include <asm/outercache.h>
  42
  43 #include <asm/mach/arch.h>
  44 #include <asm/mach/map.h>
  45 #include <asm/mach/time.h>
  46
  47 #include "board-eb.h"
  48 #include "irqs-eb.h"
  49
  50 #include "core.h"
  51
  52 static struct map_desc realview_eb_io_desc[] __initdata = {
  53         {
  54                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
  55                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
  56                 .length         = SZ_4K,
  57                 .type           = MT_DEVICE,
  58         }, {
  59                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
  60                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
  61                 .length         = SZ_4K,
  62                 .type           = MT_DEVICE,
  63         }, {
  64                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
  65                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
  66                 .length         = SZ_4K,
  67                 .type           = MT_DEVICE,
  68         }, {
  69                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
  70                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
  71                 .length         = SZ_4K,
  72                 .type           = MT_DEVICE,
  73         }, {
  74                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
  75                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
  76                 .length         = SZ_4K,
  77                 .type           = MT_DEVICE,
  78         }, {
  79                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
  80                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
  81                 .length         = SZ_4K,
  82                 .type           = MT_DEVICE,
  83         },
  84 #ifdef CONFIG_DEBUG_LL
  85         {
  86                 .virtual        = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
  87                 .pfn            = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
  88                 .length         = SZ_4K,
  89                 .type           = MT_DEVICE,
  90         }
  91 #endif
  92 };
  93
  94 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
  95         {
  96                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
  97                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
  98                 .length         = REALVIEW_EB11MP_PRIV_MEM_SIZE,
  99                 .type           = MT_DEVICE,
 100         }, {
 101                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
 102                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
 103                 .length         = SZ_8K,
 104                 .type           = MT_DEVICE,
 105         }
 106 };
 107
 108 static void __init realview_eb_map_io(void)
 109 {
 110         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
 111         if (core_tile_eb11mp() || core_tile_a9mp())
 112                 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
 113 }
 114
 115 static struct pl061_platform_data gpio0_plat_data = {
 116         .gpio_base      = 0,
 117 };
 118
 119 static struct pl061_platform_data gpio1_plat_data = {
 120         .gpio_base      = 8,
 121 };
 122
 123 static struct pl061_platform_data gpio2_plat_data = {
 124         .gpio_base      = 16,
 125 };
 126
 127 static struct pl022_ssp_controller ssp0_plat_data = {
 128         .bus_id = 0,
 129         .enable_dma = 0,
 130         .num_chipselect = 1,
 131 };
 132
 133 /*
 134  * RealView EB AMBA devices
 135  */
 136
 137 /*
 138  * These devices are connected via the core APB bridge
 139  */
 140 #define GPIO2_IRQ       { IRQ_EB_GPIO2 }
 141 #define GPIO3_IRQ       { IRQ_EB_GPIO3 }
 142
 143 #define AACI_IRQ        { IRQ_EB_AACI }
 144 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
 145 #define KMI0_IRQ        { IRQ_EB_KMI0 }
 146 #define KMI1_IRQ        { IRQ_EB_KMI1 }
 147
 148 /*
 149  * These devices are connected directly to the multi-layer AHB switch
 150  */
 151 #define EB_SMC_IRQ      { }
 152 #define MPMC_IRQ        { }
 153 #define EB_CLCD_IRQ     { IRQ_EB_CLCD }
 154 #define DMAC_IRQ        { IRQ_EB_DMA }
 155
 156 /*
 157  * These devices are connected via the core APB bridge
 158  */
 159 #define SCTL_IRQ        { }
 160 #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
 161 #define EB_GPIO0_IRQ    { IRQ_EB_GPIO0 }
 162 #define GPIO1_IRQ       { IRQ_EB_GPIO1 }
 163 #define EB_RTC_IRQ      { IRQ_EB_RTC }
 164
 165 /*
 166  * These devices are connected via the DMA APB bridge
 167  */
 168 #define SCI_IRQ         { IRQ_EB_SCI }
 169 #define EB_UART0_IRQ    { IRQ_EB_UART0 }
 170 #define EB_UART1_IRQ    { IRQ_EB_UART1 }
 171 #define EB_UART2_IRQ    { IRQ_EB_UART2 }
 172 #define EB_UART3_IRQ    { IRQ_EB_UART3 }
 173 #define EB_SSP_IRQ      { IRQ_EB_SSP }
 174
 175 /* FPGA Primecells */
 176 APB_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
 177 APB_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
 178 APB_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
 179 APB_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
 180 APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
 181
 182 /* DevChip Primecells */
 183 AHB_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
 184 AHB_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
 185 AHB_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
 186 AHB_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
 187 APB_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
 188 APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
 189 APB_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
 190 APB_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
 191 APB_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
 192 APB_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
 193 APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
 194 APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
 195 APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
 196 APB_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
 197
 198 static struct amba_device *amba_devs[] __initdata = {
 199         &dmac_device,
 200         &uart0_device,
 201         &uart1_device,
 202         &uart2_device,
 203         &uart3_device,
 204         &smc_device,
 205         &clcd_device,
 206         &sctl_device,
 207         &wdog_device,
 208         &gpio0_device,
 209         &gpio1_device,
 210         &gpio2_device,
 211         &rtc_device,
 212         &sci0_device,
 213         &ssp0_device,
 214         &aaci_device,
 215         &mmc0_device,
 216         &kmi0_device,
 217         &kmi1_device,
 218 };
 219
 220 /*
 221  * RealView EB platform devices
 222  */
 223 static struct resource realview_eb_flash_resource = {
 224         .start                  = REALVIEW_EB_FLASH_BASE,
 225         .end                    = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
 226         .flags                  = IORESOURCE_MEM,
 227 };
 228
 229 static struct resource realview_eb_eth_resources[] = {
 230         [0] = {
 231                 .start          = REALVIEW_EB_ETH_BASE,
 232                 .end            = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
 233                 .flags          = IORESOURCE_MEM,
 234         },
 235         [1] = {
 236                 .start          = IRQ_EB_ETH,
 237                 .end            = IRQ_EB_ETH,
 238                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 239         },
 240 };
 241
 242 /*
 243  * Detect and register the correct Ethernet device. RealView/EB rev D
 244  * platforms use the newer SMSC LAN9118 Ethernet chip
 245  */
 246 static int eth_device_register(void)
 247 {
 248         void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
 249         const char *name = NULL;
 250         u32 idrev;
 251
 252         if (!eth_addr)
 253                 return -ENOMEM;
 254
 255         idrev = readl(eth_addr + 0x50);
 256         if ((idrev & 0xFFFF0000) != 0x01180000)
 257                 /* SMSC LAN9118 not present, use LAN91C111 instead */
 258                 name = "smc91x";
 259
 260         iounmap(eth_addr);
 261         return realview_eth_register(name, realview_eb_eth_resources);
 262 }
 263
 264 static struct resource realview_eb_isp1761_resources[] = {
 265         [0] = {
 266                 .start          = REALVIEW_EB_USB_BASE,
 267                 .end            = REALVIEW_EB_USB_BASE + SZ_128K - 1,
 268                 .flags          = IORESOURCE_MEM,
 269         },
 270         [1] = {
 271                 .start          = IRQ_EB_USB,
 272                 .end            = IRQ_EB_USB,
 273                 .flags          = IORESOURCE_IRQ,
 274         },
 275 };
 276
 277 static struct resource pmu_resources[] = {
 278         [0] = {
 279                 .start          = IRQ_EB11MP_PMU_CPU0,
 280                 .end            = IRQ_EB11MP_PMU_CPU0,
 281                 .flags          = IORESOURCE_IRQ,
 282         },
 283         [1] = {
 284                 .start          = IRQ_EB11MP_PMU_CPU1,
 285                 .end            = IRQ_EB11MP_PMU_CPU1,
 286                 .flags          = IORESOURCE_IRQ,
 287         },
 288         [2] = {
 289                 .start          = IRQ_EB11MP_PMU_CPU2,
 290                 .end            = IRQ_EB11MP_PMU_CPU2,
 291                 .flags          = IORESOURCE_IRQ,
 292         },
 293         [3] = {
 294                 .start          = IRQ_EB11MP_PMU_CPU3,
 295                 .end            = IRQ_EB11MP_PMU_CPU3,
 296                 .flags          = IORESOURCE_IRQ,
 297         },
 298 };
 299
 300 static struct platform_device pmu_device = {
 301         .id                     = -1,
 302         .num_resources          = ARRAY_SIZE(pmu_resources),
 303         .resource               = pmu_resources,
 304 };
 305
 306 static struct resource char_lcd_resources[] = {
 307         {
 308                 .start = REALVIEW_CHAR_LCD_BASE,
 309                 .end   = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
 310                 .flags = IORESOURCE_MEM,
 311         },
 312         {
 313                 .start  = IRQ_EB_CHARLCD,
 314                 .end    = IRQ_EB_CHARLCD,
 315                 .flags  = IORESOURCE_IRQ,
 316         },
 317 };
 318
 319 static struct platform_device char_lcd_device = {
 320         .name           =       "arm-charlcd",
 321         .id             =       -1,
 322         .num_resources  =       ARRAY_SIZE(char_lcd_resources),
 323         .resource       =       char_lcd_resources,
 324 };
 325
 326 static void __init gic_init_irq(void)
 327 {
 328         if (core_tile_eb11mp() || core_tile_a9mp()) {
 329                 unsigned int pldctrl;
 330
 331                 /* new irq mode */
 332                 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
 333                 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
 334                 pldctrl |= 0x00800000;
 335                 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
 336                 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 337
 338                 /* core tile GIC, primary */
 339                 gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
 340                          __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
 341
 342 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
 343                 /* board GIC, secondary */
 344                 gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
 345                          __io_address(REALVIEW_EB_GIC_CPU_BASE));
 346                 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
 347 #endif
 348         } else {
 349                 /* board GIC, primary */
 350                 gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
 351                          __io_address(REALVIEW_EB_GIC_CPU_BASE));
 352         }
 353 }
 354
 355 /*
 356  * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
 357  */
 358 static void realview_eb11mp_fixup(void)
 359 {
 360         /* AMBA devices */
 361         dmac_device.irq[0]      = IRQ_EB11MP_DMA;
 362         uart0_device.irq[0]     = IRQ_EB11MP_UART0;
 363         uart1_device.irq[0]     = IRQ_EB11MP_UART1;
 364         uart2_device.irq[0]     = IRQ_EB11MP_UART2;
 365         uart3_device.irq[0]     = IRQ_EB11MP_UART3;
 366         clcd_device.irq[0]      = IRQ_EB11MP_CLCD;
 367         wdog_device.irq[0]      = IRQ_EB11MP_WDOG;
 368         gpio0_device.irq[0]     = IRQ_EB11MP_GPIO0;
 369         gpio1_device.irq[0]     = IRQ_EB11MP_GPIO1;
 370         gpio2_device.irq[0]     = IRQ_EB11MP_GPIO2;
 371         rtc_device.irq[0]       = IRQ_EB11MP_RTC;
 372         sci0_device.irq[0]      = IRQ_EB11MP_SCI;
 373         ssp0_device.irq[0]      = IRQ_EB11MP_SSP;
 374         aaci_device.irq[0]      = IRQ_EB11MP_AACI;
 375         mmc0_device.irq[0]      = IRQ_EB11MP_MMCI0A;
 376         mmc0_device.irq[1]      = IRQ_EB11MP_MMCI0B;
 377         kmi0_device.irq[0]      = IRQ_EB11MP_KMI0;
 378         kmi1_device.irq[0]      = IRQ_EB11MP_KMI1;
 379
 380         /* platform devices */
 381         realview_eb_eth_resources[1].start      = IRQ_EB11MP_ETH;
 382         realview_eb_eth_resources[1].end        = IRQ_EB11MP_ETH;
 383         realview_eb_isp1761_resources[1].start  = IRQ_EB11MP_USB;
 384         realview_eb_isp1761_resources[1].end    = IRQ_EB11MP_USB;
 385 }
 386
 387 #ifdef CONFIG_HAVE_ARM_TWD
 388 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
 389                               REALVIEW_EB11MP_TWD_BASE,
 390                               IRQ_LOCALTIMER);
 391
 392 static void __init realview_eb_twd_init(void)
 393 {
 394         if (core_tile_eb11mp() || core_tile_a9mp()) {
 395                 int err = twd_local_timer_register(&twd_local_timer);
 396                 if (err)
 397                         pr_err("twd_local_timer_register failed %d\n", err);
 398         }
 399 }
 400 #else
 401 #define realview_eb_twd_init()  do { } while(0)
 402 #endif
 403
 404 static void __init realview_eb_timer_init(void)
 405 {
 406         unsigned int timer_irq;
 407
 408         timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
 409         timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
 410         timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
 411         timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
 412
 413         if (core_tile_eb11mp() || core_tile_a9mp())
 414                 timer_irq = IRQ_EB11MP_TIMER0_1;
 415         else
 416                 timer_irq = IRQ_EB_TIMER0_1;
 417
 418         realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
 419         realview_timer_init(timer_irq);
 420         realview_eb_twd_init();
 421 }
 422
 423 static void realview_eb_restart(enum reboot_mode mode, const char *cmd)
 424 {
 425         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
 426         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
 427
 428         /*
 429          * To reset, we hit the on-board reset register
 430          * in the system FPGA
 431          */
 432         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
 433         if (core_tile_eb11mp())
 434                 __raw_writel(0x0008, reset_ctrl);
 435         dsb();
 436 }
 437
 438 static void __init realview_eb_init(void)
 439 {
 440         int i;
 441
 442         if (core_tile_eb11mp() || core_tile_a9mp()) {
 443                 realview_eb11mp_fixup();
 444
 445 #ifdef CONFIG_CACHE_L2X0
 446                 /*
 447                  * The PL220 needs to be manually configured as the hardware
 448                  * doesn't report the correct sizes.
 449                  * 1MB (128KB/way), 8-way associativity, event monitor and
 450                  * parity enabled, ignore share bit, no force write allocate
 451                  * Bits:  .... ...0 0111 1001 0000 .... .... ....
 452                  */
 453                 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
 454
 455                 /*
 456                  * due to a bug in the l220 cache controller, we must not call
 457                  * the sync function. stub it out here instead!
 458                  */
 459                 outer_cache.sync = NULL;
 460 #endif
 461                 pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu";
 462                 platform_device_register(&pmu_device);
 463         }
 464
 465         realview_flash_register(&realview_eb_flash_resource, 1);
 466         platform_device_register(&realview_i2c_device);
 467         platform_device_register(&char_lcd_device);
 468         platform_device_register(&realview_leds_device);
 469         eth_device_register();
 470         realview_usb_register(realview_eb_isp1761_resources);
 471
 472         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 473                 struct amba_device *d = amba_devs[i];
 474                 amba_device_register(d, &iomem_resource);
 475         }
 476 }
 477
 478 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
 479         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 480         .atag_offset    = 0x100,
 481         .smp            = smp_ops(realview_smp_ops),
 482         .fixup          = realview_fixup,
 483         .map_io         = realview_eb_map_io,
 484         .init_early     = realview_init_early,
 485         .init_irq       = gic_init_irq,
 486         .init_time      = realview_eb_timer_init,
 487         .init_machine   = realview_eb_init,
 488 #ifdef CONFIG_ZONE_DMA
 489         .dma_zone_size  = SZ_256M,
 490 #endif
 491         .restart        = realview_eb_restart,
 492 MACHINE_END