arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include <dt-bindings/gpio/gpio.h>
  44 #include <dt-bindings/interrupt-controller/irq.h>
  45 #include <dt-bindings/interrupt-controller/arm-gic.h>
  46 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  47 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
  48 #include <dt-bindings/clock/gxbb-clkc.h>
  49 #include <dt-bindings/clock/gxbb-aoclkc.h>
  50 #include <dt-bindings/reset/gxbb-aoclkc.h>
  51
  52 / {
  53         compatible = "amlogic,meson-gxbb";
  54         interrupt-parent = <&gic>;
  55         #address-cells = <2>;
  56         #size-cells = <2>;
  57
  58         cpus {
  59                 #address-cells = <0x2>;
  60                 #size-cells = <0x0>;
  61
  62                 cpu0: cpu@0 {
  63                         device_type = "cpu";
  64                         compatible = "arm,cortex-a53", "arm,armv8";
  65                         reg = <0x0 0x0>;
  66                         enable-method = "psci";
  67                 };
  68
  69                 cpu1: cpu@1 {
  70                         device_type = "cpu";
  71                         compatible = "arm,cortex-a53", "arm,armv8";
  72                         reg = <0x0 0x1>;
  73                         enable-method = "psci";
  74                 };
  75
  76                 cpu2: cpu@2 {
  77                         device_type = "cpu";
  78                         compatible = "arm,cortex-a53", "arm,armv8";
  79                         reg = <0x0 0x2>;
  80                         enable-method = "psci";
  81                 };
  82
  83                 cpu3: cpu@3 {
  84                         device_type = "cpu";
  85                         compatible = "arm,cortex-a53", "arm,armv8";
  86                         reg = <0x0 0x3>;
  87                         enable-method = "psci";
  88                 };
  89         };
  90
  91         arm-pmu {
  92                 compatible = "arm,cortex-a53-pmu";
  93                 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
  94                              <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
  95                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
  96                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
  97                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
  98         };
  99
 100         psci {
 101                 compatible = "arm,psci-0.2";
 102                 method = "smc";
 103         };
 104
 105         firmware {
 106                 sm: secure-monitor {
 107                         compatible = "amlogic,meson-gxbb-sm";
 108                 };
 109         };
 110
 111         efuse: efuse {
 112                 compatible = "amlogic,meson-gxbb-efuse";
 113                 #address-cells = <1>;
 114                 #size-cells = <1>;
 115
 116                 sn: sn@14 {
 117                         reg = <0x14 0x10>;
 118                 };
 119
 120                 eth_mac: eth_mac@34 {
 121                         reg = <0x34 0x10>;
 122                 };
 123
 124                 bid: bid@46 {
 125                         reg = <0x46 0x30>;
 126                 };
 127         };
 128
 129         timer {
 130                 compatible = "arm,armv8-timer";
 131                 interrupts = <GIC_PPI 13
 132                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 133                              <GIC_PPI 14
 134                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 135                              <GIC_PPI 11
 136                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 137                              <GIC_PPI 10
 138                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
 139         };
 140
 141         xtal: xtal-clk {
 142                 compatible = "fixed-clock";
 143                 clock-frequency = <24000000>;
 144                 clock-output-names = "xtal";
 145                 #clock-cells = <0>;
 146         };
 147
 148         soc {
 149                 compatible = "simple-bus";
 150                 #address-cells = <2>;
 151                 #size-cells = <2>;
 152                 ranges;
 153
 154                 usb0_phy: phy@c0000000 {
 155                         compatible = "amlogic,meson-gxbb-usb2-phy";
 156                         #phy-cells = <0>;
 157                         reg = <0x0 0xc0000000 0x0 0x20>;
 158                         resets = <&reset RESET_USB_OTG>;
 159                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
 160                         clock-names = "usb_general", "usb";
 161                         status = "disabled";
 162                 };
 163
 164                 usb1_phy: phy@c0000020 {
 165                         compatible = "amlogic,meson-gxbb-usb2-phy";
 166                         #phy-cells = <0>;
 167                         reg = <0x0 0xc0000020 0x0 0x20>;
 168                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
 169                         clock-names = "usb_general", "usb";
 170                         status = "disabled";
 171                 };
 172
 173                 cbus: cbus@c1100000 {
 174                         compatible = "simple-bus";
 175                         reg = <0x0 0xc1100000 0x0 0x100000>;
 176                         #address-cells = <2>;
 177                         #size-cells = <2>;
 178                         ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
 179
 180                         reset: reset-controller@4404 {
 181                                 compatible = "amlogic,meson-gxbb-reset";
 182                                 reg = <0x0 0x04404 0x0 0x20>;
 183                                 #reset-cells = <1>;
 184                         };
 185
 186                         uart_A: serial@84c0 {
 187                                 compatible = "amlogic,meson-uart";
 188                                 reg = <0x0 0x84c0 0x0 0x14>;
 189                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 190                                 clocks = <&xtal>;
 191                                 status = "disabled";
 192                         };
 193
 194                         uart_B: serial@84dc {
 195                                 compatible = "amlogic,meson-uart";
 196                                 reg = <0x0 0x84dc 0x0 0x14>;
 197                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 198                                 clocks = <&xtal>;
 199                                 status = "disabled";
 200                         };
 201
 202                         pwm_ab: pwm@8550 {
 203                                 compatible = "amlogic,meson-gxbb-pwm";
 204                                 reg = <0x0 0x08550 0x0 0x10>;
 205                                 #pwm-cells = <3>;
 206                                 status = "disabled";
 207                         };
 208
 209                         pwm_cd: pwm@8650 {
 210                                 compatible = "amlogic,meson-gxbb-pwm";
 211                                 reg = <0x0 0x08650 0x0 0x10>;
 212                                 #pwm-cells = <3>;
 213                                 status = "disabled";
 214                         };
 215
 216                         pwm_ef: pwm@86c0 {
 217                                 compatible = "amlogic,meson-gxbb-pwm";
 218                                 reg = <0x0 0x086c0 0x0 0x10>;
 219                                 #pwm-cells = <3>;
 220                                 status = "disabled";
 221                         };
 222
 223                         uart_C: serial@8700 {
 224                                 compatible = "amlogic,meson-uart";
 225                                 reg = <0x0 0x8700 0x0 0x14>;
 226                                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
 227                                 clocks = <&xtal>;
 228                                 status = "disabled";
 229                         };
 230
 231                         watchdog@98d0 {
 232                                 compatible = "amlogic,meson-gxbb-wdt";
 233                                 reg = <0x0 0x098d0 0x0 0x10>;
 234                                 clocks = <&xtal>;
 235                         };
 236
 237                         spifc: spi@8c80 {
 238                                 compatible = "amlogic,meson-gxbb-spifc";
 239                                 reg = <0x0 0x08c80 0x0 0x80>;
 240                                 #address-cells = <1>;
 241                                 #size-cells = <0>;
 242                                 clocks = <&clkc CLKID_SPI>;
 243                                 status = "disabled";
 244                         };
 245
 246                         i2c_A: i2c@8500 {
 247                                 compatible = "amlogic,meson-gxbb-i2c";
 248                                 reg = <0x0 0x08500 0x0 0x20>;
 249                                 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
 250                                 clocks = <&clkc CLKID_I2C>;
 251                                 #address-cells = <1>;
 252                                 #size-cells = <0>;
 253                                 status = "disabled";
 254                         };
 255
 256                         i2c_B: i2c@87c0 {
 257                                 compatible = "amlogic,meson-gxbb-i2c";
 258                                 reg = <0x0 0x087c0 0x0 0x20>;
 259                                 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
 260                                 clocks = <&clkc CLKID_I2C>;
 261                                 #address-cells = <1>;
 262                                 #size-cells = <0>;
 263                                 status = "disabled";
 264                         };
 265
 266                         i2c_C: i2c@87e0 {
 267                                 compatible = "amlogic,meson-gxbb-i2c";
 268                                 reg = <0x0 0x087e0 0x0 0x20>;
 269                                 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
 270                                 clocks = <&clkc CLKID_I2C>;
 271                                 #address-cells = <1>;
 272                                 #size-cells = <0>;
 273                                 status = "disabled";
 274                         };
 275                 };
 276
 277                 gic: interrupt-controller@c4301000 {
 278                         compatible = "arm,gic-400";
 279                         reg = <0x0 0xc4301000 0 0x1000>,
 280                               <0x0 0xc4302000 0 0x2000>,
 281                               <0x0 0xc4304000 0 0x2000>,
 282                               <0x0 0xc4306000 0 0x2000>;
 283                         interrupt-controller;
 284                         interrupts = <GIC_PPI 9
 285                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 286                         #interrupt-cells = <3>;
 287                         #address-cells = <0>;
 288                 };
 289
 290                 aobus: aobus@c8100000 {
 291                         compatible = "simple-bus";
 292                         reg = <0x0 0xc8100000 0x0 0x100000>;
 293                         #address-cells = <2>;
 294                         #size-cells = <2>;
 295                         ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
 296
 297                         pinctrl_aobus: pinctrl@14 {
 298                                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
 299                                 #address-cells = <2>;
 300                                 #size-cells = <2>;
 301                                 ranges;
 302
 303                                 gpio_ao: bank@14 {
 304                                         reg = <0x0 0x00014 0x0 0x8>,
 305                                               <0x0 0x0002c 0x0 0x4>,
 306                                               <0x0 0x00024 0x0 0x8>;
 307                                         reg-names = "mux", "pull", "gpio";
 308                                         gpio-controller;
 309                                         #gpio-cells = <2>;
 310                                 };
 311
 312                                 uart_ao_a_pins: uart_ao_a {
 313                                         mux {
 314                                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 315                                                 function = "uart_ao";
 316                                         };
 317                                 };
 318
 319                                 remote_input_ao_pins: remote_input_ao {
 320                                         mux {
 321                                                 groups = "remote_input_ao";
 322                                                 function = "remote_input_ao";
 323                                         };
 324                                 };
 325
 326                                 i2c_ao_pins: i2c_ao {
 327                                         mux {
 328                                                 groups = "i2c_sck_ao",
 329                                                        "i2c_sda_ao";
 330                                                 function = "i2c_ao";
 331                                         };
 332                                 };
 333
 334                                 pwm_ao_a_3_pins: pwm_ao_a_3 {
 335                                         mux {
 336                                                 groups = "pwm_ao_a_3";
 337                                                 function = "pwm_ao_a_3";
 338                                         };
 339                                 };
 340
 341                                 pwm_ao_a_6_pins: pwm_ao_a_6 {
 342                                         mux {
 343                                                 groups = "pwm_ao_a_6";
 344                                                 function = "pwm_ao_a_6";
 345                                         };
 346                                 };
 347
 348                                 pwm_ao_a_12_pins: pwm_ao_a_12 {
 349                                         mux {
 350                                                 groups = "pwm_ao_a_12";
 351                                                 function = "pwm_ao_a_12";
 352                                         };
 353                                 };
 354
 355                                 pwm_ao_b_pins: pwm_ao_b {
 356                                         mux {
 357                                                 groups = "pwm_ao_b";
 358                                                 function = "pwm_ao_b";
 359                                         };
 360                                 };
 361                         };
 362
 363                         clkc_AO: clock-controller@040 {
 364                                 compatible = "amlogic,gxbb-aoclkc";
 365                                 reg = <0x0 0x00040 0x0 0x4>;
 366                                 #clock-cells = <1>;
 367                                 #reset-cells = <1>;
 368                         };
 369
 370                         uart_AO: serial@4c0 {
 371                                 compatible = "amlogic,meson-uart";
 372                                 reg = <0x0 0x004c0 0x0 0x14>;
 373                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 374                                 clocks = <&xtal>;
 375                                 status = "disabled";
 376                         };
 377
 378                         ir: ir@580 {
 379                                 compatible = "amlogic,meson-gxbb-ir";
 380                                 reg = <0x0 0x00580 0x0 0x40>;
 381                                 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
 382                                 status = "disabled";
 383                         };
 384
 385                         pwm_ab_AO: pwm@550 {
 386                                 compatible = "amlogic,meson-gxbb-pwm";
 387                                 reg = <0x0 0x0550 0x0 0x10>;
 388                                 #pwm-cells = <3>;
 389                                 status = "disabled";
 390                         };
 391
 392                         i2c_AO: i2c@500 {
 393                                 compatible = "amlogic,meson-gxbb-i2c";
 394                                 reg = <0x0 0x500 0x0 0x20>;
 395                                 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
 396                                 clocks = <&clkc CLKID_AO_I2C>;
 397                                 #address-cells = <1>;
 398                                 #size-cells = <0>;
 399                                 status = "disabled";
 400                         };
 401                 };
 402
 403                 periphs: periphs@c8834000 {
 404                         compatible = "simple-bus";
 405                         reg = <0x0 0xc8834000 0x0 0x2000>;
 406                         #address-cells = <2>;
 407                         #size-cells = <2>;
 408                         ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 409
 410                         rng {
 411                                 compatible = "amlogic,meson-rng";
 412                                 reg = <0x0 0x0 0x0 0x4>;
 413                         };
 414
 415                         pinctrl_periphs: pinctrl@4b0 {
 416                                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
 417                                 #address-cells = <2>;
 418                                 #size-cells = <2>;
 419                                 ranges;
 420
 421                                 gpio: bank@4b0 {
 422                                         reg = <0x0 0x004b0 0x0 0x28>,
 423                                               <0x0 0x004e8 0x0 0x14>,
 424                                               <0x0 0x00120 0x0 0x14>,
 425                                               <0x0 0x00430 0x0 0x40>;
 426                                         reg-names = "mux", "pull", "pull-enable", "gpio";
 427                                         gpio-controller;
 428                                         #gpio-cells = <2>;
 429                                 };
 430
 431                                 emmc_pins: emmc {
 432                                         mux {
 433                                                 groups = "emmc_nand_d07",
 434                                                        "emmc_cmd",
 435                                                        "emmc_clk";
 436                                                 function = "emmc";
 437                                         };
 438                                 };
 439
 440                                 nor_pins: nor {
 441                                         mux {
 442                                                 groups = "nor_d",
 443                                                        "nor_q",
 444                                                        "nor_c",
 445                                                        "nor_cs";
 446                                                 function = "nor";
 447                                         };
 448                                 };
 449
 450                                 sdcard_pins: sdcard {
 451                                         mux {
 452                                                 groups = "sdcard_d0",
 453                                                        "sdcard_d1",
 454                                                        "sdcard_d2",
 455                                                        "sdcard_d3",
 456                                                        "sdcard_cmd",
 457                                                        "sdcard_clk";
 458                                                 function = "sdcard";
 459                                         };
 460                                 };
 461
 462                                 sdio_pins: sdio {
 463                                         mux {
 464                                                 groups = "sdio_d0",
 465                                                        "sdio_d1",
 466                                                        "sdio_d2",
 467                                                        "sdio_d3",
 468                                                        "sdio_cmd",
 469                                                        "sdio_clk";
 470                                                 function = "sdio";
 471                                         };
 472                                 };
 473
 474                                 sdio_irq_pins: sdio_irq {
 475                                         mux {
 476                                                 groups = "sdio_irq";
 477                                                 function = "sdio";
 478                                         };
 479                                 };
 480
 481                                 uart_a_pins: uart_a {
 482                                         mux {
 483                                                 groups = "uart_tx_a",
 484                                                        "uart_rx_a";
 485                                                 function = "uart_a";
 486                                         };
 487                                 };
 488
 489                                 uart_b_pins: uart_b {
 490                                         mux {
 491                                                 groups = "uart_tx_b",
 492                                                        "uart_rx_b";
 493                                                 function = "uart_b";
 494                                         };
 495                                 };
 496
 497                                 uart_c_pins: uart_c {
 498                                         mux {
 499                                                 groups = "uart_tx_c",
 500                                                        "uart_rx_c";
 501                                                 function = "uart_c";
 502                                         };
 503                                 };
 504
 505                                 i2c_a_pins: i2c_a {
 506                                         mux {
 507                                                 groups = "i2c_sck_a",
 508                                                        "i2c_sda_a";
 509                                                 function = "i2c_a";
 510                                         };
 511                                 };
 512
 513                                 i2c_b_pins: i2c_b {
 514                                         mux {
 515                                                 groups = "i2c_sck_b",
 516                                                        "i2c_sda_b";
 517                                                 function = "i2c_b";
 518                                         };
 519                                 };
 520
 521                                 i2c_c_pins: i2c_c {
 522                                         mux {
 523                                                 groups = "i2c_sck_c",
 524                                                        "i2c_sda_c";
 525                                                 function = "i2c_c";
 526                                         };
 527                                 };
 528
 529                                 eth_pins: eth_c {
 530                                         mux {
 531                                                 groups = "eth_mdio",
 532                                                        "eth_mdc",
 533                                                        "eth_clk_rx_clk",
 534                                                        "eth_rx_dv",
 535                                                        "eth_rxd0",
 536                                                        "eth_rxd1",
 537                                                        "eth_rxd2",
 538                                                        "eth_rxd3",
 539                                                        "eth_rgmii_tx_clk",
 540                                                        "eth_tx_en",
 541                                                        "eth_txd0",
 542                                                        "eth_txd1",
 543                                                        "eth_txd2",
 544                                                        "eth_txd3";
 545                                                 function = "eth";
 546                                         };
 547                                 };
 548
 549                                 pwm_a_x_pins: pwm_a_x {
 550                                         mux {
 551                                                 groups = "pwm_a_x";
 552                                                 function = "pwm_a_x";
 553                                         };
 554                                 };
 555
 556                                 pwm_a_y_pins: pwm_a_y {
 557                                         mux {
 558                                                 groups = "pwm_a_y";
 559                                                 function = "pwm_a_y";
 560                                         };
 561                                 };
 562
 563                                 pwm_b_pins: pwm_b {
 564                                         mux {
 565                                                 groups = "pwm_b";
 566                                                 function = "pwm_b";
 567                                         };
 568                                 };
 569
 570                                 pwm_d_pins: pwm_d {
 571                                         mux {
 572                                                 groups = "pwm_d";
 573                                                 function = "pwm_d";
 574                                         };
 575                                 };
 576
 577                                 pwm_e_pins: pwm_e {
 578                                         mux {
 579                                                 groups = "pwm_e";
 580                                                 function = "pwm_e";
 581                                         };
 582                                 };
 583
 584                                 pwm_f_x_pins: pwm_f_x {
 585                                         mux {
 586                                                 groups = "pwm_f_x";
 587                                                 function = "pwm_f_x";
 588                                         };
 589                                 };
 590
 591                                 pwm_f_y_pins: pwm_f_y {
 592                                         mux {
 593                                                 groups = "pwm_f_y";
 594                                                 function = "pwm_f_y";
 595                                         };
 596                                 };
 597                         };
 598                 };
 599
 600                 hiubus: hiubus@c883c000 {
 601                         compatible = "simple-bus";
 602                         reg = <0x0 0xc883c000 0x0 0x2000>;
 603                         #address-cells = <2>;
 604                         #size-cells = <2>;
 605                         ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
 606
 607                         clkc: clock-controller@0 {
 608                                 compatible = "amlogic,gxbb-clkc";
 609                                 #clock-cells = <1>;
 610                                 reg = <0x0 0x0 0x0 0x3db>;
 611                         };
 612
 613                         mailbox: mailbox@404 {
 614                                 compatible = "amlogic,meson-gxbb-mhu";
 615                                 reg = <0 0x404 0 0x4c>;
 616                                 interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
 617                                              <0 209 IRQ_TYPE_EDGE_RISING>,
 618                                              <0 210 IRQ_TYPE_EDGE_RISING>;
 619                                 #mbox-cells = <1>;
 620                         };
 621                 };
 622
 623                 apb: apb@d0000000 {
 624                         compatible = "simple-bus";
 625                         reg = <0x0 0xd0000000 0x0 0x200000>;
 626                         #address-cells = <2>;
 627                         #size-cells = <2>;
 628                         ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
 629                 };
 630
 631                 usb0: usb@c9000000 {
 632                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
 633                         reg = <0x0 0xc9000000 0x0 0x40000>;
 634                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 635                         clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
 636                         clock-names = "otg";
 637                         phys = <&usb0_phy>;
 638                         phy-names = "usb2-phy";
 639                         dr_mode = "host";
 640                         status = "disabled";
 641                 };
 642
 643                 usb1: usb@c9100000 {
 644                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
 645                         reg = <0x0 0xc9100000 0x0 0x40000>;
 646                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
 648                         clock-names = "otg";
 649                         phys = <&usb1_phy>;
 650                         phy-names = "usb2-phy";
 651                         dr_mode = "host";
 652                         status = "disabled";
 653                 };
 654
 655                 ethmac: ethernet@c9410000 {
 656                         compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
 657                         reg = <0x0 0xc9410000 0x0 0x10000
 658                                0x0 0xc8834540 0x0 0x4>;
 659                         interrupts = <0 8 1>;
 660                         interrupt-names = "macirq";
 661                         clocks = <&clkc CLKID_ETH>,
 662                                  <&clkc CLKID_FCLK_DIV2>,
 663                                  <&clkc CLKID_MPLL2>;
 664                         clock-names = "stmmaceth", "clkin0", "clkin1";
 665                         phy-mode = "rgmii";
 666                         status = "disabled";
 667                 };
 668         };
 669 };