arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi

   1 /*
   2  * Copyright (C) 2016 Marvell Technology Group Ltd.
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPLv2 or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /*
  44  * Device Tree file for Marvell Armada CP110 Master.
  45  */
  46
  47 / {
  48         cp110-master {
  49                 #address-cells = <2>;
  50                 #size-cells = <2>;
  51                 compatible = "simple-bus";
  52                 interrupt-parent = <&gic>;
  53                 ranges;
  54
  55                 config-space {
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         compatible = "simple-bus";
  59                         interrupt-parent = <&gic>;
  60                         ranges = <0x0 0x0 0xf2000000 0x2000000>;
  61
  62                         cpm_syscon0: system-controller@440000 {
  63                                 compatible = "marvell,cp110-system-controller0",
  64                                              "syscon";
  65                                 reg = <0x440000 0x1000>;
  66                                 #clock-cells = <2>;
  67                                 core-clock-output-names =
  68                                         "cpm-apll", "cpm-ppv2-core", "cpm-eip",
  69                                         "cpm-core", "cpm-nand-core";
  70                                 gate-clock-output-names =
  71                                         "cpm-audio", "cpm-communit", "cpm-nand",
  72                                         "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
  73                                         "cpm-mg-core", "cpm-xor1", "cpm-xor0",
  74                                         "cpm-gop-dp", "none", "cpm-pcie_x10",
  75                                         "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
  76                                         "cpm-sata", "cpm-sata-usb", "cpm-main",
  77                                         "cpm-sd-mmc", "none", "none",
  78                                         "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
  79                                         "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
  80                         };
  81
  82                         cpm_sata0: sata@540000 {
  83                                 compatible = "marvell,armada-8k-ahci";
  84                                 reg = <0x540000 0x30000>;
  85                                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
  86                                 clocks = <&cpm_syscon0 1 15>;
  87                                 status = "disabled";
  88                         };
  89
  90                         cpm_usb3_0: usb3@500000 {
  91                                 compatible = "marvell,armada-8k-xhci",
  92                                              "generic-xhci";
  93                                 reg = <0x500000 0x4000>;
  94                                 dma-coherent;
  95                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
  96                                 clocks = <&cpm_syscon0 1 22>;
  97                                 status = "disabled";
  98                         };
  99
 100                         cpm_usb3_1: usb3@510000 {
 101                                 compatible = "marvell,armada-8k-xhci",
 102                                              "generic-xhci";
 103                                 reg = <0x510000 0x4000>;
 104                                 dma-coherent;
 105                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 106                                 clocks = <&cpm_syscon0 1 23>;
 107                                 status = "disabled";
 108                         };
 109
 110                         cpm_xor0: xor@6a0000 {
 111                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 112                                 reg = <0x6a0000 0x1000>,
 113                                       <0x6b0000 0x1000>;
 114                                 dma-coherent;
 115                                 msi-parent = <&gic_v2m0>;
 116                                 clocks = <&cpm_syscon0 1 8>;
 117                         };
 118
 119                         cpm_xor1: xor@6c0000 {
 120                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 121                                 reg = <0x6c0000 0x1000>,
 122                                       <0x6d0000 0x1000>;
 123                                 dma-coherent;
 124                                 msi-parent = <&gic_v2m0>;
 125                                 clocks = <&cpm_syscon0 1 7>;
 126                         };
 127
 128                         cpm_spi0: spi@700600 {
 129                                 compatible = "marvell,armada-380-spi";
 130                                 reg = <0x700600 0x50>;
 131                                 #address-cells = <0x1>;
 132                                 #size-cells = <0x0>;
 133                                 cell-index = <1>;
 134                                 clocks = <&cpm_syscon0 0 3>;
 135                                 status = "disabled";
 136                         };
 137
 138                         cpm_spi1: spi@700680 {
 139                                 compatible = "marvell,armada-380-spi";
 140                                 reg = <0x700680 0x50>;
 141                                 #address-cells = <1>;
 142                                 #size-cells = <0>;
 143                                 cell-index = <2>;
 144                                 clocks = <&cpm_syscon0 1 21>;
 145                                 status = "disabled";
 146                         };
 147
 148                         cpm_i2c0: i2c@701000 {
 149                                 compatible = "marvell,mv78230-i2c";
 150                                 reg = <0x701000 0x20>;
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 154                                 clocks = <&cpm_syscon0 1 21>;
 155                                 status = "disabled";
 156                         };
 157
 158                         cpm_i2c1: i2c@701100 {
 159                                 compatible = "marvell,mv78230-i2c";
 160                                 reg = <0x701100 0x20>;
 161                                 #address-cells = <1>;
 162                                 #size-cells = <0>;
 163                                 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 164                                 clocks = <&cpm_syscon0 1 21>;
 165                                 status = "disabled";
 166                         };
 167                 };
 168
 169                 cpm_pcie0: pcie@f2600000 {
 170                         compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 171                         reg = <0 0xf2600000 0 0x10000>,
 172                               <0 0xf6f00000 0 0x80000>;
 173                         reg-names = "ctrl", "config";
 174                         #address-cells = <3>;
 175                         #size-cells = <2>;
 176                         #interrupt-cells = <1>;
 177                         device_type = "pci";
 178                         dma-coherent;
 179                         msi-parent = <&gic_v2m0>;
 180
 181                         bus-range = <0 0xff>;
 182                         ranges =
 183                                 /* downstream I/O */
 184                                 <0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000
 185                                 /* non-prefetchable memory */
 186                                 0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;
 187                         interrupt-map-mask = <0 0 0 0>;
 188                         interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 189                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 190                         num-lanes = <1>;
 191                         clocks = <&cpm_syscon0 1 13>;
 192                         status = "disabled";
 193                 };
 194
 195                 cpm_pcie1: pcie@f2620000 {
 196                         compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 197                         reg = <0 0xf2620000 0 0x10000>,
 198                               <0 0xf7f00000 0 0x80000>;
 199                         reg-names = "ctrl", "config";
 200                         #address-cells = <3>;
 201                         #size-cells = <2>;
 202                         #interrupt-cells = <1>;
 203                         device_type = "pci";
 204                         dma-coherent;
 205                         msi-parent = <&gic_v2m0>;
 206
 207                         bus-range = <0 0xff>;
 208                         ranges =
 209                                 /* downstream I/O */
 210                                 <0x81000000 0 0xf9010000 0  0xf9010000 0 0x10000
 211                                 /* non-prefetchable memory */
 212                                 0x82000000 0 0xf7000000 0  0xf7000000 0 0xf00000>;
 213                         interrupt-map-mask = <0 0 0 0>;
 214                         interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 215                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 216
 217                         num-lanes = <1>;
 218                         clocks = <&cpm_syscon0 1 11>;
 219                         status = "disabled";
 220                 };
 221
 222                 cpm_pcie2: pcie@f2640000 {
 223                         compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 224                         reg = <0 0xf2640000 0 0x10000>,
 225                               <0 0xf8f00000 0 0x80000>;
 226                         reg-names = "ctrl", "config";
 227                         #address-cells = <3>;
 228                         #size-cells = <2>;
 229                         #interrupt-cells = <1>;
 230                         device_type = "pci";
 231                         dma-coherent;
 232                         msi-parent = <&gic_v2m0>;
 233
 234                         bus-range = <0 0xff>;
 235                         ranges =
 236                                 /* downstream I/O */
 237                                 <0x81000000 0 0xf9020000 0  0xf9020000 0 0x10000
 238                                 /* non-prefetchable memory */
 239                                 0x82000000 0 0xf8000000 0  0xf8000000 0 0xf00000>;
 240                         interrupt-map-mask = <0 0 0 0>;
 241                         interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 242                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 243
 244                         num-lanes = <1>;
 245                         clocks = <&cpm_syscon0 1 12>;
 246                         status = "disabled";
 247                 };
 248         };
 249 };