arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci-0.2";
  32                 method = "smc";
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a57_0: cpu@0 {
  40                         compatible = "arm,cortex-a57", "arm,armv8";
  41                         reg = <0x0>;
  42                         device_type = "cpu";
  43                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  44                         next-level-cache = <&L2_CA57>;
  45                         enable-method = "psci";
  46                 };
  47
  48                 a57_1: cpu@1 {
  49                         compatible = "arm,cortex-a57","arm,armv8";
  50                         reg = <0x1>;
  51                         device_type = "cpu";
  52                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  53                         next-level-cache = <&L2_CA57>;
  54                         enable-method = "psci";
  55                 };
  56
  57                 a57_2: cpu@2 {
  58                         compatible = "arm,cortex-a57","arm,armv8";
  59                         reg = <0x2>;
  60                         device_type = "cpu";
  61                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  62                         next-level-cache = <&L2_CA57>;
  63                         enable-method = "psci";
  64                 };
  65
  66                 a57_3: cpu@3 {
  67                         compatible = "arm,cortex-a57","arm,armv8";
  68                         reg = <0x3>;
  69                         device_type = "cpu";
  70                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  71                         next-level-cache = <&L2_CA57>;
  72                         enable-method = "psci";
  73                 };
  74
  75                 L2_CA57: cache-controller@0 {
  76                         compatible = "cache";
  77                         reg = <0>;
  78                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
  79                         cache-unified;
  80                         cache-level = <2>;
  81                 };
  82
  83                 L2_CA53: cache-controller@100 {
  84                         compatible = "cache";
  85                         reg = <0x100>;
  86                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
  87                         cache-unified;
  88                         cache-level = <2>;
  89                 };
  90         };
  91
  92         extal_clk: extal {
  93                 compatible = "fixed-clock";
  94                 #clock-cells = <0>;
  95                 /* This value must be overridden by the board */
  96                 clock-frequency = <0>;
  97         };
  98
  99         extalr_clk: extalr {
 100                 compatible = "fixed-clock";
 101                 #clock-cells = <0>;
 102                 /* This value must be overridden by the board */
 103                 clock-frequency = <0>;
 104         };
 105
 106         /*
 107          * The external audio clocks are configured as 0 Hz fixed frequency
 108          * clocks by default.
 109          * Boards that provide audio clocks should override them.
 110          */
 111         audio_clk_a: audio_clk_a {
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <0>;
 115         };
 116
 117         audio_clk_b: audio_clk_b {
 118                 compatible = "fixed-clock";
 119                 #clock-cells = <0>;
 120                 clock-frequency = <0>;
 121         };
 122
 123         audio_clk_c: audio_clk_c {
 124                 compatible = "fixed-clock";
 125                 #clock-cells = <0>;
 126                 clock-frequency = <0>;
 127         };
 128
 129         /* External CAN clock - to be overridden by boards that provide it */
 130         can_clk: can {
 131                 compatible = "fixed-clock";
 132                 #clock-cells = <0>;
 133                 clock-frequency = <0>;
 134         };
 135
 136         /* External SCIF clock - to be overridden by boards that provide it */
 137         scif_clk: scif {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 clock-frequency = <0>;
 141         };
 142
 143         /* External PCIe clock - can be overridden by the board */
 144         pcie_bus_clk: pcie_bus {
 145                 compatible = "fixed-clock";
 146                 #clock-cells = <0>;
 147                 clock-frequency = <0>;
 148         };
 149
 150         soc {
 151                 compatible = "simple-bus";
 152                 interrupt-parent = <&gic>;
 153
 154                 #address-cells = <2>;
 155                 #size-cells = <2>;
 156                 ranges;
 157
 158                 gic: interrupt-controller@f1010000 {
 159                         compatible = "arm,gic-400";
 160                         #interrupt-cells = <3>;
 161                         #address-cells = <0>;
 162                         interrupt-controller;
 163                         reg = <0x0 0xf1010000 0 0x1000>,
 164                               <0x0 0xf1020000 0 0x20000>,
 165                               <0x0 0xf1040000 0 0x20000>,
 166                               <0x0 0xf1060000 0 0x20000>;
 167                         interrupts = <GIC_PPI 9
 168                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 169                 };
 170
 171                 wdt0: watchdog@e6020000 {
 172                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 173                         reg = <0 0xe6020000 0 0x0c>;
 174                         clocks = <&cpg CPG_MOD 402>;
 175                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 176                         status = "disabled";
 177                 };
 178
 179                 gpio0: gpio@e6050000 {
 180                         compatible = "renesas,gpio-r8a7795",
 181                                      "renesas,gpio-rcar";
 182                         reg = <0 0xe6050000 0 0x50>;
 183                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 184                         #gpio-cells = <2>;
 185                         gpio-controller;
 186                         gpio-ranges = <&pfc 0 0 16>;
 187                         #interrupt-cells = <2>;
 188                         interrupt-controller;
 189                         clocks = <&cpg CPG_MOD 912>;
 190                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 191                 };
 192
 193                 gpio1: gpio@e6051000 {
 194                         compatible = "renesas,gpio-r8a7795",
 195                                      "renesas,gpio-rcar";
 196                         reg = <0 0xe6051000 0 0x50>;
 197                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 198                         #gpio-cells = <2>;
 199                         gpio-controller;
 200                         gpio-ranges = <&pfc 0 32 28>;
 201                         #interrupt-cells = <2>;
 202                         interrupt-controller;
 203                         clocks = <&cpg CPG_MOD 911>;
 204                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 205                 };
 206
 207                 gpio2: gpio@e6052000 {
 208                         compatible = "renesas,gpio-r8a7795",
 209                                      "renesas,gpio-rcar";
 210                         reg = <0 0xe6052000 0 0x50>;
 211                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 212                         #gpio-cells = <2>;
 213                         gpio-controller;
 214                         gpio-ranges = <&pfc 0 64 15>;
 215                         #interrupt-cells = <2>;
 216                         interrupt-controller;
 217                         clocks = <&cpg CPG_MOD 910>;
 218                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 219                 };
 220
 221                 gpio3: gpio@e6053000 {
 222                         compatible = "renesas,gpio-r8a7795",
 223                                      "renesas,gpio-rcar";
 224                         reg = <0 0xe6053000 0 0x50>;
 225                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 226                         #gpio-cells = <2>;
 227                         gpio-controller;
 228                         gpio-ranges = <&pfc 0 96 16>;
 229                         #interrupt-cells = <2>;
 230                         interrupt-controller;
 231                         clocks = <&cpg CPG_MOD 909>;
 232                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 233                 };
 234
 235                 gpio4: gpio@e6054000 {
 236                         compatible = "renesas,gpio-r8a7795",
 237                                      "renesas,gpio-rcar";
 238                         reg = <0 0xe6054000 0 0x50>;
 239                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 240                         #gpio-cells = <2>;
 241                         gpio-controller;
 242                         gpio-ranges = <&pfc 0 128 18>;
 243                         #interrupt-cells = <2>;
 244                         interrupt-controller;
 245                         clocks = <&cpg CPG_MOD 908>;
 246                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 247                 };
 248
 249                 gpio5: gpio@e6055000 {
 250                         compatible = "renesas,gpio-r8a7795",
 251                                      "renesas,gpio-rcar";
 252                         reg = <0 0xe6055000 0 0x50>;
 253                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 160 26>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 907>;
 260                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 261                 };
 262
 263                 gpio6: gpio@e6055400 {
 264                         compatible = "renesas,gpio-r8a7795",
 265                                      "renesas,gpio-rcar";
 266                         reg = <0 0xe6055400 0 0x50>;
 267                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 268                         #gpio-cells = <2>;
 269                         gpio-controller;
 270                         gpio-ranges = <&pfc 0 192 32>;
 271                         #interrupt-cells = <2>;
 272                         interrupt-controller;
 273                         clocks = <&cpg CPG_MOD 906>;
 274                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 275                 };
 276
 277                 gpio7: gpio@e6055800 {
 278                         compatible = "renesas,gpio-r8a7795",
 279                                      "renesas,gpio-rcar";
 280                         reg = <0 0xe6055800 0 0x50>;
 281                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 282                         #gpio-cells = <2>;
 283                         gpio-controller;
 284                         gpio-ranges = <&pfc 0 224 4>;
 285                         #interrupt-cells = <2>;
 286                         interrupt-controller;
 287                         clocks = <&cpg CPG_MOD 905>;
 288                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 289                 };
 290
 291                 pmu_a57 {
 292                         compatible = "arm,cortex-a57-pmu";
 293                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 294                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 295                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 296                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 297                         interrupt-affinity = <&a57_0>,
 298                                              <&a57_1>,
 299                                              <&a57_2>,
 300                                              <&a57_3>;
 301                 };
 302
 303                 timer {
 304                         compatible = "arm,armv8-timer";
 305                         interrupts = <GIC_PPI 13
 306                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 307                                      <GIC_PPI 14
 308                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 309                                      <GIC_PPI 11
 310                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 311                                      <GIC_PPI 10
 312                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 313                 };
 314
 315                 cpg: clock-controller@e6150000 {
 316                         compatible = "renesas,r8a7795-cpg-mssr";
 317                         reg = <0 0xe6150000 0 0x1000>;
 318                         clocks = <&extal_clk>, <&extalr_clk>;
 319                         clock-names = "extal", "extalr";
 320                         #clock-cells = <2>;
 321                         #power-domain-cells = <0>;
 322                 };
 323
 324                 sysc: system-controller@e6180000 {
 325                         compatible = "renesas,r8a7795-sysc";
 326                         reg = <0 0xe6180000 0 0x0400>;
 327                         #power-domain-cells = <1>;
 328                 };
 329
 330                 audma0: dma-controller@ec700000 {
 331                         compatible = "renesas,dmac-r8a7795",
 332                                      "renesas,rcar-dmac";
 333                         reg = <0 0xec700000 0 0x10000>;
 334                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 345                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 346                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 347                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 348                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 349                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 350                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 351                         interrupt-names = "error",
 352                                         "ch0", "ch1", "ch2", "ch3",
 353                                         "ch4", "ch5", "ch6", "ch7",
 354                                         "ch8", "ch9", "ch10", "ch11",
 355                                         "ch12", "ch13", "ch14", "ch15";
 356                         clocks = <&cpg CPG_MOD 502>;
 357                         clock-names = "fck";
 358                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 359                         #dma-cells = <1>;
 360                         dma-channels = <16>;
 361                 };
 362
 363                 audma1: dma-controller@ec720000 {
 364                         compatible = "renesas,dmac-r8a7795",
 365                                      "renesas,rcar-dmac";
 366                         reg = <0 0xec720000 0 0x10000>;
 367                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 368                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 369                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 371                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 372                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 373                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 374                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 375                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 376                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 377                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 378                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 379                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 380                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 381                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 382                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 383                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 384                         interrupt-names = "error",
 385                                         "ch0", "ch1", "ch2", "ch3",
 386                                         "ch4", "ch5", "ch6", "ch7",
 387                                         "ch8", "ch9", "ch10", "ch11",
 388                                         "ch12", "ch13", "ch14", "ch15";
 389                         clocks = <&cpg CPG_MOD 501>;
 390                         clock-names = "fck";
 391                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 392                         #dma-cells = <1>;
 393                         dma-channels = <16>;
 394                 };
 395
 396                 pfc: pfc@e6060000 {
 397                         compatible = "renesas,pfc-r8a7795";
 398                         reg = <0 0xe6060000 0 0x50c>;
 399                 };
 400
 401                 intc_ex: interrupt-controller@e61c0000 {
 402                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 403                         #interrupt-cells = <2>;
 404                         interrupt-controller;
 405                         reg = <0 0xe61c0000 0 0x200>;
 406                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 407                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 408                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 409                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 410                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 411                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 412                         clocks = <&cpg CPG_MOD 407>;
 413                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 414                 };
 415
 416                 dmac0: dma-controller@e6700000 {
 417                         compatible = "renesas,dmac-r8a7795",
 418                                      "renesas,rcar-dmac";
 419                         reg = <0 0xe6700000 0 0x10000>;
 420                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 421                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 422                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 423                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 424                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 425                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 437                         interrupt-names = "error",
 438                                         "ch0", "ch1", "ch2", "ch3",
 439                                         "ch4", "ch5", "ch6", "ch7",
 440                                         "ch8", "ch9", "ch10", "ch11",
 441                                         "ch12", "ch13", "ch14", "ch15";
 442                         clocks = <&cpg CPG_MOD 219>;
 443                         clock-names = "fck";
 444                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 445                         #dma-cells = <1>;
 446                         dma-channels = <16>;
 447                 };
 448
 449                 dmac1: dma-controller@e7300000 {
 450                         compatible = "renesas,dmac-r8a7795",
 451                                      "renesas,rcar-dmac";
 452                         reg = <0 0xe7300000 0 0x10000>;
 453                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 454                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 455                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 456                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 457                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 458                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 470                         interrupt-names = "error",
 471                                         "ch0", "ch1", "ch2", "ch3",
 472                                         "ch4", "ch5", "ch6", "ch7",
 473                                         "ch8", "ch9", "ch10", "ch11",
 474                                         "ch12", "ch13", "ch14", "ch15";
 475                         clocks = <&cpg CPG_MOD 218>;
 476                         clock-names = "fck";
 477                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 478                         #dma-cells = <1>;
 479                         dma-channels = <16>;
 480                 };
 481
 482                 dmac2: dma-controller@e7310000 {
 483                         compatible = "renesas,dmac-r8a7795",
 484                                      "renesas,rcar-dmac";
 485                         reg = <0 0xe7310000 0 0x10000>;
 486                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 487                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 488                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 489                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 490                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 491                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 492                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 493                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 494                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 497                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 498                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 503                         interrupt-names = "error",
 504                                         "ch0", "ch1", "ch2", "ch3",
 505                                         "ch4", "ch5", "ch6", "ch7",
 506                                         "ch8", "ch9", "ch10", "ch11",
 507                                         "ch12", "ch13", "ch14", "ch15";
 508                         clocks = <&cpg CPG_MOD 217>;
 509                         clock-names = "fck";
 510                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 511                         #dma-cells = <1>;
 512                         dma-channels = <16>;
 513                 };
 514
 515                 avb: ethernet@e6800000 {
 516                         compatible = "renesas,etheravb-r8a7795",
 517                                      "renesas,etheravb-rcar-gen3";
 518                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 519                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 521                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 522                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 523                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 524                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 525                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 526                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 527                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 528                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 529                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 532                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 533                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 534                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 535                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 536                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 537                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 538                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 539                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 540                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 541                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 542                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 543                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 544                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 545                                           "ch4", "ch5", "ch6", "ch7",
 546                                           "ch8", "ch9", "ch10", "ch11",
 547                                           "ch12", "ch13", "ch14", "ch15",
 548                                           "ch16", "ch17", "ch18", "ch19",
 549                                           "ch20", "ch21", "ch22", "ch23",
 550                                           "ch24";
 551                         clocks = <&cpg CPG_MOD 812>;
 552                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 553                         phy-mode = "rgmii-id";
 554                         #address-cells = <1>;
 555                         #size-cells = <0>;
 556                 };
 557
 558                 can0: can@e6c30000 {
 559                         compatible = "renesas,can-r8a7795",
 560                                      "renesas,rcar-gen3-can";
 561                         reg = <0 0xe6c30000 0 0x1000>;
 562                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 563                         clocks = <&cpg CPG_MOD 916>,
 564                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 565                                <&can_clk>;
 566                         clock-names = "clkp1", "clkp2", "can_clk";
 567                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 568                         assigned-clock-rates = <40000000>;
 569                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 570                         status = "disabled";
 571                 };
 572
 573                 can1: can@e6c38000 {
 574                         compatible = "renesas,can-r8a7795",
 575                                      "renesas,rcar-gen3-can";
 576                         reg = <0 0xe6c38000 0 0x1000>;
 577                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 578                         clocks = <&cpg CPG_MOD 915>,
 579                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 580                                <&can_clk>;
 581                         clock-names = "clkp1", "clkp2", "can_clk";
 582                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 583                         assigned-clock-rates = <40000000>;
 584                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 585                         status = "disabled";
 586                 };
 587
 588                 canfd: can@e66c0000 {
 589                         compatible = "renesas,r8a7795-canfd",
 590                                      "renesas,rcar-gen3-canfd";
 591                         reg = <0 0xe66c0000 0 0x8000>;
 592                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 593                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 594                         clocks = <&cpg CPG_MOD 914>,
 595                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 596                                <&can_clk>;
 597                         clock-names = "fck", "canfd", "can_clk";
 598                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 599                         assigned-clock-rates = <40000000>;
 600                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 601                         status = "disabled";
 602
 603                         channel0 {
 604                                 status = "disabled";
 605                         };
 606
 607                         channel1 {
 608                                 status = "disabled";
 609                         };
 610                 };
 611
 612                 hscif0: serial@e6540000 {
 613                         compatible = "renesas,hscif-r8a7795",
 614                                      "renesas,rcar-gen3-hscif",
 615                                      "renesas,hscif";
 616                         reg = <0 0xe6540000 0 96>;
 617                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 618                         clocks = <&cpg CPG_MOD 520>,
 619                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 620                                  <&scif_clk>;
 621                         clock-names = "fck", "brg_int", "scif_clk";
 622                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 623                         dma-names = "tx", "rx";
 624                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 625                         status = "disabled";
 626                 };
 627
 628                 hscif1: serial@e6550000 {
 629                         compatible = "renesas,hscif-r8a7795",
 630                                      "renesas,rcar-gen3-hscif",
 631                                      "renesas,hscif";
 632                         reg = <0 0xe6550000 0 96>;
 633                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 634                         clocks = <&cpg CPG_MOD 519>,
 635                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 636                                  <&scif_clk>;
 637                         clock-names = "fck", "brg_int", "scif_clk";
 638                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 639                         dma-names = "tx", "rx";
 640                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 641                         status = "disabled";
 642                 };
 643
 644                 hscif2: serial@e6560000 {
 645                         compatible = "renesas,hscif-r8a7795",
 646                                      "renesas,rcar-gen3-hscif",
 647                                      "renesas,hscif";
 648                         reg = <0 0xe6560000 0 96>;
 649                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 650                         clocks = <&cpg CPG_MOD 518>,
 651                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 652                                  <&scif_clk>;
 653                         clock-names = "fck", "brg_int", "scif_clk";
 654                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 655                         dma-names = "tx", "rx";
 656                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 657                         status = "disabled";
 658                 };
 659
 660                 hscif3: serial@e66a0000 {
 661                         compatible = "renesas,hscif-r8a7795",
 662                                      "renesas,rcar-gen3-hscif",
 663                                      "renesas,hscif";
 664                         reg = <0 0xe66a0000 0 96>;
 665                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 666                         clocks = <&cpg CPG_MOD 517>,
 667                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 668                                  <&scif_clk>;
 669                         clock-names = "fck", "brg_int", "scif_clk";
 670                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 671                         dma-names = "tx", "rx";
 672                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 673                         status = "disabled";
 674                 };
 675
 676                 hscif4: serial@e66b0000 {
 677                         compatible = "renesas,hscif-r8a7795",
 678                                      "renesas,rcar-gen3-hscif",
 679                                      "renesas,hscif";
 680                         reg = <0 0xe66b0000 0 96>;
 681                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 682                         clocks = <&cpg CPG_MOD 516>,
 683                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 684                                  <&scif_clk>;
 685                         clock-names = "fck", "brg_int", "scif_clk";
 686                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 687                         dma-names = "tx", "rx";
 688                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 689                         status = "disabled";
 690                 };
 691
 692                 scif0: serial@e6e60000 {
 693                         compatible = "renesas,scif-r8a7795",
 694                                      "renesas,rcar-gen3-scif", "renesas,scif";
 695                         reg = <0 0xe6e60000 0 64>;
 696                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 697                         clocks = <&cpg CPG_MOD 207>,
 698                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 699                                  <&scif_clk>;
 700                         clock-names = "fck", "brg_int", "scif_clk";
 701                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 702                         dma-names = "tx", "rx";
 703                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 704                         status = "disabled";
 705                 };
 706
 707                 scif1: serial@e6e68000 {
 708                         compatible = "renesas,scif-r8a7795",
 709                                      "renesas,rcar-gen3-scif", "renesas,scif";
 710                         reg = <0 0xe6e68000 0 64>;
 711                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 712                         clocks = <&cpg CPG_MOD 206>,
 713                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 714                                  <&scif_clk>;
 715                         clock-names = "fck", "brg_int", "scif_clk";
 716                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 717                         dma-names = "tx", "rx";
 718                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 719                         status = "disabled";
 720                 };
 721
 722                 scif2: serial@e6e88000 {
 723                         compatible = "renesas,scif-r8a7795",
 724                                      "renesas,rcar-gen3-scif", "renesas,scif";
 725                         reg = <0 0xe6e88000 0 64>;
 726                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 727                         clocks = <&cpg CPG_MOD 310>,
 728                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 729                                  <&scif_clk>;
 730                         clock-names = "fck", "brg_int", "scif_clk";
 731                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 732                         dma-names = "tx", "rx";
 733                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 734                         status = "disabled";
 735                 };
 736
 737                 scif3: serial@e6c50000 {
 738                         compatible = "renesas,scif-r8a7795",
 739                                      "renesas,rcar-gen3-scif", "renesas,scif";
 740                         reg = <0 0xe6c50000 0 64>;
 741                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 742                         clocks = <&cpg CPG_MOD 204>,
 743                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 744                                  <&scif_clk>;
 745                         clock-names = "fck", "brg_int", "scif_clk";
 746                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 747                         dma-names = "tx", "rx";
 748                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 749                         status = "disabled";
 750                 };
 751
 752                 scif4: serial@e6c40000 {
 753                         compatible = "renesas,scif-r8a7795",
 754                                      "renesas,rcar-gen3-scif", "renesas,scif";
 755                         reg = <0 0xe6c40000 0 64>;
 756                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 757                         clocks = <&cpg CPG_MOD 203>,
 758                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 759                                  <&scif_clk>;
 760                         clock-names = "fck", "brg_int", "scif_clk";
 761                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 762                         dma-names = "tx", "rx";
 763                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 764                         status = "disabled";
 765                 };
 766
 767                 scif5: serial@e6f30000 {
 768                         compatible = "renesas,scif-r8a7795",
 769                                      "renesas,rcar-gen3-scif", "renesas,scif";
 770                         reg = <0 0xe6f30000 0 64>;
 771                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 772                         clocks = <&cpg CPG_MOD 202>,
 773                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 774                                  <&scif_clk>;
 775                         clock-names = "fck", "brg_int", "scif_clk";
 776                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 777                         dma-names = "tx", "rx";
 778                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 779                         status = "disabled";
 780                 };
 781
 782                 i2c0: i2c@e6500000 {
 783                         #address-cells = <1>;
 784                         #size-cells = <0>;
 785                         compatible = "renesas,i2c-r8a7795";
 786                         reg = <0 0xe6500000 0 0x40>;
 787                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 788                         clocks = <&cpg CPG_MOD 931>;
 789                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 790                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 791                         dma-names = "tx", "rx";
 792                         i2c-scl-internal-delay-ns = <110>;
 793                         status = "disabled";
 794                 };
 795
 796                 i2c1: i2c@e6508000 {
 797                         #address-cells = <1>;
 798                         #size-cells = <0>;
 799                         compatible = "renesas,i2c-r8a7795";
 800                         reg = <0 0xe6508000 0 0x40>;
 801                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 802                         clocks = <&cpg CPG_MOD 930>;
 803                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 804                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 805                         dma-names = "tx", "rx";
 806                         i2c-scl-internal-delay-ns = <6>;
 807                         status = "disabled";
 808                 };
 809
 810                 i2c2: i2c@e6510000 {
 811                         #address-cells = <1>;
 812                         #size-cells = <0>;
 813                         compatible = "renesas,i2c-r8a7795";
 814                         reg = <0 0xe6510000 0 0x40>;
 815                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 816                         clocks = <&cpg CPG_MOD 929>;
 817                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 818                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 819                         dma-names = "tx", "rx";
 820                         i2c-scl-internal-delay-ns = <6>;
 821                         status = "disabled";
 822                 };
 823
 824                 i2c3: i2c@e66d0000 {
 825                         #address-cells = <1>;
 826                         #size-cells = <0>;
 827                         compatible = "renesas,i2c-r8a7795";
 828                         reg = <0 0xe66d0000 0 0x40>;
 829                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 830                         clocks = <&cpg CPG_MOD 928>;
 831                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 832                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 833                         dma-names = "tx", "rx";
 834                         i2c-scl-internal-delay-ns = <110>;
 835                         status = "disabled";
 836                 };
 837
 838                 i2c4: i2c@e66d8000 {
 839                         #address-cells = <1>;
 840                         #size-cells = <0>;
 841                         compatible = "renesas,i2c-r8a7795";
 842                         reg = <0 0xe66d8000 0 0x40>;
 843                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 844                         clocks = <&cpg CPG_MOD 927>;
 845                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 846                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 847                         dma-names = "tx", "rx";
 848                         i2c-scl-internal-delay-ns = <110>;
 849                         status = "disabled";
 850                 };
 851
 852                 i2c5: i2c@e66e0000 {
 853                         #address-cells = <1>;
 854                         #size-cells = <0>;
 855                         compatible = "renesas,i2c-r8a7795";
 856                         reg = <0 0xe66e0000 0 0x40>;
 857                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 858                         clocks = <&cpg CPG_MOD 919>;
 859                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 860                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 861                         dma-names = "tx", "rx";
 862                         i2c-scl-internal-delay-ns = <110>;
 863                         status = "disabled";
 864                 };
 865
 866                 i2c6: i2c@e66e8000 {
 867                         #address-cells = <1>;
 868                         #size-cells = <0>;
 869                         compatible = "renesas,i2c-r8a7795";
 870                         reg = <0 0xe66e8000 0 0x40>;
 871                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 872                         clocks = <&cpg CPG_MOD 918>;
 873                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 874                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 875                         dma-names = "tx", "rx";
 876                         i2c-scl-internal-delay-ns = <6>;
 877                         status = "disabled";
 878                 };
 879
 880                 rcar_sound: sound@ec500000 {
 881                         /*
 882                          * #sound-dai-cells is required
 883                          *
 884                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 885                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 886                          */
 887                         /*
 888                          * #clock-cells is required for audio_clkout0/1/2/3
 889                          *
 890                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 891                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 892                          */
 893                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 894                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 895                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 896                                 <0 0xec540000 0 0x1000>, /* SSIU */
 897                                 <0 0xec541000 0 0x280>,  /* SSI */
 898                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 899                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 900
 901                         clocks = <&cpg CPG_MOD 1005>,
 902                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 903                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 904                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 905                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 906                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 907                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 908                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 909                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 910                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 911                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 912                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 913                                  <&audio_clk_a>, <&audio_clk_b>,
 914                                  <&audio_clk_c>,
 915                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 916                         clock-names = "ssi-all",
 917                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 918                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 919                                       "ssi.1", "ssi.0",
 920                                       "src.9", "src.8", "src.7", "src.6",
 921                                       "src.5", "src.4", "src.3", "src.2",
 922                                       "src.1", "src.0",
 923                                       "dvc.0", "dvc.1",
 924                                       "clk_a", "clk_b", "clk_c", "clk_i";
 925                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 926                         status = "disabled";
 927
 928                         rcar_sound,dvc {
 929                                 dvc0: dvc-0 {
 930                                         dmas = <&audma0 0xbc>;
 931                                         dma-names = "tx";
 932                                 };
 933                                 dvc1: dvc-1 {
 934                                         dmas = <&audma0 0xbe>;
 935                                         dma-names = "tx";
 936                                 };
 937                         };
 938
 939                         rcar_sound,src {
 940                                 src0: src-0 {
 941                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 942                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 943                                         dma-names = "rx", "tx";
 944                                 };
 945                                 src1: src-1 {
 946                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 947                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 948                                         dma-names = "rx", "tx";
 949                                 };
 950                                 src2: src-2 {
 951                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 952                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 953                                         dma-names = "rx", "tx";
 954                                 };
 955                                 src3: src-3 {
 956                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 957                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 958                                         dma-names = "rx", "tx";
 959                                 };
 960                                 src4: src-4 {
 961                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 962                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 963                                         dma-names = "rx", "tx";
 964                                 };
 965                                 src5: src-5 {
 966                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 967                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 968                                         dma-names = "rx", "tx";
 969                                 };
 970                                 src6: src-6 {
 971                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 972                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 973                                         dma-names = "rx", "tx";
 974                                 };
 975                                 src7: src-7 {
 976                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 977                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 978                                         dma-names = "rx", "tx";
 979                                 };
 980                                 src8: src-8 {
 981                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 982                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 983                                         dma-names = "rx", "tx";
 984                                 };
 985                                 src9: src-9 {
 986                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 987                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 988                                         dma-names = "rx", "tx";
 989                                 };
 990                         };
 991
 992                         rcar_sound,ssi {
 993                                 ssi0: ssi-0 {
 994                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
 995                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
 996                                         dma-names = "rx", "tx", "rxu", "txu";
 997                                 };
 998                                 ssi1: ssi-1 {
 999                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1000                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1001                                         dma-names = "rx", "tx", "rxu", "txu";
1002                                 };
1003                                 ssi2: ssi-2 {
1004                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1005                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1006                                         dma-names = "rx", "tx", "rxu", "txu";
1007                                 };
1008                                 ssi3: ssi-3 {
1009                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1010                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1011                                         dma-names = "rx", "tx", "rxu", "txu";
1012                                 };
1013                                 ssi4: ssi-4 {
1014                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1015                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1016                                         dma-names = "rx", "tx", "rxu", "txu";
1017                                 };
1018                                 ssi5: ssi-5 {
1019                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1020                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1021                                         dma-names = "rx", "tx", "rxu", "txu";
1022                                 };
1023                                 ssi6: ssi-6 {
1024                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1025                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1026                                         dma-names = "rx", "tx", "rxu", "txu";
1027                                 };
1028                                 ssi7: ssi-7 {
1029                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1030                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1031                                         dma-names = "rx", "tx", "rxu", "txu";
1032                                 };
1033                                 ssi8: ssi-8 {
1034                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1035                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1036                                         dma-names = "rx", "tx", "rxu", "txu";
1037                                 };
1038                                 ssi9: ssi-9 {
1039                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1040                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1041                                         dma-names = "rx", "tx", "rxu", "txu";
1042                                 };
1043                         };
1044                 };
1045
1046                 sata: sata@ee300000 {
1047                         compatible = "renesas,sata-r8a7795";
1048                         reg = <0 0xee300000 0 0x1fff>;
1049                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1050                         clocks = <&cpg CPG_MOD 815>;
1051                         status = "disabled";
1052                 };
1053
1054                 xhci0: usb@ee000000 {
1055                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1056                         reg = <0 0xee000000 0 0xc00>;
1057                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1058                         clocks = <&cpg CPG_MOD 328>;
1059                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1060                         status = "disabled";
1061                 };
1062
1063                 xhci1: usb@ee0400000 {
1064                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1065                         reg = <0 0xee040000 0 0xc00>;
1066                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1067                         clocks = <&cpg CPG_MOD 327>;
1068                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1069                         status = "disabled";
1070                 };
1071
1072                 usb_dmac0: dma-controller@e65a0000 {
1073                         compatible = "renesas,r8a7795-usb-dmac",
1074                                      "renesas,usb-dmac";
1075                         reg = <0 0xe65a0000 0 0x100>;
1076                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1077                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1078                         interrupt-names = "ch0", "ch1";
1079                         clocks = <&cpg CPG_MOD 330>;
1080                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1081                         #dma-cells = <1>;
1082                         dma-channels = <2>;
1083                 };
1084
1085                 usb_dmac1: dma-controller@e65b0000 {
1086                         compatible = "renesas,r8a7795-usb-dmac",
1087                                      "renesas,usb-dmac";
1088                         reg = <0 0xe65b0000 0 0x100>;
1089                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1090                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1091                         interrupt-names = "ch0", "ch1";
1092                         clocks = <&cpg CPG_MOD 331>;
1093                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1094                         #dma-cells = <1>;
1095                         dma-channels = <2>;
1096                 };
1097
1098                 sdhi0: sd@ee100000 {
1099                         compatible = "renesas,sdhi-r8a7795";
1100                         reg = <0 0xee100000 0 0x2000>;
1101                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1102                         clocks = <&cpg CPG_MOD 314>;
1103                         max-frequency = <200000000>;
1104                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1105                         status = "disabled";
1106                 };
1107
1108                 sdhi1: sd@ee120000 {
1109                         compatible = "renesas,sdhi-r8a7795";
1110                         reg = <0 0xee120000 0 0x2000>;
1111                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1112                         clocks = <&cpg CPG_MOD 313>;
1113                         max-frequency = <200000000>;
1114                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1115                         status = "disabled";
1116                 };
1117
1118                 sdhi2: sd@ee140000 {
1119                         compatible = "renesas,sdhi-r8a7795";
1120                         reg = <0 0xee140000 0 0x2000>;
1121                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1122                         clocks = <&cpg CPG_MOD 312>;
1123                         max-frequency = <200000000>;
1124                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1125                         status = "disabled";
1126                 };
1127
1128                 sdhi3: sd@ee160000 {
1129                         compatible = "renesas,sdhi-r8a7795";
1130                         reg = <0 0xee160000 0 0x2000>;
1131                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1132                         clocks = <&cpg CPG_MOD 311>;
1133                         max-frequency = <200000000>;
1134                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1135                         status = "disabled";
1136                 };
1137
1138                 usb2_phy0: usb-phy@ee080200 {
1139                         compatible = "renesas,usb2-phy-r8a7795";
1140                         reg = <0 0xee080200 0 0x700>;
1141                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1142                         clocks = <&cpg CPG_MOD 703>;
1143                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1144                         #phy-cells = <0>;
1145                         status = "disabled";
1146                 };
1147
1148                 usb2_phy1: usb-phy@ee0a0200 {
1149                         compatible = "renesas,usb2-phy-r8a7795";
1150                         reg = <0 0xee0a0200 0 0x700>;
1151                         clocks = <&cpg CPG_MOD 702>;
1152                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1153                         #phy-cells = <0>;
1154                         status = "disabled";
1155                 };
1156
1157                 usb2_phy2: usb-phy@ee0c0200 {
1158                         compatible = "renesas,usb2-phy-r8a7795";
1159                         reg = <0 0xee0c0200 0 0x700>;
1160                         clocks = <&cpg CPG_MOD 701>;
1161                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1162                         #phy-cells = <0>;
1163                         status = "disabled";
1164                 };
1165
1166                 ehci0: usb@ee080100 {
1167                         compatible = "generic-ehci";
1168                         reg = <0 0xee080100 0 0x100>;
1169                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1170                         clocks = <&cpg CPG_MOD 703>;
1171                         phys = <&usb2_phy0>;
1172                         phy-names = "usb";
1173                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1174                         status = "disabled";
1175                 };
1176
1177                 ehci1: usb@ee0a0100 {
1178                         compatible = "generic-ehci";
1179                         reg = <0 0xee0a0100 0 0x100>;
1180                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1181                         clocks = <&cpg CPG_MOD 702>;
1182                         phys = <&usb2_phy1>;
1183                         phy-names = "usb";
1184                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1185                         status = "disabled";
1186                 };
1187
1188                 ehci2: usb@ee0c0100 {
1189                         compatible = "generic-ehci";
1190                         reg = <0 0xee0c0100 0 0x100>;
1191                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1192                         clocks = <&cpg CPG_MOD 701>;
1193                         phys = <&usb2_phy2>;
1194                         phy-names = "usb";
1195                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1196                         status = "disabled";
1197                 };
1198
1199                 ohci0: usb@ee080000 {
1200                         compatible = "generic-ohci";
1201                         reg = <0 0xee080000 0 0x100>;
1202                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1203                         clocks = <&cpg CPG_MOD 703>;
1204                         phys = <&usb2_phy0>;
1205                         phy-names = "usb";
1206                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1207                         status = "disabled";
1208                 };
1209
1210                 ohci1: usb@ee0a0000 {
1211                         compatible = "generic-ohci";
1212                         reg = <0 0xee0a0000 0 0x100>;
1213                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1214                         clocks = <&cpg CPG_MOD 702>;
1215                         phys = <&usb2_phy1>;
1216                         phy-names = "usb";
1217                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1218                         status = "disabled";
1219                 };
1220
1221                 ohci2: usb@ee0c0000 {
1222                         compatible = "generic-ohci";
1223                         reg = <0 0xee0c0000 0 0x100>;
1224                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1225                         clocks = <&cpg CPG_MOD 701>;
1226                         phys = <&usb2_phy2>;
1227                         phy-names = "usb";
1228                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1229                         status = "disabled";
1230                 };
1231
1232                 hsusb: usb@e6590000 {
1233                         compatible = "renesas,usbhs-r8a7795",
1234                                      "renesas,rcar-gen3-usbhs";
1235                         reg = <0 0xe6590000 0 0x100>;
1236                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1237                         clocks = <&cpg CPG_MOD 704>;
1238                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1239                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1240                         dma-names = "ch0", "ch1", "ch2", "ch3";
1241                         renesas,buswait = <11>;
1242                         phys = <&usb2_phy0>;
1243                         phy-names = "usb";
1244                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1245                         status = "disabled";
1246                 };
1247
1248                 pciec0: pcie@fe000000 {
1249                         compatible = "renesas,pcie-r8a7795";
1250                         reg = <0 0xfe000000 0 0x80000>;
1251                         #address-cells = <3>;
1252                         #size-cells = <2>;
1253                         bus-range = <0x00 0xff>;
1254                         device_type = "pci";
1255                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1256                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1257                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1258                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1259                         /* Map all possible DDR as inbound ranges */
1260                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1261                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1262                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1263                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1264                         #interrupt-cells = <1>;
1265                         interrupt-map-mask = <0 0 0 0>;
1266                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1267                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1268                         clock-names = "pcie", "pcie_bus";
1269                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1270                         status = "disabled";
1271                 };
1272
1273                 pciec1: pcie@ee800000 {
1274                         compatible = "renesas,pcie-r8a7795";
1275                         reg = <0 0xee800000 0 0x80000>;
1276                         #address-cells = <3>;
1277                         #size-cells = <2>;
1278                         bus-range = <0x00 0xff>;
1279                         device_type = "pci";
1280                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1281                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1282                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1283                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1284                         /* Map all possible DDR as inbound ranges */
1285                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1286                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1287                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1288                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1289                         #interrupt-cells = <1>;
1290                         interrupt-map-mask = <0 0 0 0>;
1291                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1292                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1293                         clock-names = "pcie", "pcie_bus";
1294                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1295                         status = "disabled";
1296                 };
1297
1298                 vspbc: vsp@fe920000 {
1299                         compatible = "renesas,vsp2";
1300                         reg = <0 0xfe920000 0 0x8000>;
1301                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1302                         clocks = <&cpg CPG_MOD 624>;
1303                         power-domains = <&sysc R8A7795_PD_A3VP>;
1304
1305                         renesas,fcp = <&fcpvb1>;
1306                 };
1307
1308                 fcpvb1: fcp@fe92f000 {
1309                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1310                         reg = <0 0xfe92f000 0 0x200>;
1311                         clocks = <&cpg CPG_MOD 606>;
1312                         power-domains = <&sysc R8A7795_PD_A3VP>;
1313                 };
1314
1315                 fcpf0: fcp@fe950000 {
1316                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1317                         reg = <0 0xfe950000 0 0x200>;
1318                         clocks = <&cpg CPG_MOD 615>;
1319                         power-domains = <&sysc R8A7795_PD_A3VP>;
1320                 };
1321
1322                 fcpf1: fcp@fe951000 {
1323                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1324                         reg = <0 0xfe951000 0 0x200>;
1325                         clocks = <&cpg CPG_MOD 614>;
1326                         power-domains = <&sysc R8A7795_PD_A3VP>;
1327                 };
1328
1329                 fcpf2: fcp@fe952000 {
1330                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1331                         reg = <0 0xfe952000 0 0x200>;
1332                         clocks = <&cpg CPG_MOD 613>;
1333                         power-domains = <&sysc R8A7795_PD_A3VP>;
1334                 };
1335
1336                 vspbd: vsp@fe960000 {
1337                         compatible = "renesas,vsp2";
1338                         reg = <0 0xfe960000 0 0x8000>;
1339                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1340                         clocks = <&cpg CPG_MOD 626>;
1341                         power-domains = <&sysc R8A7795_PD_A3VP>;
1342
1343                         renesas,fcp = <&fcpvb0>;
1344                 };
1345
1346                 fcpvb0: fcp@fe96f000 {
1347                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1348                         reg = <0 0xfe96f000 0 0x200>;
1349                         clocks = <&cpg CPG_MOD 607>;
1350                         power-domains = <&sysc R8A7795_PD_A3VP>;
1351                 };
1352
1353                 vspi0: vsp@fe9a0000 {
1354                         compatible = "renesas,vsp2";
1355                         reg = <0 0xfe9a0000 0 0x8000>;
1356                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1357                         clocks = <&cpg CPG_MOD 631>;
1358                         power-domains = <&sysc R8A7795_PD_A3VP>;
1359
1360                         renesas,fcp = <&fcpvi0>;
1361                 };
1362
1363                 fcpvi0: fcp@fe9af000 {
1364                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1365                         reg = <0 0xfe9af000 0 0x200>;
1366                         clocks = <&cpg CPG_MOD 611>;
1367                         power-domains = <&sysc R8A7795_PD_A3VP>;
1368                 };
1369
1370                 vspi1: vsp@fe9b0000 {
1371                         compatible = "renesas,vsp2";
1372                         reg = <0 0xfe9b0000 0 0x8000>;
1373                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1374                         clocks = <&cpg CPG_MOD 630>;
1375                         power-domains = <&sysc R8A7795_PD_A3VP>;
1376
1377                         renesas,fcp = <&fcpvi1>;
1378                 };
1379
1380                 fcpvi1: fcp@fe9bf000 {
1381                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1382                         reg = <0 0xfe9bf000 0 0x200>;
1383                         clocks = <&cpg CPG_MOD 610>;
1384                         power-domains = <&sysc R8A7795_PD_A3VP>;
1385                 };
1386
1387                 vspi2: vsp@fe9c0000 {
1388                         compatible = "renesas,vsp2";
1389                         reg = <0 0xfe9c0000 0 0x8000>;
1390                         interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1391                         clocks = <&cpg CPG_MOD 629>;
1392                         power-domains = <&sysc R8A7795_PD_A3VP>;
1393
1394                         renesas,fcp = <&fcpvi2>;
1395                 };
1396
1397                 fcpvi2: fcp@fe9cf000 {
1398                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1399                         reg = <0 0xfe9cf000 0 0x200>;
1400                         clocks = <&cpg CPG_MOD 609>;
1401                         power-domains = <&sysc R8A7795_PD_A3VP>;
1402                 };
1403
1404                 vspd0: vsp@fea20000 {
1405                         compatible = "renesas,vsp2";
1406                         reg = <0 0xfea20000 0 0x4000>;
1407                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1408                         clocks = <&cpg CPG_MOD 623>;
1409                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1410
1411                         renesas,fcp = <&fcpvd0>;
1412                 };
1413
1414                 fcpvd0: fcp@fea27000 {
1415                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1416                         reg = <0 0xfea27000 0 0x200>;
1417                         clocks = <&cpg CPG_MOD 603>;
1418                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1419                 };
1420
1421                 vspd1: vsp@fea28000 {
1422                         compatible = "renesas,vsp2";
1423                         reg = <0 0xfea28000 0 0x4000>;
1424                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1425                         clocks = <&cpg CPG_MOD 622>;
1426                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1427
1428                         renesas,fcp = <&fcpvd1>;
1429                 };
1430
1431                 fcpvd1: fcp@fea2f000 {
1432                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1433                         reg = <0 0xfea2f000 0 0x200>;
1434                         clocks = <&cpg CPG_MOD 602>;
1435                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1436                 };
1437
1438                 vspd2: vsp@fea30000 {
1439                         compatible = "renesas,vsp2";
1440                         reg = <0 0xfea30000 0 0x4000>;
1441                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1442                         clocks = <&cpg CPG_MOD 621>;
1443                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1444
1445                         renesas,fcp = <&fcpvd2>;
1446                 };
1447
1448                 fcpvd2: fcp@fea37000 {
1449                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1450                         reg = <0 0xfea37000 0 0x200>;
1451                         clocks = <&cpg CPG_MOD 601>;
1452                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1453                 };
1454
1455                 vspd3: vsp@fea38000 {
1456                         compatible = "renesas,vsp2";
1457                         reg = <0 0xfea38000 0 0x4000>;
1458                         interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1459                         clocks = <&cpg CPG_MOD 620>;
1460                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1461
1462                         renesas,fcp = <&fcpvd3>;
1463                 };
1464
1465                 fcpvd3: fcp@fea3f000 {
1466                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1467                         reg = <0 0xfea3f000 0 0x200>;
1468                         clocks = <&cpg CPG_MOD 600>;
1469                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1470                 };
1471
1472                 fdp1@fe940000 {
1473                         compatible = "renesas,fdp1";
1474                         reg = <0 0xfe940000 0 0x2400>;
1475                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1476                         clocks = <&cpg CPG_MOD 119>;
1477                         power-domains = <&sysc R8A7795_PD_A3VP>;
1478                         renesas,fcp = <&fcpf0>;
1479                 };
1480
1481                 fdp1@fe944000 {
1482                         compatible = "renesas,fdp1";
1483                         reg = <0 0xfe944000 0 0x2400>;
1484                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1485                         clocks = <&cpg CPG_MOD 118>;
1486                         power-domains = <&sysc R8A7795_PD_A3VP>;
1487                         renesas,fcp = <&fcpf1>;
1488                 };
1489
1490                 fdp1@fe948000 {
1491                         compatible = "renesas,fdp1";
1492                         reg = <0 0xfe948000 0 0x2400>;
1493                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1494                         clocks = <&cpg CPG_MOD 117>;
1495                         power-domains = <&sysc R8A7795_PD_A3VP>;
1496                         renesas,fcp = <&fcpf2>;
1497                 };
1498
1499                 du: display@feb00000 {
1500                         compatible = "renesas,du-r8a7795";
1501                         reg = <0 0xfeb00000 0 0x80000>,
1502                               <0 0xfeb90000 0 0x14>;
1503                         reg-names = "du", "lvds.0";
1504                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1505                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1506                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1507                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1508                         clocks = <&cpg CPG_MOD 724>,
1509                                  <&cpg CPG_MOD 723>,
1510                                  <&cpg CPG_MOD 722>,
1511                                  <&cpg CPG_MOD 721>,
1512                                  <&cpg CPG_MOD 727>;
1513                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1514                         status = "disabled";
1515
1516                         vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1517
1518                         ports {
1519                                 #address-cells = <1>;
1520                                 #size-cells = <0>;
1521
1522                                 port@0 {
1523                                         reg = <0>;
1524                                         du_out_rgb: endpoint {
1525                                         };
1526                                 };
1527                                 port@1 {
1528                                         reg = <1>;
1529                                         du_out_hdmi0: endpoint {
1530                                         };
1531                                 };
1532                                 port@2 {
1533                                         reg = <2>;
1534                                         du_out_hdmi1: endpoint {
1535                                         };
1536                                 };
1537                                 port@3 {
1538                                         reg = <3>;
1539                                         du_out_lvds0: endpoint {
1540                                         };
1541                                 };
1542                         };
1543                 };
1544         };
1545 };