arch/mips/boot/dts/bcm3384.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm3384", "brcm,bcm33843";
   5
   6         cpus {
   7                 #address-cells = <1>;
   8                 #size-cells = <0>;
   9
  10                 /* On BMIPS5000 this is 1/8th of the CPU core clock */
  11                 mips-hpt-frequency = <100000000>;
  12
  13                 cpu@0 {
  14                         compatible = "brcm,bmips5000";
  15                         device_type = "cpu";
  16                         reg = <0>;
  17                 };
  18
  19                 cpu@1 {
  20                         compatible = "brcm,bmips5000";
  21                         device_type = "cpu";
  22                         reg = <1>;
  23                 };
  24         };
  25
  26         clocks {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 periph_clk: periph_clk@0 {
  31                         compatible = "fixed-clock";
  32                         #clock-cells = <0>;
  33                         clock-frequency = <54000000>;
  34                 };
  35         };
  36
  37         aliases {
  38                 uart0 = &uart0;
  39         };
  40
  41         cpu_intc: cpu_intc@0 {
  42                 #address-cells = <0>;
  43                 compatible = "mti,cpu-interrupt-controller";
  44
  45                 interrupt-controller;
  46                 #interrupt-cells = <1>;
  47         };
  48
  49         periph_intc: periph_intc@14e00038 {
  50                 compatible = "brcm,bcm3384-intc";
  51                 reg = <0x14e00038 0x8 0x14e00340 0x8>;
  52
  53                 interrupt-controller;
  54                 #interrupt-cells = <1>;
  55
  56                 interrupt-parent = <&cpu_intc>;
  57                 interrupts = <4>;
  58         };
  59
  60         zmips_intc: zmips_intc@104b0060 {
  61                 compatible = "brcm,bcm3384-intc";
  62                 reg = <0x104b0060 0x8>;
  63
  64                 interrupt-controller;
  65                 #interrupt-cells = <1>;
  66
  67                 interrupt-parent = <&periph_intc>;
  68                 interrupts = <29>;
  69         };
  70
  71         iop_intc: iop_intc@14e00058 {
  72                 compatible = "brcm,bcm3384-intc";
  73                 reg = <0x14e00058 0x8>;
  74
  75                 interrupt-controller;
  76                 #interrupt-cells = <1>;
  77
  78                 interrupt-parent = <&cpu_intc>;
  79                 interrupts = <6>;
  80         };
  81
  82         uart0: serial@14e00520 {
  83                 compatible = "brcm,bcm6345-uart";
  84                 reg = <0x14e00520 0x18>;
  85                 interrupt-parent = <&periph_intc>;
  86                 interrupts = <2>;
  87                 clocks = <&periph_clk>;
  88                 status = "disabled";
  89         };
  90
  91         ehci0: usb@15400300 {
  92                 compatible = "brcm,bcm3384-ehci", "generic-ehci";
  93                 reg = <0x15400300 0x100>;
  94                 big-endian;
  95                 interrupt-parent = <&periph_intc>;
  96                 interrupts = <41>;
  97                 status = "disabled";
  98         };
  99
 100         ohci0: usb@15400400 {
 101                 compatible = "brcm,bcm3384-ohci", "generic-ohci";
 102                 reg = <0x15400400 0x100>;
 103                 big-endian;
 104                 no-big-frame-no;
 105                 interrupt-parent = <&periph_intc>;
 106                 interrupts = <40>;
 107                 status = "disabled";
 108         };
 109 };