arch/mips/include/asm/octeon/octeon-feature.h

   1 /***********************license start***************
   2  * Author: Cavium Networks
   3  *
   4  * Contact: support@caviumnetworks.com
   5  * This file is part of the OCTEON SDK
   6  *
   7  * Copyright (c) 2003-2008 Cavium Networks
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this file; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22  * or visit http://www.gnu.org/licenses/.
  23  *
  24  * This file may also be available under a different license from Cavium.
  25  * Contact Cavium Networks for more information
  26  ***********************license end**************************************/
  27
  28 /*
  29  * File defining checks for different Octeon features.
  30  */
  31
  32 #ifndef __OCTEON_FEATURE_H__
  33 #define __OCTEON_FEATURE_H__
  34 #include <asm/octeon/cvmx-mio-defs.h>
  35 #include <asm/octeon/cvmx-rnm-defs.h>
  36
  37 enum octeon_feature {
  38         /* CN68XX uses port kinds for packet interface */
  39         OCTEON_FEATURE_PKND,
  40         /* CN68XX has different fields in word0 - word2 */
  41         OCTEON_FEATURE_CN68XX_WQE,
  42         /*
  43          * Octeon models in the CN5XXX family and higher support
  44          * atomic add instructions to memory (saa/saad).
  45          */
  46         OCTEON_FEATURE_SAAD,
  47         /* Does this Octeon support the ZIP offload engine? */
  48         OCTEON_FEATURE_ZIP,
  49         /* Does this Octeon support crypto acceleration using COP2? */
  50         OCTEON_FEATURE_CRYPTO,
  51         OCTEON_FEATURE_DORM_CRYPTO,
  52         /* Does this Octeon support PCI express? */
  53         OCTEON_FEATURE_PCIE,
  54         /* Does this Octeon support SRIOs */
  55         OCTEON_FEATURE_SRIO,
  56         /*  Does this Octeon support Interlaken */
  57         OCTEON_FEATURE_ILK,
  58         /* Some Octeon models support internal memory for storing
  59          * cryptographic keys */
  60         OCTEON_FEATURE_KEY_MEMORY,
  61         /* Octeon has a LED controller for banks of external LEDs */
  62         OCTEON_FEATURE_LED_CONTROLLER,
  63         /* Octeon has a trace buffer */
  64         OCTEON_FEATURE_TRA,
  65         /* Octeon has a management port */
  66         OCTEON_FEATURE_MGMT_PORT,
  67         /* Octeon has a raid unit */
  68         OCTEON_FEATURE_RAID,
  69         /* Octeon has a builtin USB */
  70         OCTEON_FEATURE_USB,
  71         /* Octeon IPD can run without using work queue entries */
  72         OCTEON_FEATURE_NO_WPTR,
  73         /* Octeon has DFA state machines */
  74         OCTEON_FEATURE_DFA,
  75         /* Octeon MDIO block supports clause 45 transactions for 10
  76          * Gig support */
  77         OCTEON_FEATURE_MDIO_CLAUSE_45,
  78         /*
  79          *  CN52XX and CN56XX used a block named NPEI for PCIe
  80          *  access. Newer chips replaced this with SLI+DPI.
  81          */
  82         OCTEON_FEATURE_NPEI,
  83         OCTEON_FEATURE_HFA,
  84         OCTEON_FEATURE_DFM,
  85         OCTEON_FEATURE_CIU2,
  86         OCTEON_MAX_FEATURE
  87 };
  88
  89 /**
  90  * Determine if the current Octeon supports a specific feature. These
  91  * checks have been optimized to be fairly quick, but they should still
  92  * be kept out of fast path code.
  93  *
  94  * @feature: Feature to check for. This should always be a constant so the
  95  *                compiler can remove the switch statement through optimization.
  96  *
  97  * Returns Non zero if the feature exists. Zero if the feature does not
  98  *         exist.
  99  */
 100 static inline int octeon_has_feature(enum octeon_feature feature)
 101 {
 102         switch (feature) {
 103         case OCTEON_FEATURE_SAAD:
 104                 return !OCTEON_IS_MODEL(OCTEON_CN3XXX);
 105
 106         case OCTEON_FEATURE_DORM_CRYPTO:
 107                 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
 108                         union cvmx_mio_fus_dat2 fus_2;
 109                         fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
 110                         return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto;
 111                 } else {
 112                         return 0;
 113                 }
 114
 115         case OCTEON_FEATURE_PCIE:
 116                 return OCTEON_IS_MODEL(OCTEON_CN56XX)
 117                         || OCTEON_IS_MODEL(OCTEON_CN52XX)
 118                         || OCTEON_IS_MODEL(OCTEON_CN6XXX);
 119
 120         case OCTEON_FEATURE_SRIO:
 121                 return OCTEON_IS_MODEL(OCTEON_CN63XX)
 122                         || OCTEON_IS_MODEL(OCTEON_CN66XX);
 123
 124         case OCTEON_FEATURE_ILK:
 125                 return (OCTEON_IS_MODEL(OCTEON_CN68XX));
 126
 127         case OCTEON_FEATURE_KEY_MEMORY:
 128                 return OCTEON_IS_MODEL(OCTEON_CN38XX)
 129                         || OCTEON_IS_MODEL(OCTEON_CN58XX)
 130                         || OCTEON_IS_MODEL(OCTEON_CN56XX)
 131                         || OCTEON_IS_MODEL(OCTEON_CN6XXX);
 132
 133         case OCTEON_FEATURE_LED_CONTROLLER:
 134                 return OCTEON_IS_MODEL(OCTEON_CN38XX)
 135                         || OCTEON_IS_MODEL(OCTEON_CN58XX)
 136                         || OCTEON_IS_MODEL(OCTEON_CN56XX);
 137
 138         case OCTEON_FEATURE_TRA:
 139                 return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
 140                          || OCTEON_IS_MODEL(OCTEON_CN50XX));
 141         case OCTEON_FEATURE_MGMT_PORT:
 142                 return OCTEON_IS_MODEL(OCTEON_CN56XX)
 143                         || OCTEON_IS_MODEL(OCTEON_CN52XX)
 144                         || OCTEON_IS_MODEL(OCTEON_CN6XXX);
 145
 146         case OCTEON_FEATURE_RAID:
 147                 return OCTEON_IS_MODEL(OCTEON_CN56XX)
 148                         || OCTEON_IS_MODEL(OCTEON_CN52XX)
 149                         || OCTEON_IS_MODEL(OCTEON_CN6XXX);
 150
 151         case OCTEON_FEATURE_USB:
 152                 return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
 153                          || OCTEON_IS_MODEL(OCTEON_CN58XX));
 154
 155         case OCTEON_FEATURE_NO_WPTR:
 156                 return (OCTEON_IS_MODEL(OCTEON_CN56XX)
 157                         || OCTEON_IS_MODEL(OCTEON_CN52XX)
 158                         || OCTEON_IS_MODEL(OCTEON_CN6XXX))
 159                           && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
 160                           && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);
 161
 162         case OCTEON_FEATURE_MDIO_CLAUSE_45:
 163                 return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
 164                          || OCTEON_IS_MODEL(OCTEON_CN58XX)
 165                          || OCTEON_IS_MODEL(OCTEON_CN50XX));
 166
 167         case OCTEON_FEATURE_NPEI:
 168                 return OCTEON_IS_MODEL(OCTEON_CN56XX)
 169                         || OCTEON_IS_MODEL(OCTEON_CN52XX);
 170
 171         case OCTEON_FEATURE_PKND:
 172                 return OCTEON_IS_MODEL(OCTEON_CN68XX);
 173
 174         case OCTEON_FEATURE_CN68XX_WQE:
 175                 return OCTEON_IS_MODEL(OCTEON_CN68XX);
 176
 177         case OCTEON_FEATURE_CIU2:
 178                 return OCTEON_IS_MODEL(OCTEON_CN68XX);
 179
 180         default:
 181                 break;
 182         }
 183         return 0;
 184 }
 185
 186 #endif /* __OCTEON_FEATURE_H__ */