2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * A small micro-assembler. It is intentionally kept simple, does only
7 * support a subset of instructions, and does not try to hide pipeline
8 * effects like branch delay slots.
10 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
11 * Copyright (C) 2005, 2007 Maciej W. Rozycki
12 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
13 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
36 #define IMM_MASK 0xffff
38 #define JIMM_MASK 0x3ffffff
40 #define FUNC_MASK 0x3f
47 insn_addiu, insn_addu, insn_and, insn_andi, insn_bbit0, insn_bbit1,
48 insn_beq, insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl,
49 insn_bne, insn_cache, insn_daddiu, insn_daddu, insn_dins, insn_dinsm,
50 insn_divu, insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll,
51 insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret,
52 insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_lb,
53 insn_ld, insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw,
54 insn_lwx, insn_mfc0, insn_mfhc0, insn_mfhi, insn_mflo, insn_mtc0,
55 insn_mthc0, insn_mul, insn_or, insn_ori, insn_pref, insn_rfe,
56 insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, insn_slt,
57 insn_sltiu, insn_sltu, insn_sra, insn_srl, insn_srlv, insn_subu,
58 insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi,
59 insn_tlbwr, insn_wait, insn_wsbh, insn_xor, insn_xori, insn_yield,
68 static inline u32 build_rs(u32 arg)
70 WARN(arg & ~RS_MASK, KERN_WARNING "Micro-assembler field overflow\n");
72 return (arg & RS_MASK) << RS_SH;
75 static inline u32 build_rt(u32 arg)
77 WARN(arg & ~RT_MASK, KERN_WARNING "Micro-assembler field overflow\n");
79 return (arg & RT_MASK) << RT_SH;
82 static inline u32 build_rd(u32 arg)
84 WARN(arg & ~RD_MASK, KERN_WARNING "Micro-assembler field overflow\n");
86 return (arg & RD_MASK) << RD_SH;
89 static inline u32 build_re(u32 arg)
91 WARN(arg & ~RE_MASK, KERN_WARNING "Micro-assembler field overflow\n");
93 return (arg & RE_MASK) << RE_SH;
96 static inline u32 build_simm(s32 arg)
98 WARN(arg > 0x7fff || arg < -0x8000,
99 KERN_WARNING "Micro-assembler field overflow\n");
104 static inline u32 build_uimm(u32 arg)
106 WARN(arg & ~IMM_MASK, KERN_WARNING "Micro-assembler field overflow\n");
108 return arg & IMM_MASK;
111 static inline u32 build_scimm(u32 arg)
113 WARN(arg & ~SCIMM_MASK,
114 KERN_WARNING "Micro-assembler field overflow\n");
116 return (arg & SCIMM_MASK) << SCIMM_SH;
119 static inline u32 build_func(u32 arg)
121 WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n");
123 return arg & FUNC_MASK;
126 static inline u32 build_set(u32 arg)
128 WARN(arg & ~SET_MASK, KERN_WARNING "Micro-assembler field overflow\n");
130 return arg & SET_MASK;
133 static void build_insn(u32 **buf, enum opcode opc, ...);
135 #define I_u1u2u3(op) \
138 build_insn(buf, insn##op, a, b, c); \
140 UASM_EXPORT_SYMBOL(uasm_i##op);
142 #define I_s3s1s2(op) \
145 build_insn(buf, insn##op, b, c, a); \
147 UASM_EXPORT_SYMBOL(uasm_i##op);
149 #define I_u2u1u3(op) \
152 build_insn(buf, insn##op, b, a, c); \
154 UASM_EXPORT_SYMBOL(uasm_i##op);
156 #define I_u3u2u1(op) \
159 build_insn(buf, insn##op, c, b, a); \
161 UASM_EXPORT_SYMBOL(uasm_i##op);
163 #define I_u3u1u2(op) \
166 build_insn(buf, insn##op, b, c, a); \
168 UASM_EXPORT_SYMBOL(uasm_i##op);
170 #define I_u1u2s3(op) \
173 build_insn(buf, insn##op, a, b, c); \
175 UASM_EXPORT_SYMBOL(uasm_i##op);
177 #define I_u2s3u1(op) \
180 build_insn(buf, insn##op, c, a, b); \
182 UASM_EXPORT_SYMBOL(uasm_i##op);
184 #define I_u2u1s3(op) \
187 build_insn(buf, insn##op, b, a, c); \
189 UASM_EXPORT_SYMBOL(uasm_i##op);
191 #define I_u2u1msbu3(op) \
194 build_insn(buf, insn##op, b, a, c+d-1, c); \
196 UASM_EXPORT_SYMBOL(uasm_i##op);
198 #define I_u2u1msb32u3(op) \
201 build_insn(buf, insn##op, b, a, c+d-33, c); \
203 UASM_EXPORT_SYMBOL(uasm_i##op);
205 #define I_u2u1msbdu3(op) \
208 build_insn(buf, insn##op, b, a, d-1, c); \
210 UASM_EXPORT_SYMBOL(uasm_i##op);
215 build_insn(buf, insn##op, a, b); \
217 UASM_EXPORT_SYMBOL(uasm_i##op);
222 build_insn(buf, insn##op, b, a); \
224 UASM_EXPORT_SYMBOL(uasm_i##op);
229 build_insn(buf, insn##op, a, b); \
231 UASM_EXPORT_SYMBOL(uasm_i##op);
236 build_insn(buf, insn##op, a); \
238 UASM_EXPORT_SYMBOL(uasm_i##op);
243 build_insn(buf, insn##op); \
245 UASM_EXPORT_SYMBOL(uasm_i##op);
321 I_u2u1msb32u3(_dinsm);
328 #ifdef CONFIG_CPU_CAVIUM_OCTEON
329 #include <asm/octeon/octeon.h>
330 void ISAFUNC(uasm_i_pref)(u32 **buf, unsigned int a, signed int b,
333 if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X) && a <= 24 && a != 5)
335 * As per erratum Core-14449, replace prefetches 0-4,
336 * 6-24 with 'pref 28'.
338 build_insn(buf, insn_pref, c, 28, b);
340 build_insn(buf, insn_pref, c, a, b);
342 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_i_pref));
348 void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr, int lid)
354 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_build_label));
356 int ISAFUNC(uasm_in_compat_space_p)(long addr)
358 /* Is this address in 32bit compat space? */
360 return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L);
365 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_in_compat_space_p));
367 static int uasm_rel_highest(long val)
370 return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
376 static int uasm_rel_higher(long val)
379 return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
385 int ISAFUNC(uasm_rel_hi)(long val)
387 return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000;
389 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_rel_hi));
391 int ISAFUNC(uasm_rel_lo)(long val)
393 return ((val & 0xffff) ^ 0x8000) - 0x8000;
395 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_rel_lo));
397 void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr)
399 if (!ISAFUNC(uasm_in_compat_space_p)(addr)) {
400 ISAFUNC(uasm_i_lui)(buf, rs, uasm_rel_highest(addr));
401 if (uasm_rel_higher(addr))
402 ISAFUNC(uasm_i_daddiu)(buf, rs, rs, uasm_rel_higher(addr));
403 if (ISAFUNC(uasm_rel_hi(addr))) {
404 ISAFUNC(uasm_i_dsll)(buf, rs, rs, 16);
405 ISAFUNC(uasm_i_daddiu)(buf, rs, rs,
406 ISAFUNC(uasm_rel_hi)(addr));
407 ISAFUNC(uasm_i_dsll)(buf, rs, rs, 16);
409 ISAFUNC(uasm_i_dsll32)(buf, rs, rs, 0);
411 ISAFUNC(uasm_i_lui)(buf, rs, ISAFUNC(uasm_rel_hi(addr)));
413 UASM_EXPORT_SYMBOL(ISAFUNC(UASM_i_LA_mostly));
415 void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr)
417 ISAFUNC(UASM_i_LA_mostly)(buf, rs, addr);
418 if (ISAFUNC(uasm_rel_lo(addr))) {
419 if (!ISAFUNC(uasm_in_compat_space_p)(addr))
420 ISAFUNC(uasm_i_daddiu)(buf, rs, rs,
421 ISAFUNC(uasm_rel_lo(addr)));
423 ISAFUNC(uasm_i_addiu)(buf, rs, rs,
424 ISAFUNC(uasm_rel_lo(addr)));
427 UASM_EXPORT_SYMBOL(ISAFUNC(UASM_i_LA));
429 /* Handle relocations. */
430 void ISAFUNC(uasm_r_mips_pc16)(struct uasm_reloc **rel, u32 *addr, int lid)
433 (*rel)->type = R_MIPS_PC16;
437 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_r_mips_pc16));
439 static inline void __resolve_relocs(struct uasm_reloc *rel,
440 struct uasm_label *lab);
442 void ISAFUNC(uasm_resolve_relocs)(struct uasm_reloc *rel,
443 struct uasm_label *lab)
445 struct uasm_label *l;
447 for (; rel->lab != UASM_LABEL_INVALID; rel++)
448 for (l = lab; l->lab != UASM_LABEL_INVALID; l++)
449 if (rel->lab == l->lab)
450 __resolve_relocs(rel, l);
452 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_resolve_relocs));
454 void ISAFUNC(uasm_move_relocs)(struct uasm_reloc *rel, u32 *first, u32 *end,
457 for (; rel->lab != UASM_LABEL_INVALID; rel++)
458 if (rel->addr >= first && rel->addr < end)
461 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_move_relocs));
463 void ISAFUNC(uasm_move_labels)(struct uasm_label *lab, u32 *first, u32 *end,
466 for (; lab->lab != UASM_LABEL_INVALID; lab++)
467 if (lab->addr >= first && lab->addr < end)
470 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_move_labels));
472 void ISAFUNC(uasm_copy_handler)(struct uasm_reloc *rel, struct uasm_label *lab,
473 u32 *first, u32 *end, u32 *target)
475 long off = (long)(target - first);
477 memcpy(target, first, (end - first) * sizeof(u32));
479 ISAFUNC(uasm_move_relocs(rel, first, end, off));
480 ISAFUNC(uasm_move_labels(lab, first, end, off));
482 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_copy_handler));
484 int ISAFUNC(uasm_insn_has_bdelay)(struct uasm_reloc *rel, u32 *addr)
486 for (; rel->lab != UASM_LABEL_INVALID; rel++) {
487 if (rel->addr == addr
488 && (rel->type == R_MIPS_PC16
489 || rel->type == R_MIPS_26))
495 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_insn_has_bdelay));
497 /* Convenience functions for labeled branches. */
498 void ISAFUNC(uasm_il_bltz)(u32 **p, struct uasm_reloc **r, unsigned int reg,
501 uasm_r_mips_pc16(r, *p, lid);
502 ISAFUNC(uasm_i_bltz)(p, reg, 0);
504 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bltz));
506 void ISAFUNC(uasm_il_b)(u32 **p, struct uasm_reloc **r, int lid)
508 uasm_r_mips_pc16(r, *p, lid);
509 ISAFUNC(uasm_i_b)(p, 0);
511 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_b));
513 void ISAFUNC(uasm_il_beq)(u32 **p, struct uasm_reloc **r, unsigned int r1,
514 unsigned int r2, int lid)
516 uasm_r_mips_pc16(r, *p, lid);
517 ISAFUNC(uasm_i_beq)(p, r1, r2, 0);
519 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_beq));
521 void ISAFUNC(uasm_il_beqz)(u32 **p, struct uasm_reloc **r, unsigned int reg,
524 uasm_r_mips_pc16(r, *p, lid);
525 ISAFUNC(uasm_i_beqz)(p, reg, 0);
527 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_beqz));
529 void ISAFUNC(uasm_il_beqzl)(u32 **p, struct uasm_reloc **r, unsigned int reg,
532 uasm_r_mips_pc16(r, *p, lid);
533 ISAFUNC(uasm_i_beqzl)(p, reg, 0);
535 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_beqzl));
537 void ISAFUNC(uasm_il_bne)(u32 **p, struct uasm_reloc **r, unsigned int reg1,
538 unsigned int reg2, int lid)
540 uasm_r_mips_pc16(r, *p, lid);
541 ISAFUNC(uasm_i_bne)(p, reg1, reg2, 0);
543 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bne));
545 void ISAFUNC(uasm_il_bnez)(u32 **p, struct uasm_reloc **r, unsigned int reg,
548 uasm_r_mips_pc16(r, *p, lid);
549 ISAFUNC(uasm_i_bnez)(p, reg, 0);
551 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bnez));
553 void ISAFUNC(uasm_il_bgezl)(u32 **p, struct uasm_reloc **r, unsigned int reg,
556 uasm_r_mips_pc16(r, *p, lid);
557 ISAFUNC(uasm_i_bgezl)(p, reg, 0);
559 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bgezl));
561 void ISAFUNC(uasm_il_bgez)(u32 **p, struct uasm_reloc **r, unsigned int reg,
564 uasm_r_mips_pc16(r, *p, lid);
565 ISAFUNC(uasm_i_bgez)(p, reg, 0);
567 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bgez));
569 void ISAFUNC(uasm_il_bbit0)(u32 **p, struct uasm_reloc **r, unsigned int reg,
570 unsigned int bit, int lid)
572 uasm_r_mips_pc16(r, *p, lid);
573 ISAFUNC(uasm_i_bbit0)(p, reg, bit, 0);
575 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bbit0));
577 void ISAFUNC(uasm_il_bbit1)(u32 **p, struct uasm_reloc **r, unsigned int reg,
578 unsigned int bit, int lid)
580 uasm_r_mips_pc16(r, *p, lid);
581 ISAFUNC(uasm_i_bbit1)(p, reg, bit, 0);
583 UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bbit1));