arch/mips/mti-sead3/sead3-platform.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
   7  */
   8 #include <linux/module.h>
   9 #include <linux/init.h>
  10 #include <linux/irqchip/mips-gic.h>
  11 #include <linux/serial_8250.h>
  12
  13 #include <asm/mips-boards/sead3int.h>
  14
  15 #define UART(base)                                                      \
  16 {                                                                       \
  17         .mapbase        = base,                                         \
  18         .irq            = -1,                                           \
  19         .uartclk        = 14745600,                                     \
  20         .iotype         = UPIO_MEM32,                                   \
  21         .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, \
  22         .regshift       = 2,                                            \
  23 }
  24
  25 static struct plat_serial8250_port uart8250_data[] = {
  26         UART(0x1f000900),   /* ttyS0 = USB   */
  27         UART(0x1f000800),   /* ttyS1 = RS232 */
  28         { },
  29 };
  30
  31 static struct platform_device uart8250_device = {
  32         .name                   = "serial8250",
  33         .id                     = PLAT8250_DEV_PLATFORM2,
  34         .dev                    = {
  35                 .platform_data  = uart8250_data,
  36         },
  37 };
  38
  39 static int __init uart8250_init(void)
  40 {
  41         if (gic_present) {
  42                 uart8250_data[0].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART0;
  43                 uart8250_data[1].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART1;
  44         } else {
  45                 uart8250_data[0].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART0;
  46                 uart8250_data[1].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART1;
  47         }
  48         return platform_device_register(&uart8250_device);
  49 }
  50
  51 module_init(uart8250_init);
  52
  53 MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
  54 MODULE_LICENSE("GPL");
  55 MODULE_DESCRIPTION("8250 UART probe driver for SEAD3");