2 * T1040 Silicon/SoC Device Tree Source (post include)
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38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <25 2 0 0>;
43 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
47 bus-range = <0x0 0xff>;
48 interrupts = <20 2 0 0>;
49 fsl,iommu-parent = <&pamu0>;
52 #interrupt-cells = <1>;
56 interrupts = <20 2 0 0>;
57 interrupt-map-mask = <0xf800 0 0 7>;
60 0000 0 0 1 &mpic 40 1 0 0
61 0000 0 0 2 &mpic 1 1 0 0
62 0000 0 0 3 &mpic 2 1 0 0
63 0000 0 0 4 &mpic 3 1 0 0
69 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
74 interrupts = <21 2 0 0>;
75 fsl,iommu-parent = <&pamu0>;
78 #interrupt-cells = <1>;
82 interrupts = <21 2 0 0>;
83 interrupt-map-mask = <0xf800 0 0 7>;
86 0000 0 0 1 &mpic 41 1 0 0
87 0000 0 0 2 &mpic 5 1 0 0
88 0000 0 0 3 &mpic 6 1 0 0
89 0000 0 0 4 &mpic 7 1 0 0
95 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
99 bus-range = <0x0 0xff>;
100 interrupts = <22 2 0 0>;
101 fsl,iommu-parent = <&pamu0>;
104 #interrupt-cells = <1>;
106 #address-cells = <3>;
108 interrupts = <22 2 0 0>;
109 interrupt-map-mask = <0xf800 0 0 7>;
112 0000 0 0 1 &mpic 42 1 0 0
113 0000 0 0 2 &mpic 9 1 0 0
114 0000 0 0 3 &mpic 10 1 0 0
115 0000 0 0 4 &mpic 11 1 0 0
121 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
124 #address-cells = <3>;
125 bus-range = <0x0 0xff>;
126 interrupts = <23 2 0 0>;
127 fsl,iommu-parent = <&pamu0>;
130 #interrupt-cells = <1>;
132 #address-cells = <3>;
134 interrupts = <23 2 0 0>;
135 interrupt-map-mask = <0xf800 0 0 7>;
138 0000 0 0 1 &mpic 43 1 0 0
139 0000 0 0 2 &mpic 0 1 0 0
140 0000 0 0 3 &mpic 4 1 0 0
141 0000 0 0 4 &mpic 8 1 0 0
147 #address-cells = <1>;
149 compatible = "fsl,dcsr", "simple-bus";
152 compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu";
153 interrupts = <52 2 0 0
159 compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc";
160 reg = <0x1000 0x1000 0x1002000 0x10000>;
163 compatible = "fsl,dcsr-nxc";
164 reg = <0x2000 0x1000>;
167 compatible = "fsl,dcsr-corenet";
168 reg = <0x8000 0x1000 0x1A000 0x1000>;
171 compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa";
172 reg = <0x9000 0x1000>;
175 compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn";
176 reg = <0x11000 0x1000>;
179 compatible = "fsl,dcsr-ddr";
180 dev-handle = <&ddr1>;
181 reg = <0x12000 0x1000>;
184 compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal";
185 reg = <0x18000 0x1000>;
188 compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm";
189 reg = <0x22000 0x1000>;
192 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
193 reg = <0x30000 0x1000 0x1022000 0x10000>;
196 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
197 reg = <0x31000 0x1000 0x1042000 0x10000>;
199 dcsr-cpu-sb-proxy@100000 {
200 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
201 cpu-handle = <&cpu0>;
202 reg = <0x100000 0x1000 0x101000 0x1000>;
204 dcsr-cpu-sb-proxy@108000 {
205 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
206 cpu-handle = <&cpu1>;
207 reg = <0x108000 0x1000 0x109000 0x1000>;
209 dcsr-cpu-sb-proxy@110000 {
210 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
211 cpu-handle = <&cpu2>;
212 reg = <0x110000 0x1000 0x111000 0x1000>;
214 dcsr-cpu-sb-proxy@118000 {
215 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
216 cpu-handle = <&cpu3>;
217 reg = <0x118000 0x1000 0x119000 0x1000>;
222 #address-cells = <1>;
225 compatible = "simple-bus";
228 compatible = "fsl,soc-sram-error";
229 interrupts = <16 2 1 29>;
233 compatible = "fsl,corenet-law";
238 ddr1: memory-controller@8000 {
239 compatible = "fsl,qoriq-memory-controller-v5.0",
240 "fsl,qoriq-memory-controller";
241 reg = <0x8000 0x1000>;
242 interrupts = <16 2 1 23>;
245 cpc: l3-cache-controller@10000 {
246 compatible = "fsl,t1040-l3-cache-controller", "cache";
247 reg = <0x10000 0x1000>;
248 interrupts = <16 2 1 27>;
252 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
253 reg = <0x18000 0x1000>;
254 interrupts = <16 2 1 31>;
255 fsl,ccf-num-csdids = <32>;
256 fsl,ccf-num-snoopids = <32>;
260 compatible = "fsl,pamu-v1.0", "fsl,pamu";
261 reg = <0x20000 0x1000>;
262 ranges = <0 0x20000 0x1000>;
263 #address-cells = <1>;
270 fsl,primary-cache-geometry = <128 1>;
271 fsl,secondary-cache-geometry = <16 2>;
275 /include/ "qoriq-mpic.dtsi"
277 guts: global-utilities@e0000 {
278 compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0";
279 reg = <0xe0000 0xe00>;
281 fsl,liodn-bits = <12>;
284 /include/ "qoriq-clockgen2.dtsi"
285 global-utilities@e1000 {
286 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
291 compatible = "fsl,qoriq-core-mux-2.0";
292 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
293 <&pll1 0>, <&pll1 1>, <&pll1 2>;
294 clock-names = "pll0", "pll0-div2", "pll1-div4",
295 "pll1", "pll1-div2", "pll1-div4";
296 clock-output-names = "cmux0";
302 compatible = "fsl,qoriq-core-mux-2.0";
303 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
304 <&pll1 0>, <&pll1 1>, <&pll1 2>;
305 clock-names = "pll0", "pll0-div2", "pll1-div4",
306 "pll1", "pll1-div2", "pll1-div4";
307 clock-output-names = "cmux1";
313 compatible = "fsl,qoriq-core-mux-2.0";
314 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
315 <&pll1 0>, <&pll1 1>, <&pll1 2>;
316 clock-names = "pll0", "pll0-div2", "pll1-div4",
317 "pll1", "pll1-div2", "pll1-div4";
318 clock-output-names = "cmux2";
324 compatible = "fsl,qoriq-core-mux-2.0";
325 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
326 <&pll1 0>, <&pll1 1>, <&pll1 2>;
327 clock-names = "pll0_0", "pll0_1", "pll0_2",
328 "pll1_0", "pll1_1", "pll1_2";
329 clock-output-names = "cmux3";
333 rcpm: global-utilities@e2000 {
334 compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.0";
335 reg = <0xe2000 0x1000>;
339 compatible = "fsl,t1040-sfp";
340 reg = <0xe8000 0x1000>;
343 serdes: serdes@ea000 {
344 compatible = "fsl,t1040-serdes";
345 reg = <0xea000 0x4000>;
348 /include/ "elo3-dma-0.dtsi"
349 /include/ "elo3-dma-1.dtsi"
350 /include/ "qoriq-espi-0.dtsi"
352 fsl,espi-num-chipselects = <4>;
355 /include/ "qoriq-esdhc-0.dtsi"
357 compatible = "fsl,t1040-esdhc", "fsl,esdhc";
358 fsl,iommu-parent = <&pamu0>;
359 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
362 /include/ "qoriq-i2c-0.dtsi"
363 /include/ "qoriq-i2c-1.dtsi"
364 /include/ "qoriq-duart-0.dtsi"
365 /include/ "qoriq-duart-1.dtsi"
366 /include/ "qoriq-gpio-0.dtsi"
367 /include/ "qoriq-gpio-1.dtsi"
368 /include/ "qoriq-gpio-2.dtsi"
369 /include/ "qoriq-gpio-3.dtsi"
370 /include/ "qoriq-usb2-mph-0.dtsi"
372 compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
373 fsl,iommu-parent = <&pamu0>;
374 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
378 /include/ "qoriq-usb2-dr-0.dtsi"
380 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
381 fsl,iommu-parent = <&pamu0>;
382 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
388 compatible = "fsl,t1040-diu", "fsl,diu";
389 reg = <0x180000 1000>;
390 interrupts = <74 2 0 0>;
393 /include/ "qoriq-sata2-0.dtsi"
395 fsl,iommu-parent = <&pamu0>;
396 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
398 /include/ "qoriq-sata2-1.dtsi"
400 fsl,iommu-parent = <&pamu0>;
401 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
403 /include/ "qoriq-sec5.0-0.dtsi"