arch/powerpc/boot/dts/t4240emu.dts

   1 /*
   2  * T4240 emulator Device Tree Source
   3  *
   4  * Copyright 2013 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /dts-v1/;
  36
  37 /include/ "fsl/e6500_power_isa.dtsi"
  38 / {
  39         compatible = "fsl,T4240";
  40         #address-cells = <2>;
  41         #size-cells = <2>;
  42         interrupt-parent = <&mpic>;
  43
  44         aliases {
  45                 ccsr = &soc;
  46
  47                 serial0 = &serial0;
  48                 serial1 = &serial1;
  49                 serial2 = &serial2;
  50                 serial3 = &serial3;
  51                 dma0 = &dma0;
  52                 dma1 = &dma1;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu0: PowerPC,e6500@0 {
  60                         device_type = "cpu";
  61                         reg = <0 1>;
  62                         next-level-cache = <&L2_1>;
  63                         fsl,portid-mapping = <0x80000000>;
  64                 };
  65                 cpu1: PowerPC,e6500@2 {
  66                         device_type = "cpu";
  67                         reg = <2 3>;
  68                         next-level-cache = <&L2_1>;
  69                         fsl,portid-mapping = <0x80000000>;
  70                 };
  71                 cpu2: PowerPC,e6500@4 {
  72                         device_type = "cpu";
  73                         reg = <4 5>;
  74                         next-level-cache = <&L2_1>;
  75                         fsl,portid-mapping = <0x80000000>;
  76                 };
  77                 cpu3: PowerPC,e6500@6 {
  78                         device_type = "cpu";
  79                         reg = <6 7>;
  80                         next-level-cache = <&L2_1>;
  81                         fsl,portid-mapping = <0x80000000>;
  82                 };
  83
  84                 cpu4: PowerPC,e6500@8 {
  85                         device_type = "cpu";
  86                         reg = <8 9>;
  87                         next-level-cache = <&L2_2>;
  88                         fsl,portid-mapping = <0x40000000>;
  89                 };
  90                 cpu5: PowerPC,e6500@10 {
  91                         device_type = "cpu";
  92                         reg = <10 11>;
  93                         next-level-cache = <&L2_2>;
  94                         fsl,portid-mapping = <0x40000000>;
  95                 };
  96                 cpu6: PowerPC,e6500@12 {
  97                         device_type = "cpu";
  98                         reg = <12 13>;
  99                         next-level-cache = <&L2_2>;
 100                         fsl,portid-mapping = <0x40000000>;
 101                 };
 102                 cpu7: PowerPC,e6500@14 {
 103                         device_type = "cpu";
 104                         reg = <14 15>;
 105                         next-level-cache = <&L2_2>;
 106                         fsl,portid-mapping = <0x40000000>;
 107                 };
 108
 109                 cpu8: PowerPC,e6500@16 {
 110                         device_type = "cpu";
 111                         reg = <16 17>;
 112                         next-level-cache = <&L2_3>;
 113                         fsl,portid-mapping = <0x20000000>;
 114                 };
 115                 cpu9: PowerPC,e6500@18 {
 116                         device_type = "cpu";
 117                         reg = <18 19>;
 118                         next-level-cache = <&L2_3>;
 119                         fsl,portid-mapping = <0x20000000>;
 120                 };
 121                 cpu10: PowerPC,e6500@20 {
 122                         device_type = "cpu";
 123                         reg = <20 21>;
 124                         next-level-cache = <&L2_3>;
 125                         fsl,portid-mapping = <0x20000000>;
 126                 };
 127                 cpu11: PowerPC,e6500@22 {
 128                         device_type = "cpu";
 129                         reg = <22 23>;
 130                         next-level-cache = <&L2_3>;
 131                         fsl,portid-mapping = <0x20000000>;
 132                 };
 133         };
 134 };
 135
 136 / {
 137         model = "fsl,T4240QDS";
 138         compatible = "fsl,T4240EMU", "fsl,T4240QDS";
 139         #address-cells = <2>;
 140         #size-cells = <2>;
 141         interrupt-parent = <&mpic>;
 142
 143         ifc: localbus@ffe124000 {
 144                 reg = <0xf 0xfe124000 0 0x2000>;
 145                 ranges = <0 0 0xf 0xe8000000 0x08000000
 146                           2 0 0xf 0xff800000 0x00010000
 147                           3 0 0xf 0xffdf0000 0x00008000>;
 148
 149                 nor@0,0 {
 150                         #address-cells = <1>;
 151                         #size-cells = <1>;
 152                         compatible = "cfi-flash";
 153                         reg = <0x0 0x0 0x8000000>;
 154
 155                         bank-width = <2>;
 156                         device-width = <1>;
 157                 };
 158
 159         };
 160
 161         memory {
 162                 device_type = "memory";
 163         };
 164
 165         soc: soc@ffe000000 {
 166                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 167                 reg = <0xf 0xfe000000 0 0x00001000>;
 168
 169         };
 170 };
 171
 172 &ifc {
 173         #address-cells = <2>;
 174         #size-cells = <1>;
 175         compatible = "fsl,ifc", "simple-bus";
 176         interrupts = <25 2 0 0>;
 177 };
 178
 179 &soc {
 180         #address-cells = <1>;
 181         #size-cells = <1>;
 182         device_type = "soc";
 183         compatible = "simple-bus";
 184
 185         soc-sram-error {
 186                 compatible = "fsl,soc-sram-error";
 187                 interrupts = <16 2 1 29>;
 188         };
 189
 190         corenet-law@0 {
 191                 compatible = "fsl,corenet-law";
 192                 reg = <0x0 0x1000>;
 193                 fsl,num-laws = <32>;
 194         };
 195
 196         ddr1: memory-controller@8000 {
 197                 compatible = "fsl,qoriq-memory-controller-v4.7",
 198                                 "fsl,qoriq-memory-controller";
 199                 reg = <0x8000 0x1000>;
 200                 interrupts = <16 2 1 23>;
 201         };
 202
 203         ddr2: memory-controller@9000 {
 204                 compatible = "fsl,qoriq-memory-controller-v4.7",
 205                                 "fsl,qoriq-memory-controller";
 206                 reg = <0x9000 0x1000>;
 207                 interrupts = <16 2 1 22>;
 208         };
 209
 210         ddr3: memory-controller@a000 {
 211                 compatible = "fsl,qoriq-memory-controller-v4.7",
 212                                 "fsl,qoriq-memory-controller";
 213                 reg = <0xa000 0x1000>;
 214                 interrupts = <16 2 1 21>;
 215         };
 216
 217         cpc: l3-cache-controller@10000 {
 218                 compatible = "fsl,t4240-l3-cache-controller", "cache";
 219                 reg = <0x10000 0x1000
 220                        0x11000 0x1000
 221                        0x12000 0x1000>;
 222                 interrupts = <16 2 1 27
 223                               16 2 1 26
 224                               16 2 1 25>;
 225         };
 226
 227         corenet-cf@18000 {
 228                 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
 229                 reg = <0x18000 0x1000>;
 230                 interrupts = <16 2 1 31>;
 231                 fsl,ccf-num-csdids = <32>;
 232                 fsl,ccf-num-snoopids = <32>;
 233         };
 234
 235         iommu@20000 {
 236                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
 237                 reg = <0x20000 0x6000>;
 238                 fsl,portid-mapping = <0x8000>;
 239                 interrupts = <
 240                         24 2 0 0
 241                         16 2 1 30>;
 242         };
 243
 244 /include/ "fsl/qoriq-mpic.dtsi"
 245
 246         guts: global-utilities@e0000 {
 247                 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
 248                 reg = <0xe0000 0xe00>;
 249                 fsl,has-rstcr;
 250                 fsl,liodn-bits = <12>;
 251         };
 252
 253 /include/ "fsl/qoriq-clockgen2.dtsi"
 254         global-utilities@e1000 {
 255                 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
 256         };
 257
 258 /include/ "fsl/qoriq-dma-0.dtsi"
 259 /include/ "fsl/qoriq-dma-1.dtsi"
 260
 261 /include/ "fsl/qoriq-i2c-0.dtsi"
 262 /include/ "fsl/qoriq-i2c-1.dtsi"
 263 /include/ "fsl/qoriq-duart-0.dtsi"
 264 /include/ "fsl/qoriq-duart-1.dtsi"
 265
 266         L2_1: l2-cache-controller@c20000 {
 267                 compatible = "fsl,t4240-l2-cache-controller";
 268                 reg = <0xc20000 0x40000>;
 269                 next-level-cache = <&cpc>;
 270         };
 271         L2_2: l2-cache-controller@c60000 {
 272                 compatible = "fsl,t4240-l2-cache-controller";
 273                 reg = <0xc60000 0x40000>;
 274                 next-level-cache = <&cpc>;
 275         };
 276         L2_3: l2-cache-controller@ca0000 {
 277                 compatible = "fsl,t4240-l2-cache-controller";
 278                 reg = <0xca0000 0x40000>;
 279                 next-level-cache = <&cpc>;
 280         };
 281 };