drivers/net/ethernet/intel/e1000e/netdev.c

   1 /* Intel PRO/1000 Linux driver
   2  * Copyright(c) 1999 - 2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * Linux NICS <linux.nics@intel.com>
  18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20  */
  21
  22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23
  24 #include <linux/module.h>
  25 #include <linux/types.h>
  26 #include <linux/init.h>
  27 #include <linux/pci.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/pagemap.h>
  30 #include <linux/delay.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/tcp.h>
  34 #include <linux/ipv6.h>
  35 #include <linux/slab.h>
  36 #include <net/checksum.h>
  37 #include <net/ip6_checksum.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/cpu.h>
  41 #include <linux/smp.h>
  42 #include <linux/pm_qos.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/aer.h>
  45 #include <linux/prefetch.h>
  46 #include <linux/clocksource.h>
  47
  48 #include "e1000.h"
  49
  50 #define DRV_EXTRAVERSION "-k"
  51
  52 #define DRV_VERSION "2.3.2" DRV_EXTRAVERSION
  53 char e1000e_driver_name[] = "e1000e";
  54 const char e1000e_driver_version[] = DRV_VERSION;
  55
  56 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  57 static int debug = -1;
  58 module_param(debug, int, 0);
  59 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  60
  61 static const struct e1000_info *e1000_info_tbl[] = {
  62         [board_82571]           = &e1000_82571_info,
  63         [board_82572]           = &e1000_82572_info,
  64         [board_82573]           = &e1000_82573_info,
  65         [board_82574]           = &e1000_82574_info,
  66         [board_82583]           = &e1000_82583_info,
  67         [board_80003es2lan]     = &e1000_es2_info,
  68         [board_ich8lan]         = &e1000_ich8_info,
  69         [board_ich9lan]         = &e1000_ich9_info,
  70         [board_ich10lan]        = &e1000_ich10_info,
  71         [board_pchlan]          = &e1000_pch_info,
  72         [board_pch2lan]         = &e1000_pch2_info,
  73         [board_pch_lpt]         = &e1000_pch_lpt_info,
  74 };
  75
  76 struct e1000_reg_info {
  77         u32 ofs;
  78         char *name;
  79 };
  80
  81 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  82         /* General Registers */
  83         {E1000_CTRL, "CTRL"},
  84         {E1000_STATUS, "STATUS"},
  85         {E1000_CTRL_EXT, "CTRL_EXT"},
  86
  87         /* Interrupt Registers */
  88         {E1000_ICR, "ICR"},
  89
  90         /* Rx Registers */
  91         {E1000_RCTL, "RCTL"},
  92         {E1000_RDLEN(0), "RDLEN"},
  93         {E1000_RDH(0), "RDH"},
  94         {E1000_RDT(0), "RDT"},
  95         {E1000_RDTR, "RDTR"},
  96         {E1000_RXDCTL(0), "RXDCTL"},
  97         {E1000_ERT, "ERT"},
  98         {E1000_RDBAL(0), "RDBAL"},
  99         {E1000_RDBAH(0), "RDBAH"},
 100         {E1000_RDFH, "RDFH"},
 101         {E1000_RDFT, "RDFT"},
 102         {E1000_RDFHS, "RDFHS"},
 103         {E1000_RDFTS, "RDFTS"},
 104         {E1000_RDFPC, "RDFPC"},
 105
 106         /* Tx Registers */
 107         {E1000_TCTL, "TCTL"},
 108         {E1000_TDBAL(0), "TDBAL"},
 109         {E1000_TDBAH(0), "TDBAH"},
 110         {E1000_TDLEN(0), "TDLEN"},
 111         {E1000_TDH(0), "TDH"},
 112         {E1000_TDT(0), "TDT"},
 113         {E1000_TIDV, "TIDV"},
 114         {E1000_TXDCTL(0), "TXDCTL"},
 115         {E1000_TADV, "TADV"},
 116         {E1000_TARC(0), "TARC"},
 117         {E1000_TDFH, "TDFH"},
 118         {E1000_TDFT, "TDFT"},
 119         {E1000_TDFHS, "TDFHS"},
 120         {E1000_TDFTS, "TDFTS"},
 121         {E1000_TDFPC, "TDFPC"},
 122
 123         /* List Terminator */
 124         {0, NULL}
 125 };
 126
 127 /**
 128  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 129  * @hw: pointer to the HW structure
 130  *
 131  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 132  * be accessing the registers at the same time.  Normally, this is handled in
 133  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 134  * accesses later than it should which could result in the register to have
 135  * an incorrect value.  Workaround this by checking the FWSM register which
 136  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 137  * and try again a number of times.
 138  **/
 139 s32 __ew32_prepare(struct e1000_hw *hw)
 140 {
 141         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 142
 143         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 144                 udelay(50);
 145
 146         return i;
 147 }
 148
 149 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 150 {
 151         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 152                 __ew32_prepare(hw);
 153
 154         writel(val, hw->hw_addr + reg);
 155 }
 156
 157 /**
 158  * e1000_regdump - register printout routine
 159  * @hw: pointer to the HW structure
 160  * @reginfo: pointer to the register info table
 161  **/
 162 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 163 {
 164         int n = 0;
 165         char rname[16];
 166         u32 regs[8];
 167
 168         switch (reginfo->ofs) {
 169         case E1000_RXDCTL(0):
 170                 for (n = 0; n < 2; n++)
 171                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 172                 break;
 173         case E1000_TXDCTL(0):
 174                 for (n = 0; n < 2; n++)
 175                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 176                 break;
 177         case E1000_TARC(0):
 178                 for (n = 0; n < 2; n++)
 179                         regs[n] = __er32(hw, E1000_TARC(n));
 180                 break;
 181         default:
 182                 pr_info("%-15s %08x\n",
 183                         reginfo->name, __er32(hw, reginfo->ofs));
 184                 return;
 185         }
 186
 187         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 188         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 189 }
 190
 191 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 192                                  struct e1000_buffer *bi)
 193 {
 194         int i;
 195         struct e1000_ps_page *ps_page;
 196
 197         for (i = 0; i < adapter->rx_ps_pages; i++) {
 198                 ps_page = &bi->ps_pages[i];
 199
 200                 if (ps_page->page) {
 201                         pr_info("packet dump for ps_page %d:\n", i);
 202                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 203                                        16, 1, page_address(ps_page->page),
 204                                        PAGE_SIZE, true);
 205                 }
 206         }
 207 }
 208
 209 /**
 210  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 211  * @adapter: board private structure
 212  **/
 213 static void e1000e_dump(struct e1000_adapter *adapter)
 214 {
 215         struct net_device *netdev = adapter->netdev;
 216         struct e1000_hw *hw = &adapter->hw;
 217         struct e1000_reg_info *reginfo;
 218         struct e1000_ring *tx_ring = adapter->tx_ring;
 219         struct e1000_tx_desc *tx_desc;
 220         struct my_u0 {
 221                 __le64 a;
 222                 __le64 b;
 223         } *u0;
 224         struct e1000_buffer *buffer_info;
 225         struct e1000_ring *rx_ring = adapter->rx_ring;
 226         union e1000_rx_desc_packet_split *rx_desc_ps;
 227         union e1000_rx_desc_extended *rx_desc;
 228         struct my_u1 {
 229                 __le64 a;
 230                 __le64 b;
 231                 __le64 c;
 232                 __le64 d;
 233         } *u1;
 234         u32 staterr;
 235         int i = 0;
 236
 237         if (!netif_msg_hw(adapter))
 238                 return;
 239
 240         /* Print netdevice Info */
 241         if (netdev) {
 242                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 243                 pr_info("Device Name     state            trans_start      last_rx\n");
 244                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 245                         netdev->state, netdev->trans_start, netdev->last_rx);
 246         }
 247
 248         /* Print Registers */
 249         dev_info(&adapter->pdev->dev, "Register Dump\n");
 250         pr_info(" Register Name   Value\n");
 251         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 252              reginfo->name; reginfo++) {
 253                 e1000_regdump(hw, reginfo);
 254         }
 255
 256         /* Print Tx Ring Summary */
 257         if (!netdev || !netif_running(netdev))
 258                 return;
 259
 260         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 261         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 262         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 263         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 264                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 265                 (unsigned long long)buffer_info->dma,
 266                 buffer_info->length,
 267                 buffer_info->next_to_watch,
 268                 (unsigned long long)buffer_info->time_stamp);
 269
 270         /* Print Tx Ring */
 271         if (!netif_msg_tx_done(adapter))
 272                 goto rx_ring_summary;
 273
 274         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 275
 276         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 277          *
 278          * Legacy Transmit Descriptor
 279          *   +--------------------------------------------------------------+
 280          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 281          *   +--------------------------------------------------------------+
 282          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 283          *   +--------------------------------------------------------------+
 284          *   63       48 47        36 35    32 31     24 23    16 15        0
 285          *
 286          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 287          *   63      48 47    40 39       32 31             16 15    8 7      0
 288          *   +----------------------------------------------------------------+
 289          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 290          *   +----------------------------------------------------------------+
 291          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 292          *   +----------------------------------------------------------------+
 293          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 294          *
 295          * Extended Data Descriptor (DTYP=0x1)
 296          *   +----------------------------------------------------------------+
 297          * 0 |                     Buffer Address [63:0]                      |
 298          *   +----------------------------------------------------------------+
 299          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 300          *   +----------------------------------------------------------------+
 301          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 302          */
 303         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 304         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 305         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 306         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 307                 const char *next_desc;
 308                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 309                 buffer_info = &tx_ring->buffer_info[i];
 310                 u0 = (struct my_u0 *)tx_desc;
 311                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 312                         next_desc = " NTC/U";
 313                 else if (i == tx_ring->next_to_use)
 314                         next_desc = " NTU";
 315                 else if (i == tx_ring->next_to_clean)
 316                         next_desc = " NTC";
 317                 else
 318                         next_desc = "";
 319                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 320                         (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
 321                          ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
 322                         i,
 323                         (unsigned long long)le64_to_cpu(u0->a),
 324                         (unsigned long long)le64_to_cpu(u0->b),
 325                         (unsigned long long)buffer_info->dma,
 326                         buffer_info->length, buffer_info->next_to_watch,
 327                         (unsigned long long)buffer_info->time_stamp,
 328                         buffer_info->skb, next_desc);
 329
 330                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 331                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 332                                        16, 1, buffer_info->skb->data,
 333                                        buffer_info->skb->len, true);
 334         }
 335
 336         /* Print Rx Ring Summary */
 337 rx_ring_summary:
 338         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 339         pr_info("Queue [NTU] [NTC]\n");
 340         pr_info(" %5d %5X %5X\n",
 341                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 342
 343         /* Print Rx Ring */
 344         if (!netif_msg_rx_status(adapter))
 345                 return;
 346
 347         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 348         switch (adapter->rx_ps_pages) {
 349         case 1:
 350         case 2:
 351         case 3:
 352                 /* [Extended] Packet Split Receive Descriptor Format
 353                  *
 354                  *    +-----------------------------------------------------+
 355                  *  0 |                Buffer Address 0 [63:0]              |
 356                  *    +-----------------------------------------------------+
 357                  *  8 |                Buffer Address 1 [63:0]              |
 358                  *    +-----------------------------------------------------+
 359                  * 16 |                Buffer Address 2 [63:0]              |
 360                  *    +-----------------------------------------------------+
 361                  * 24 |                Buffer Address 3 [63:0]              |
 362                  *    +-----------------------------------------------------+
 363                  */
 364                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 365                 /* [Extended] Receive Descriptor (Write-Back) Format
 366                  *
 367                  *   63       48 47    32 31     13 12    8 7    4 3        0
 368                  *   +------------------------------------------------------+
 369                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 370                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 371                  *   +------------------------------------------------------+
 372                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 373                  *   +------------------------------------------------------+
 374                  *   63       48 47    32 31            20 19               0
 375                  */
 376                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 377                 for (i = 0; i < rx_ring->count; i++) {
 378                         const char *next_desc;
 379                         buffer_info = &rx_ring->buffer_info[i];
 380                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 381                         u1 = (struct my_u1 *)rx_desc_ps;
 382                         staterr =
 383                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 384
 385                         if (i == rx_ring->next_to_use)
 386                                 next_desc = " NTU";
 387                         else if (i == rx_ring->next_to_clean)
 388                                 next_desc = " NTC";
 389                         else
 390                                 next_desc = "";
 391
 392                         if (staterr & E1000_RXD_STAT_DD) {
 393                                 /* Descriptor Done */
 394                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 395                                         "RWB", i,
 396                                         (unsigned long long)le64_to_cpu(u1->a),
 397                                         (unsigned long long)le64_to_cpu(u1->b),
 398                                         (unsigned long long)le64_to_cpu(u1->c),
 399                                         (unsigned long long)le64_to_cpu(u1->d),
 400                                         buffer_info->skb, next_desc);
 401                         } else {
 402                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 403                                         "R  ", i,
 404                                         (unsigned long long)le64_to_cpu(u1->a),
 405                                         (unsigned long long)le64_to_cpu(u1->b),
 406                                         (unsigned long long)le64_to_cpu(u1->c),
 407                                         (unsigned long long)le64_to_cpu(u1->d),
 408                                         (unsigned long long)buffer_info->dma,
 409                                         buffer_info->skb, next_desc);
 410
 411                                 if (netif_msg_pktdata(adapter))
 412                                         e1000e_dump_ps_pages(adapter,
 413                                                              buffer_info);
 414                         }
 415                 }
 416                 break;
 417         default:
 418         case 0:
 419                 /* Extended Receive Descriptor (Read) Format
 420                  *
 421                  *   +-----------------------------------------------------+
 422                  * 0 |                Buffer Address [63:0]                |
 423                  *   +-----------------------------------------------------+
 424                  * 8 |                      Reserved                       |
 425                  *   +-----------------------------------------------------+
 426                  */
 427                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 428                 /* Extended Receive Descriptor (Write-Back) Format
 429                  *
 430                  *   63       48 47    32 31    24 23            4 3        0
 431                  *   +------------------------------------------------------+
 432                  *   |     RSS Hash      |        |               |         |
 433                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 434                  *   | Packet   | IP     |        |               |  Type   |
 435                  *   | Checksum | Ident  |        |               |         |
 436                  *   +------------------------------------------------------+
 437                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 438                  *   +------------------------------------------------------+
 439                  *   63       48 47    32 31            20 19               0
 440                  */
 441                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 442
 443                 for (i = 0; i < rx_ring->count; i++) {
 444                         const char *next_desc;
 445
 446                         buffer_info = &rx_ring->buffer_info[i];
 447                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 448                         u1 = (struct my_u1 *)rx_desc;
 449                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 450
 451                         if (i == rx_ring->next_to_use)
 452                                 next_desc = " NTU";
 453                         else if (i == rx_ring->next_to_clean)
 454                                 next_desc = " NTC";
 455                         else
 456                                 next_desc = "";
 457
 458                         if (staterr & E1000_RXD_STAT_DD) {
 459                                 /* Descriptor Done */
 460                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 461                                         "RWB", i,
 462                                         (unsigned long long)le64_to_cpu(u1->a),
 463                                         (unsigned long long)le64_to_cpu(u1->b),
 464                                         buffer_info->skb, next_desc);
 465                         } else {
 466                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 467                                         "R  ", i,
 468                                         (unsigned long long)le64_to_cpu(u1->a),
 469                                         (unsigned long long)le64_to_cpu(u1->b),
 470                                         (unsigned long long)buffer_info->dma,
 471                                         buffer_info->skb, next_desc);
 472
 473                                 if (netif_msg_pktdata(adapter) &&
 474                                     buffer_info->skb)
 475                                         print_hex_dump(KERN_INFO, "",
 476                                                        DUMP_PREFIX_ADDRESS, 16,
 477                                                        1,
 478                                                        buffer_info->skb->data,
 479                                                        adapter->rx_buffer_len,
 480                                                        true);
 481                         }
 482                 }
 483         }
 484 }
 485
 486 /**
 487  * e1000_desc_unused - calculate if we have unused descriptors
 488  **/
 489 static int e1000_desc_unused(struct e1000_ring *ring)
 490 {
 491         if (ring->next_to_clean > ring->next_to_use)
 492                 return ring->next_to_clean - ring->next_to_use - 1;
 493
 494         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 495 }
 496
 497 /**
 498  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 499  * @adapter: board private structure
 500  * @hwtstamps: time stamp structure to update
 501  * @systim: unsigned 64bit system time value.
 502  *
 503  * Convert the system time value stored in the RX/TXSTMP registers into a
 504  * hwtstamp which can be used by the upper level time stamping functions.
 505  *
 506  * The 'systim_lock' spinlock is used to protect the consistency of the
 507  * system time value. This is needed because reading the 64 bit time
 508  * value involves reading two 32 bit registers. The first read latches the
 509  * value.
 510  **/
 511 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 512                                       struct skb_shared_hwtstamps *hwtstamps,
 513                                       u64 systim)
 514 {
 515         u64 ns;
 516         unsigned long flags;
 517
 518         spin_lock_irqsave(&adapter->systim_lock, flags);
 519         ns = timecounter_cyc2time(&adapter->tc, systim);
 520         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 521
 522         memset(hwtstamps, 0, sizeof(*hwtstamps));
 523         hwtstamps->hwtstamp = ns_to_ktime(ns);
 524 }
 525
 526 /**
 527  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 528  * @adapter: board private structure
 529  * @status: descriptor extended error and status field
 530  * @skb: particular skb to include time stamp
 531  *
 532  * If the time stamp is valid, convert it into the timecounter ns value
 533  * and store that result into the shhwtstamps structure which is passed
 534  * up the network stack.
 535  **/
 536 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 537                                struct sk_buff *skb)
 538 {
 539         struct e1000_hw *hw = &adapter->hw;
 540         u64 rxstmp;
 541
 542         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 543             !(status & E1000_RXDEXT_STATERR_TST) ||
 544             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 545                 return;
 546
 547         /* The Rx time stamp registers contain the time stamp.  No other
 548          * received packet will be time stamped until the Rx time stamp
 549          * registers are read.  Because only one packet can be time stamped
 550          * at a time, the register values must belong to this packet and
 551          * therefore none of the other additional attributes need to be
 552          * compared.
 553          */
 554         rxstmp = (u64)er32(RXSTMPL);
 555         rxstmp |= (u64)er32(RXSTMPH) << 32;
 556         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 557
 558         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 559 }
 560
 561 /**
 562  * e1000_receive_skb - helper function to handle Rx indications
 563  * @adapter: board private structure
 564  * @staterr: descriptor extended error and status field as written by hardware
 565  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 566  * @skb: pointer to sk_buff to be indicated to stack
 567  **/
 568 static void e1000_receive_skb(struct e1000_adapter *adapter,
 569                               struct net_device *netdev, struct sk_buff *skb,
 570                               u32 staterr, __le16 vlan)
 571 {
 572         u16 tag = le16_to_cpu(vlan);
 573
 574         e1000e_rx_hwtstamp(adapter, staterr, skb);
 575
 576         skb->protocol = eth_type_trans(skb, netdev);
 577
 578         if (staterr & E1000_RXD_STAT_VP)
 579                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 580
 581         napi_gro_receive(&adapter->napi, skb);
 582 }
 583
 584 /**
 585  * e1000_rx_checksum - Receive Checksum Offload
 586  * @adapter: board private structure
 587  * @status_err: receive descriptor status and error fields
 588  * @csum: receive descriptor csum field
 589  * @sk_buff: socket buffer with received data
 590  **/
 591 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 592                               struct sk_buff *skb)
 593 {
 594         u16 status = (u16)status_err;
 595         u8 errors = (u8)(status_err >> 24);
 596
 597         skb_checksum_none_assert(skb);
 598
 599         /* Rx checksum disabled */
 600         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 601                 return;
 602
 603         /* Ignore Checksum bit is set */
 604         if (status & E1000_RXD_STAT_IXSM)
 605                 return;
 606
 607         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 608         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 609                 /* let the stack verify checksum errors */
 610                 adapter->hw_csum_err++;
 611                 return;
 612         }
 613
 614         /* TCP/UDP Checksum has not been calculated */
 615         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 616                 return;
 617
 618         /* It must be a TCP or UDP packet with a valid checksum */
 619         skb->ip_summed = CHECKSUM_UNNECESSARY;
 620         adapter->hw_csum_good++;
 621 }
 622
 623 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 624 {
 625         struct e1000_adapter *adapter = rx_ring->adapter;
 626         struct e1000_hw *hw = &adapter->hw;
 627         s32 ret_val = __ew32_prepare(hw);
 628
 629         writel(i, rx_ring->tail);
 630
 631         if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
 632                 u32 rctl = er32(RCTL);
 633
 634                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 635                 e_err("ME firmware caused invalid RDT - resetting\n");
 636                 schedule_work(&adapter->reset_task);
 637         }
 638 }
 639
 640 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 641 {
 642         struct e1000_adapter *adapter = tx_ring->adapter;
 643         struct e1000_hw *hw = &adapter->hw;
 644         s32 ret_val = __ew32_prepare(hw);
 645
 646         writel(i, tx_ring->tail);
 647
 648         if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
 649                 u32 tctl = er32(TCTL);
 650
 651                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 652                 e_err("ME firmware caused invalid TDT - resetting\n");
 653                 schedule_work(&adapter->reset_task);
 654         }
 655 }
 656
 657 /**
 658  * e1000_alloc_rx_buffers - Replace used receive buffers
 659  * @rx_ring: Rx descriptor ring
 660  **/
 661 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 662                                    int cleaned_count, gfp_t gfp)
 663 {
 664         struct e1000_adapter *adapter = rx_ring->adapter;
 665         struct net_device *netdev = adapter->netdev;
 666         struct pci_dev *pdev = adapter->pdev;
 667         union e1000_rx_desc_extended *rx_desc;
 668         struct e1000_buffer *buffer_info;
 669         struct sk_buff *skb;
 670         unsigned int i;
 671         unsigned int bufsz = adapter->rx_buffer_len;
 672
 673         i = rx_ring->next_to_use;
 674         buffer_info = &rx_ring->buffer_info[i];
 675
 676         while (cleaned_count--) {
 677                 skb = buffer_info->skb;
 678                 if (skb) {
 679                         skb_trim(skb, 0);
 680                         goto map_skb;
 681                 }
 682
 683                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 684                 if (!skb) {
 685                         /* Better luck next round */
 686                         adapter->alloc_rx_buff_failed++;
 687                         break;
 688                 }
 689
 690                 buffer_info->skb = skb;
 691 map_skb:
 692                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 693                                                   adapter->rx_buffer_len,
 694                                                   DMA_FROM_DEVICE);
 695                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 696                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 697                         adapter->rx_dma_failed++;
 698                         break;
 699                 }
 700
 701                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 702                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 703
 704                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 705                         /* Force memory writes to complete before letting h/w
 706                          * know there are new descriptors to fetch.  (Only
 707                          * applicable for weak-ordered memory model archs,
 708                          * such as IA-64).
 709                          */
 710                         wmb();
 711                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 712                                 e1000e_update_rdt_wa(rx_ring, i);
 713                         else
 714                                 writel(i, rx_ring->tail);
 715                 }
 716                 i++;
 717                 if (i == rx_ring->count)
 718                         i = 0;
 719                 buffer_info = &rx_ring->buffer_info[i];
 720         }
 721
 722         rx_ring->next_to_use = i;
 723 }
 724
 725 /**
 726  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 727  * @rx_ring: Rx descriptor ring
 728  **/
 729 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 730                                       int cleaned_count, gfp_t gfp)
 731 {
 732         struct e1000_adapter *adapter = rx_ring->adapter;
 733         struct net_device *netdev = adapter->netdev;
 734         struct pci_dev *pdev = adapter->pdev;
 735         union e1000_rx_desc_packet_split *rx_desc;
 736         struct e1000_buffer *buffer_info;
 737         struct e1000_ps_page *ps_page;
 738         struct sk_buff *skb;
 739         unsigned int i, j;
 740
 741         i = rx_ring->next_to_use;
 742         buffer_info = &rx_ring->buffer_info[i];
 743
 744         while (cleaned_count--) {
 745                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 746
 747                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 748                         ps_page = &buffer_info->ps_pages[j];
 749                         if (j >= adapter->rx_ps_pages) {
 750                                 /* all unused desc entries get hw null ptr */
 751                                 rx_desc->read.buffer_addr[j + 1] =
 752                                     ~cpu_to_le64(0);
 753                                 continue;
 754                         }
 755                         if (!ps_page->page) {
 756                                 ps_page->page = alloc_page(gfp);
 757                                 if (!ps_page->page) {
 758                                         adapter->alloc_rx_buff_failed++;
 759                                         goto no_buffers;
 760                                 }
 761                                 ps_page->dma = dma_map_page(&pdev->dev,
 762                                                             ps_page->page,
 763                                                             0, PAGE_SIZE,
 764                                                             DMA_FROM_DEVICE);
 765                                 if (dma_mapping_error(&pdev->dev,
 766                                                       ps_page->dma)) {
 767                                         dev_err(&adapter->pdev->dev,
 768                                                 "Rx DMA page map failed\n");
 769                                         adapter->rx_dma_failed++;
 770                                         goto no_buffers;
 771                                 }
 772                         }
 773                         /* Refresh the desc even if buffer_addrs
 774                          * didn't change because each write-back
 775                          * erases this info.
 776                          */
 777                         rx_desc->read.buffer_addr[j + 1] =
 778                             cpu_to_le64(ps_page->dma);
 779                 }
 780
 781                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 782                                                   gfp);
 783
 784                 if (!skb) {
 785                         adapter->alloc_rx_buff_failed++;
 786                         break;
 787                 }
 788
 789                 buffer_info->skb = skb;
 790                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 791                                                   adapter->rx_ps_bsize0,
 792                                                   DMA_FROM_DEVICE);
 793                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 794                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 795                         adapter->rx_dma_failed++;
 796                         /* cleanup skb */
 797                         dev_kfree_skb_any(skb);
 798                         buffer_info->skb = NULL;
 799                         break;
 800                 }
 801
 802                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 803
 804                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 805                         /* Force memory writes to complete before letting h/w
 806                          * know there are new descriptors to fetch.  (Only
 807                          * applicable for weak-ordered memory model archs,
 808                          * such as IA-64).
 809                          */
 810                         wmb();
 811                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 812                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 813                         else
 814                                 writel(i << 1, rx_ring->tail);
 815                 }
 816
 817                 i++;
 818                 if (i == rx_ring->count)
 819                         i = 0;
 820                 buffer_info = &rx_ring->buffer_info[i];
 821         }
 822
 823 no_buffers:
 824         rx_ring->next_to_use = i;
 825 }
 826
 827 /**
 828  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 829  * @rx_ring: Rx descriptor ring
 830  * @cleaned_count: number of buffers to allocate this pass
 831  **/
 832
 833 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 834                                          int cleaned_count, gfp_t gfp)
 835 {
 836         struct e1000_adapter *adapter = rx_ring->adapter;
 837         struct net_device *netdev = adapter->netdev;
 838         struct pci_dev *pdev = adapter->pdev;
 839         union e1000_rx_desc_extended *rx_desc;
 840         struct e1000_buffer *buffer_info;
 841         struct sk_buff *skb;
 842         unsigned int i;
 843         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 844
 845         i = rx_ring->next_to_use;
 846         buffer_info = &rx_ring->buffer_info[i];
 847
 848         while (cleaned_count--) {
 849                 skb = buffer_info->skb;
 850                 if (skb) {
 851                         skb_trim(skb, 0);
 852                         goto check_page;
 853                 }
 854
 855                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 856                 if (unlikely(!skb)) {
 857                         /* Better luck next round */
 858                         adapter->alloc_rx_buff_failed++;
 859                         break;
 860                 }
 861
 862                 buffer_info->skb = skb;
 863 check_page:
 864                 /* allocate a new page if necessary */
 865                 if (!buffer_info->page) {
 866                         buffer_info->page = alloc_page(gfp);
 867                         if (unlikely(!buffer_info->page)) {
 868                                 adapter->alloc_rx_buff_failed++;
 869                                 break;
 870                         }
 871                 }
 872
 873                 if (!buffer_info->dma) {
 874                         buffer_info->dma = dma_map_page(&pdev->dev,
 875                                                         buffer_info->page, 0,
 876                                                         PAGE_SIZE,
 877                                                         DMA_FROM_DEVICE);
 878                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 879                                 adapter->alloc_rx_buff_failed++;
 880                                 break;
 881                         }
 882                 }
 883
 884                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 885                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 886
 887                 if (unlikely(++i == rx_ring->count))
 888                         i = 0;
 889                 buffer_info = &rx_ring->buffer_info[i];
 890         }
 891
 892         if (likely(rx_ring->next_to_use != i)) {
 893                 rx_ring->next_to_use = i;
 894                 if (unlikely(i-- == 0))
 895                         i = (rx_ring->count - 1);
 896
 897                 /* Force memory writes to complete before letting h/w
 898                  * know there are new descriptors to fetch.  (Only
 899                  * applicable for weak-ordered memory model archs,
 900                  * such as IA-64).
 901                  */
 902                 wmb();
 903                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 904                         e1000e_update_rdt_wa(rx_ring, i);
 905                 else
 906                         writel(i, rx_ring->tail);
 907         }
 908 }
 909
 910 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 911                                  struct sk_buff *skb)
 912 {
 913         if (netdev->features & NETIF_F_RXHASH)
 914                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 915 }
 916
 917 /**
 918  * e1000_clean_rx_irq - Send received data up the network stack
 919  * @rx_ring: Rx descriptor ring
 920  *
 921  * the return value indicates whether actual cleaning was done, there
 922  * is no guarantee that everything was cleaned
 923  **/
 924 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 925                                int work_to_do)
 926 {
 927         struct e1000_adapter *adapter = rx_ring->adapter;
 928         struct net_device *netdev = adapter->netdev;
 929         struct pci_dev *pdev = adapter->pdev;
 930         struct e1000_hw *hw = &adapter->hw;
 931         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 932         struct e1000_buffer *buffer_info, *next_buffer;
 933         u32 length, staterr;
 934         unsigned int i;
 935         int cleaned_count = 0;
 936         bool cleaned = false;
 937         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 938
 939         i = rx_ring->next_to_clean;
 940         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 941         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 942         buffer_info = &rx_ring->buffer_info[i];
 943
 944         while (staterr & E1000_RXD_STAT_DD) {
 945                 struct sk_buff *skb;
 946
 947                 if (*work_done >= work_to_do)
 948                         break;
 949                 (*work_done)++;
 950                 rmb();  /* read descriptor and rx_buffer_info after status DD */
 951
 952                 skb = buffer_info->skb;
 953                 buffer_info->skb = NULL;
 954
 955                 prefetch(skb->data - NET_IP_ALIGN);
 956
 957                 i++;
 958                 if (i == rx_ring->count)
 959                         i = 0;
 960                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 961                 prefetch(next_rxd);
 962
 963                 next_buffer = &rx_ring->buffer_info[i];
 964
 965                 cleaned = true;
 966                 cleaned_count++;
 967                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 968                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 969                 buffer_info->dma = 0;
 970
 971                 length = le16_to_cpu(rx_desc->wb.upper.length);
 972
 973                 /* !EOP means multiple descriptors were used to store a single
 974                  * packet, if that's the case we need to toss it.  In fact, we
 975                  * need to toss every packet with the EOP bit clear and the
 976                  * next frame that _does_ have the EOP bit set, as it is by
 977                  * definition only a frame fragment
 978                  */
 979                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 980                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 981
 982                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 983                         /* All receives must fit into a single buffer */
 984                         e_dbg("Receive packet consumed multiple buffers\n");
 985                         /* recycle */
 986                         buffer_info->skb = skb;
 987                         if (staterr & E1000_RXD_STAT_EOP)
 988                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 989                         goto next_desc;
 990                 }
 991
 992                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 993                              !(netdev->features & NETIF_F_RXALL))) {
 994                         /* recycle */
 995                         buffer_info->skb = skb;
 996                         goto next_desc;
 997                 }
 998
 999                 /* adjust length to remove Ethernet CRC */
1000                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1001                         /* If configured to store CRC, don't subtract FCS,
1002                          * but keep the FCS bytes out of the total_rx_bytes
1003                          * counter
1004                          */
1005                         if (netdev->features & NETIF_F_RXFCS)
1006                                 total_rx_bytes -= 4;
1007                         else
1008                                 length -= 4;
1009                 }
1010
1011                 total_rx_bytes += length;
1012                 total_rx_packets++;
1013
1014                 /* code added for copybreak, this should improve
1015                  * performance for small packets with large amounts
1016                  * of reassembly being done in the stack
1017                  */
1018                 if (length < copybreak) {
1019                         struct sk_buff *new_skb =
1020                                 napi_alloc_skb(&adapter->napi, length);
1021                         if (new_skb) {
1022                                 skb_copy_to_linear_data_offset(new_skb,
1023                                                                -NET_IP_ALIGN,
1024                                                                (skb->data -
1025                                                                 NET_IP_ALIGN),
1026                                                                (length +
1027                                                                 NET_IP_ALIGN));
1028                                 /* save the skb in buffer_info as good */
1029                                 buffer_info->skb = skb;
1030                                 skb = new_skb;
1031                         }
1032                         /* else just continue with the old one */
1033                 }
1034                 /* end copybreak code */
1035                 skb_put(skb, length);
1036
1037                 /* Receive Checksum Offload */
1038                 e1000_rx_checksum(adapter, staterr, skb);
1039
1040                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1041
1042                 e1000_receive_skb(adapter, netdev, skb, staterr,
1043                                   rx_desc->wb.upper.vlan);
1044
1045 next_desc:
1046                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1047
1048                 /* return some buffers to hardware, one at a time is too slow */
1049                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1050                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1051                                               GFP_ATOMIC);
1052                         cleaned_count = 0;
1053                 }
1054
1055                 /* use prefetched values */
1056                 rx_desc = next_rxd;
1057                 buffer_info = next_buffer;
1058
1059                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1060         }
1061         rx_ring->next_to_clean = i;
1062
1063         cleaned_count = e1000_desc_unused(rx_ring);
1064         if (cleaned_count)
1065                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1066
1067         adapter->total_rx_bytes += total_rx_bytes;
1068         adapter->total_rx_packets += total_rx_packets;
1069         return cleaned;
1070 }
1071
1072 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1073                             struct e1000_buffer *buffer_info)
1074 {
1075         struct e1000_adapter *adapter = tx_ring->adapter;
1076
1077         if (buffer_info->dma) {
1078                 if (buffer_info->mapped_as_page)
1079                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1080                                        buffer_info->length, DMA_TO_DEVICE);
1081                 else
1082                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1083                                          buffer_info->length, DMA_TO_DEVICE);
1084                 buffer_info->dma = 0;
1085         }
1086         if (buffer_info->skb) {
1087                 dev_kfree_skb_any(buffer_info->skb);
1088                 buffer_info->skb = NULL;
1089         }
1090         buffer_info->time_stamp = 0;
1091 }
1092
1093 static void e1000_print_hw_hang(struct work_struct *work)
1094 {
1095         struct e1000_adapter *adapter = container_of(work,
1096                                                      struct e1000_adapter,
1097                                                      print_hang_task);
1098         struct net_device *netdev = adapter->netdev;
1099         struct e1000_ring *tx_ring = adapter->tx_ring;
1100         unsigned int i = tx_ring->next_to_clean;
1101         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1102         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1103         struct e1000_hw *hw = &adapter->hw;
1104         u16 phy_status, phy_1000t_status, phy_ext_status;
1105         u16 pci_status;
1106
1107         if (test_bit(__E1000_DOWN, &adapter->state))
1108                 return;
1109
1110         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1111                 /* May be block on write-back, flush and detect again
1112                  * flush pending descriptor writebacks to memory
1113                  */
1114                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1115                 /* execute the writes immediately */
1116                 e1e_flush();
1117                 /* Due to rare timing issues, write to TIDV again to ensure
1118                  * the write is successful
1119                  */
1120                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1121                 /* execute the writes immediately */
1122                 e1e_flush();
1123                 adapter->tx_hang_recheck = true;
1124                 return;
1125         }
1126         adapter->tx_hang_recheck = false;
1127
1128         if (er32(TDH(0)) == er32(TDT(0))) {
1129                 e_dbg("false hang detected, ignoring\n");
1130                 return;
1131         }
1132
1133         /* Real hang detected */
1134         netif_stop_queue(netdev);
1135
1136         e1e_rphy(hw, MII_BMSR, &phy_status);
1137         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1138         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1139
1140         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1141
1142         /* detected Hardware unit hang */
1143         e_err("Detected Hardware Unit Hang:\n"
1144               "  TDH                  <%x>\n"
1145               "  TDT                  <%x>\n"
1146               "  next_to_use          <%x>\n"
1147               "  next_to_clean        <%x>\n"
1148               "buffer_info[next_to_clean]:\n"
1149               "  time_stamp           <%lx>\n"
1150               "  next_to_watch        <%x>\n"
1151               "  jiffies              <%lx>\n"
1152               "  next_to_watch.status <%x>\n"
1153               "MAC Status             <%x>\n"
1154               "PHY Status             <%x>\n"
1155               "PHY 1000BASE-T Status  <%x>\n"
1156               "PHY Extended Status    <%x>\n"
1157               "PCI Status             <%x>\n",
1158               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1159               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1160               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1161               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1162
1163         e1000e_dump(adapter);
1164
1165         /* Suggest workaround for known h/w issue */
1166         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1167                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1168 }
1169
1170 /**
1171  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1172  * @work: pointer to work struct
1173  *
1174  * This work function polls the TSYNCTXCTL valid bit to determine when a
1175  * timestamp has been taken for the current stored skb.  The timestamp must
1176  * be for this skb because only one such packet is allowed in the queue.
1177  */
1178 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1179 {
1180         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1181                                                      tx_hwtstamp_work);
1182         struct e1000_hw *hw = &adapter->hw;
1183
1184         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1185                 struct skb_shared_hwtstamps shhwtstamps;
1186                 u64 txstmp;
1187
1188                 txstmp = er32(TXSTMPL);
1189                 txstmp |= (u64)er32(TXSTMPH) << 32;
1190
1191                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1192
1193                 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1194                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1195                 adapter->tx_hwtstamp_skb = NULL;
1196         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1197                               + adapter->tx_timeout_factor * HZ)) {
1198                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1199                 adapter->tx_hwtstamp_skb = NULL;
1200                 adapter->tx_hwtstamp_timeouts++;
1201                 e_warn("clearing Tx timestamp hang\n");
1202         } else {
1203                 /* reschedule to check later */
1204                 schedule_work(&adapter->tx_hwtstamp_work);
1205         }
1206 }
1207
1208 /**
1209  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1210  * @tx_ring: Tx descriptor ring
1211  *
1212  * the return value indicates whether actual cleaning was done, there
1213  * is no guarantee that everything was cleaned
1214  **/
1215 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1216 {
1217         struct e1000_adapter *adapter = tx_ring->adapter;
1218         struct net_device *netdev = adapter->netdev;
1219         struct e1000_hw *hw = &adapter->hw;
1220         struct e1000_tx_desc *tx_desc, *eop_desc;
1221         struct e1000_buffer *buffer_info;
1222         unsigned int i, eop;
1223         unsigned int count = 0;
1224         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1225         unsigned int bytes_compl = 0, pkts_compl = 0;
1226
1227         i = tx_ring->next_to_clean;
1228         eop = tx_ring->buffer_info[i].next_to_watch;
1229         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1230
1231         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1232                (count < tx_ring->count)) {
1233                 bool cleaned = false;
1234
1235                 rmb();          /* read buffer_info after eop_desc */
1236                 for (; !cleaned; count++) {
1237                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1238                         buffer_info = &tx_ring->buffer_info[i];
1239                         cleaned = (i == eop);
1240
1241                         if (cleaned) {
1242                                 total_tx_packets += buffer_info->segs;
1243                                 total_tx_bytes += buffer_info->bytecount;
1244                                 if (buffer_info->skb) {
1245                                         bytes_compl += buffer_info->skb->len;
1246                                         pkts_compl++;
1247                                 }
1248                         }
1249
1250                         e1000_put_txbuf(tx_ring, buffer_info);
1251                         tx_desc->upper.data = 0;
1252
1253                         i++;
1254                         if (i == tx_ring->count)
1255                                 i = 0;
1256                 }
1257
1258                 if (i == tx_ring->next_to_use)
1259                         break;
1260                 eop = tx_ring->buffer_info[i].next_to_watch;
1261                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1262         }
1263
1264         tx_ring->next_to_clean = i;
1265
1266         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1267
1268 #define TX_WAKE_THRESHOLD 32
1269         if (count && netif_carrier_ok(netdev) &&
1270             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1271                 /* Make sure that anybody stopping the queue after this
1272                  * sees the new next_to_clean.
1273                  */
1274                 smp_mb();
1275
1276                 if (netif_queue_stopped(netdev) &&
1277                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1278                         netif_wake_queue(netdev);
1279                         ++adapter->restart_queue;
1280                 }
1281         }
1282
1283         if (adapter->detect_tx_hung) {
1284                 /* Detect a transmit hang in hardware, this serializes the
1285                  * check with the clearing of time_stamp and movement of i
1286                  */
1287                 adapter->detect_tx_hung = false;
1288                 if (tx_ring->buffer_info[i].time_stamp &&
1289                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1290                                + (adapter->tx_timeout_factor * HZ)) &&
1291                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1292                         schedule_work(&adapter->print_hang_task);
1293                 else
1294                         adapter->tx_hang_recheck = false;
1295         }
1296         adapter->total_tx_bytes += total_tx_bytes;
1297         adapter->total_tx_packets += total_tx_packets;
1298         return count < tx_ring->count;
1299 }
1300
1301 /**
1302  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1303  * @rx_ring: Rx descriptor ring
1304  *
1305  * the return value indicates whether actual cleaning was done, there
1306  * is no guarantee that everything was cleaned
1307  **/
1308 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1309                                   int work_to_do)
1310 {
1311         struct e1000_adapter *adapter = rx_ring->adapter;
1312         struct e1000_hw *hw = &adapter->hw;
1313         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1314         struct net_device *netdev = adapter->netdev;
1315         struct pci_dev *pdev = adapter->pdev;
1316         struct e1000_buffer *buffer_info, *next_buffer;
1317         struct e1000_ps_page *ps_page;
1318         struct sk_buff *skb;
1319         unsigned int i, j;
1320         u32 length, staterr;
1321         int cleaned_count = 0;
1322         bool cleaned = false;
1323         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1324
1325         i = rx_ring->next_to_clean;
1326         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1327         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1328         buffer_info = &rx_ring->buffer_info[i];
1329
1330         while (staterr & E1000_RXD_STAT_DD) {
1331                 if (*work_done >= work_to_do)
1332                         break;
1333                 (*work_done)++;
1334                 skb = buffer_info->skb;
1335                 rmb();  /* read descriptor and rx_buffer_info after status DD */
1336
1337                 /* in the packet split case this is header only */
1338                 prefetch(skb->data - NET_IP_ALIGN);
1339
1340                 i++;
1341                 if (i == rx_ring->count)
1342                         i = 0;
1343                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1344                 prefetch(next_rxd);
1345
1346                 next_buffer = &rx_ring->buffer_info[i];
1347
1348                 cleaned = true;
1349                 cleaned_count++;
1350                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1351                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1352                 buffer_info->dma = 0;
1353
1354                 /* see !EOP comment in other Rx routine */
1355                 if (!(staterr & E1000_RXD_STAT_EOP))
1356                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1357
1358                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1359                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1360                         dev_kfree_skb_irq(skb);
1361                         if (staterr & E1000_RXD_STAT_EOP)
1362                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1363                         goto next_desc;
1364                 }
1365
1366                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1367                              !(netdev->features & NETIF_F_RXALL))) {
1368                         dev_kfree_skb_irq(skb);
1369                         goto next_desc;
1370                 }
1371
1372                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1373
1374                 if (!length) {
1375                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1376                         dev_kfree_skb_irq(skb);
1377                         goto next_desc;
1378                 }
1379
1380                 /* Good Receive */
1381                 skb_put(skb, length);
1382
1383                 {
1384                         /* this looks ugly, but it seems compiler issues make
1385                          * it more efficient than reusing j
1386                          */
1387                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1388
1389                         /* page alloc/put takes too long and effects small
1390                          * packet throughput, so unsplit small packets and
1391                          * save the alloc/put only valid in softirq (napi)
1392                          * context to call kmap_*
1393                          */
1394                         if (l1 && (l1 <= copybreak) &&
1395                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1396                                 u8 *vaddr;
1397
1398                                 ps_page = &buffer_info->ps_pages[0];
1399
1400                                 /* there is no documentation about how to call
1401                                  * kmap_atomic, so we can't hold the mapping
1402                                  * very long
1403                                  */
1404                                 dma_sync_single_for_cpu(&pdev->dev,
1405                                                         ps_page->dma,
1406                                                         PAGE_SIZE,
1407                                                         DMA_FROM_DEVICE);
1408                                 vaddr = kmap_atomic(ps_page->page);
1409                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1410                                 kunmap_atomic(vaddr);
1411                                 dma_sync_single_for_device(&pdev->dev,
1412                                                            ps_page->dma,
1413                                                            PAGE_SIZE,
1414                                                            DMA_FROM_DEVICE);
1415
1416                                 /* remove the CRC */
1417                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1418                                         if (!(netdev->features & NETIF_F_RXFCS))
1419                                                 l1 -= 4;
1420                                 }
1421
1422                                 skb_put(skb, l1);
1423                                 goto copydone;
1424                         }       /* if */
1425                 }
1426
1427                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1428                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1429                         if (!length)
1430                                 break;
1431
1432                         ps_page = &buffer_info->ps_pages[j];
1433                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1434                                        DMA_FROM_DEVICE);
1435                         ps_page->dma = 0;
1436                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1437                         ps_page->page = NULL;
1438                         skb->len += length;
1439                         skb->data_len += length;
1440                         skb->truesize += PAGE_SIZE;
1441                 }
1442
1443                 /* strip the ethernet crc, problem is we're using pages now so
1444                  * this whole operation can get a little cpu intensive
1445                  */
1446                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1447                         if (!(netdev->features & NETIF_F_RXFCS))
1448                                 pskb_trim(skb, skb->len - 4);
1449                 }
1450
1451 copydone:
1452                 total_rx_bytes += skb->len;
1453                 total_rx_packets++;
1454
1455                 e1000_rx_checksum(adapter, staterr, skb);
1456
1457                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1458
1459                 if (rx_desc->wb.upper.header_status &
1460                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1461                         adapter->rx_hdr_split++;
1462
1463                 e1000_receive_skb(adapter, netdev, skb, staterr,
1464                                   rx_desc->wb.middle.vlan);
1465
1466 next_desc:
1467                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1468                 buffer_info->skb = NULL;
1469
1470                 /* return some buffers to hardware, one at a time is too slow */
1471                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1472                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1473                                               GFP_ATOMIC);
1474                         cleaned_count = 0;
1475                 }
1476
1477                 /* use prefetched values */
1478                 rx_desc = next_rxd;
1479                 buffer_info = next_buffer;
1480
1481                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1482         }
1483         rx_ring->next_to_clean = i;
1484
1485         cleaned_count = e1000_desc_unused(rx_ring);
1486         if (cleaned_count)
1487                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1488
1489         adapter->total_rx_bytes += total_rx_bytes;
1490         adapter->total_rx_packets += total_rx_packets;
1491         return cleaned;
1492 }
1493
1494 /**
1495  * e1000_consume_page - helper function
1496  **/
1497 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1498                                u16 length)
1499 {
1500         bi->page = NULL;
1501         skb->len += length;
1502         skb->data_len += length;
1503         skb->truesize += PAGE_SIZE;
1504 }
1505
1506 /**
1507  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1508  * @adapter: board private structure
1509  *
1510  * the return value indicates whether actual cleaning was done, there
1511  * is no guarantee that everything was cleaned
1512  **/
1513 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1514                                      int work_to_do)
1515 {
1516         struct e1000_adapter *adapter = rx_ring->adapter;
1517         struct net_device *netdev = adapter->netdev;
1518         struct pci_dev *pdev = adapter->pdev;
1519         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1520         struct e1000_buffer *buffer_info, *next_buffer;
1521         u32 length, staterr;
1522         unsigned int i;
1523         int cleaned_count = 0;
1524         bool cleaned = false;
1525         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1526         struct skb_shared_info *shinfo;
1527
1528         i = rx_ring->next_to_clean;
1529         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1530         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1531         buffer_info = &rx_ring->buffer_info[i];
1532
1533         while (staterr & E1000_RXD_STAT_DD) {
1534                 struct sk_buff *skb;
1535
1536                 if (*work_done >= work_to_do)
1537                         break;
1538                 (*work_done)++;
1539                 rmb();  /* read descriptor and rx_buffer_info after status DD */
1540
1541                 skb = buffer_info->skb;
1542                 buffer_info->skb = NULL;
1543
1544                 ++i;
1545                 if (i == rx_ring->count)
1546                         i = 0;
1547                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1548                 prefetch(next_rxd);
1549
1550                 next_buffer = &rx_ring->buffer_info[i];
1551
1552                 cleaned = true;
1553                 cleaned_count++;
1554                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1555                                DMA_FROM_DEVICE);
1556                 buffer_info->dma = 0;
1557
1558                 length = le16_to_cpu(rx_desc->wb.upper.length);
1559
1560                 /* errors is only valid for DD + EOP descriptors */
1561                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1562                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1563                               !(netdev->features & NETIF_F_RXALL)))) {
1564                         /* recycle both page and skb */
1565                         buffer_info->skb = skb;
1566                         /* an error means any chain goes out the window too */
1567                         if (rx_ring->rx_skb_top)
1568                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1569                         rx_ring->rx_skb_top = NULL;
1570                         goto next_desc;
1571                 }
1572 #define rxtop (rx_ring->rx_skb_top)
1573                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1574                         /* this descriptor is only the beginning (or middle) */
1575                         if (!rxtop) {
1576                                 /* this is the beginning of a chain */
1577                                 rxtop = skb;
1578                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1579                                                    0, length);
1580                         } else {
1581                                 /* this is the middle of a chain */
1582                                 shinfo = skb_shinfo(rxtop);
1583                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1584                                                    buffer_info->page, 0,
1585                                                    length);
1586                                 /* re-use the skb, only consumed the page */
1587                                 buffer_info->skb = skb;
1588                         }
1589                         e1000_consume_page(buffer_info, rxtop, length);
1590                         goto next_desc;
1591                 } else {
1592                         if (rxtop) {
1593                                 /* end of the chain */
1594                                 shinfo = skb_shinfo(rxtop);
1595                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1596                                                    buffer_info->page, 0,
1597                                                    length);
1598                                 /* re-use the current skb, we only consumed the
1599                                  * page
1600                                  */
1601                                 buffer_info->skb = skb;
1602                                 skb = rxtop;
1603                                 rxtop = NULL;
1604                                 e1000_consume_page(buffer_info, skb, length);
1605                         } else {
1606                                 /* no chain, got EOP, this buf is the packet
1607                                  * copybreak to save the put_page/alloc_page
1608                                  */
1609                                 if (length <= copybreak &&
1610                                     skb_tailroom(skb) >= length) {
1611                                         u8 *vaddr;
1612                                         vaddr = kmap_atomic(buffer_info->page);
1613                                         memcpy(skb_tail_pointer(skb), vaddr,
1614                                                length);
1615                                         kunmap_atomic(vaddr);
1616                                         /* re-use the page, so don't erase
1617                                          * buffer_info->page
1618                                          */
1619                                         skb_put(skb, length);
1620                                 } else {
1621                                         skb_fill_page_desc(skb, 0,
1622                                                            buffer_info->page, 0,
1623                                                            length);
1624                                         e1000_consume_page(buffer_info, skb,
1625                                                            length);
1626                                 }
1627                         }
1628                 }
1629
1630                 /* Receive Checksum Offload */
1631                 e1000_rx_checksum(adapter, staterr, skb);
1632
1633                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1634
1635                 /* probably a little skewed due to removing CRC */
1636                 total_rx_bytes += skb->len;
1637                 total_rx_packets++;
1638
1639                 /* eth type trans needs skb->data to point to something */
1640                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1641                         e_err("pskb_may_pull failed.\n");
1642                         dev_kfree_skb_irq(skb);
1643                         goto next_desc;
1644                 }
1645
1646                 e1000_receive_skb(adapter, netdev, skb, staterr,
1647                                   rx_desc->wb.upper.vlan);
1648
1649 next_desc:
1650                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1651
1652                 /* return some buffers to hardware, one at a time is too slow */
1653                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1654                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1655                                               GFP_ATOMIC);
1656                         cleaned_count = 0;
1657                 }
1658
1659                 /* use prefetched values */
1660                 rx_desc = next_rxd;
1661                 buffer_info = next_buffer;
1662
1663                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1664         }
1665         rx_ring->next_to_clean = i;
1666
1667         cleaned_count = e1000_desc_unused(rx_ring);
1668         if (cleaned_count)
1669                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1670
1671         adapter->total_rx_bytes += total_rx_bytes;
1672         adapter->total_rx_packets += total_rx_packets;
1673         return cleaned;
1674 }
1675
1676 /**
1677  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1678  * @rx_ring: Rx descriptor ring
1679  **/
1680 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1681 {
1682         struct e1000_adapter *adapter = rx_ring->adapter;
1683         struct e1000_buffer *buffer_info;
1684         struct e1000_ps_page *ps_page;
1685         struct pci_dev *pdev = adapter->pdev;
1686         unsigned int i, j;
1687
1688         /* Free all the Rx ring sk_buffs */
1689         for (i = 0; i < rx_ring->count; i++) {
1690                 buffer_info = &rx_ring->buffer_info[i];
1691                 if (buffer_info->dma) {
1692                         if (adapter->clean_rx == e1000_clean_rx_irq)
1693                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1694                                                  adapter->rx_buffer_len,
1695                                                  DMA_FROM_DEVICE);
1696                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1697                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1698                                                PAGE_SIZE, DMA_FROM_DEVICE);
1699                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1700                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1701                                                  adapter->rx_ps_bsize0,
1702                                                  DMA_FROM_DEVICE);
1703                         buffer_info->dma = 0;
1704                 }
1705
1706                 if (buffer_info->page) {
1707                         put_page(buffer_info->page);
1708                         buffer_info->page = NULL;
1709                 }
1710
1711                 if (buffer_info->skb) {
1712                         dev_kfree_skb(buffer_info->skb);
1713                         buffer_info->skb = NULL;
1714                 }
1715
1716                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1717                         ps_page = &buffer_info->ps_pages[j];
1718                         if (!ps_page->page)
1719                                 break;
1720                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1721                                        DMA_FROM_DEVICE);
1722                         ps_page->dma = 0;
1723                         put_page(ps_page->page);
1724                         ps_page->page = NULL;
1725                 }
1726         }
1727
1728         /* there also may be some cached data from a chained receive */
1729         if (rx_ring->rx_skb_top) {
1730                 dev_kfree_skb(rx_ring->rx_skb_top);
1731                 rx_ring->rx_skb_top = NULL;
1732         }
1733
1734         /* Zero out the descriptor ring */
1735         memset(rx_ring->desc, 0, rx_ring->size);
1736
1737         rx_ring->next_to_clean = 0;
1738         rx_ring->next_to_use = 0;
1739         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1740
1741         writel(0, rx_ring->head);
1742         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1743                 e1000e_update_rdt_wa(rx_ring, 0);
1744         else
1745                 writel(0, rx_ring->tail);
1746 }
1747
1748 static void e1000e_downshift_workaround(struct work_struct *work)
1749 {
1750         struct e1000_adapter *adapter = container_of(work,
1751                                                      struct e1000_adapter,
1752                                                      downshift_task);
1753
1754         if (test_bit(__E1000_DOWN, &adapter->state))
1755                 return;
1756
1757         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1758 }
1759
1760 /**
1761  * e1000_intr_msi - Interrupt Handler
1762  * @irq: interrupt number
1763  * @data: pointer to a network interface device structure
1764  **/
1765 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1766 {
1767         struct net_device *netdev = data;
1768         struct e1000_adapter *adapter = netdev_priv(netdev);
1769         struct e1000_hw *hw = &adapter->hw;
1770         u32 icr = er32(ICR);
1771
1772         /* read ICR disables interrupts using IAM */
1773         if (icr & E1000_ICR_LSC) {
1774                 hw->mac.get_link_status = true;
1775                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1776                  * disconnect (LSC) before accessing any PHY registers
1777                  */
1778                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1779                     (!(er32(STATUS) & E1000_STATUS_LU)))
1780                         schedule_work(&adapter->downshift_task);
1781
1782                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1783                  * link down event; disable receives here in the ISR and reset
1784                  * adapter in watchdog
1785                  */
1786                 if (netif_carrier_ok(netdev) &&
1787                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1788                         /* disable receives */
1789                         u32 rctl = er32(RCTL);
1790
1791                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1792                         adapter->flags |= FLAG_RESTART_NOW;
1793                 }
1794                 /* guard against interrupt when we're going down */
1795                 if (!test_bit(__E1000_DOWN, &adapter->state))
1796                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1797         }
1798
1799         /* Reset on uncorrectable ECC error */
1800         if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1801                 u32 pbeccsts = er32(PBECCSTS);
1802
1803                 adapter->corr_errors +=
1804                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1805                 adapter->uncorr_errors +=
1806                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1807                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1808
1809                 /* Do the reset outside of interrupt context */
1810                 schedule_work(&adapter->reset_task);
1811
1812                 /* return immediately since reset is imminent */
1813                 return IRQ_HANDLED;
1814         }
1815
1816         if (napi_schedule_prep(&adapter->napi)) {
1817                 adapter->total_tx_bytes = 0;
1818                 adapter->total_tx_packets = 0;
1819                 adapter->total_rx_bytes = 0;
1820                 adapter->total_rx_packets = 0;
1821                 __napi_schedule(&adapter->napi);
1822         }
1823
1824         return IRQ_HANDLED;
1825 }
1826
1827 /**
1828  * e1000_intr - Interrupt Handler
1829  * @irq: interrupt number
1830  * @data: pointer to a network interface device structure
1831  **/
1832 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1833 {
1834         struct net_device *netdev = data;
1835         struct e1000_adapter *adapter = netdev_priv(netdev);
1836         struct e1000_hw *hw = &adapter->hw;
1837         u32 rctl, icr = er32(ICR);
1838
1839         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1840                 return IRQ_NONE;        /* Not our interrupt */
1841
1842         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1843          * not set, then the adapter didn't send an interrupt
1844          */
1845         if (!(icr & E1000_ICR_INT_ASSERTED))
1846                 return IRQ_NONE;
1847
1848         /* Interrupt Auto-Mask...upon reading ICR,
1849          * interrupts are masked.  No need for the
1850          * IMC write
1851          */
1852
1853         if (icr & E1000_ICR_LSC) {
1854                 hw->mac.get_link_status = true;
1855                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1856                  * disconnect (LSC) before accessing any PHY registers
1857                  */
1858                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1859                     (!(er32(STATUS) & E1000_STATUS_LU)))
1860                         schedule_work(&adapter->downshift_task);
1861
1862                 /* 80003ES2LAN workaround--
1863                  * For packet buffer work-around on link down event;
1864                  * disable receives here in the ISR and
1865                  * reset adapter in watchdog
1866                  */
1867                 if (netif_carrier_ok(netdev) &&
1868                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1869                         /* disable receives */
1870                         rctl = er32(RCTL);
1871                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1872                         adapter->flags |= FLAG_RESTART_NOW;
1873                 }
1874                 /* guard against interrupt when we're going down */
1875                 if (!test_bit(__E1000_DOWN, &adapter->state))
1876                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1877         }
1878
1879         /* Reset on uncorrectable ECC error */
1880         if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1881                 u32 pbeccsts = er32(PBECCSTS);
1882
1883                 adapter->corr_errors +=
1884                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1885                 adapter->uncorr_errors +=
1886                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1887                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1888
1889                 /* Do the reset outside of interrupt context */
1890                 schedule_work(&adapter->reset_task);
1891
1892                 /* return immediately since reset is imminent */
1893                 return IRQ_HANDLED;
1894         }
1895
1896         if (napi_schedule_prep(&adapter->napi)) {
1897                 adapter->total_tx_bytes = 0;
1898                 adapter->total_tx_packets = 0;
1899                 adapter->total_rx_bytes = 0;
1900                 adapter->total_rx_packets = 0;
1901                 __napi_schedule(&adapter->napi);
1902         }
1903
1904         return IRQ_HANDLED;
1905 }
1906
1907 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1908 {
1909         struct net_device *netdev = data;
1910         struct e1000_adapter *adapter = netdev_priv(netdev);
1911         struct e1000_hw *hw = &adapter->hw;
1912         u32 icr = er32(ICR);
1913
1914         if (!(icr & E1000_ICR_INT_ASSERTED)) {
1915                 if (!test_bit(__E1000_DOWN, &adapter->state))
1916                         ew32(IMS, E1000_IMS_OTHER);
1917                 return IRQ_NONE;
1918         }
1919
1920         if (icr & adapter->eiac_mask)
1921                 ew32(ICS, (icr & adapter->eiac_mask));
1922
1923         if (icr & E1000_ICR_OTHER) {
1924                 if (!(icr & E1000_ICR_LSC))
1925                         goto no_link_interrupt;
1926                 hw->mac.get_link_status = true;
1927                 /* guard against interrupt when we're going down */
1928                 if (!test_bit(__E1000_DOWN, &adapter->state))
1929                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1930         }
1931
1932 no_link_interrupt:
1933         if (!test_bit(__E1000_DOWN, &adapter->state))
1934                 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1935
1936         return IRQ_HANDLED;
1937 }
1938
1939 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1940 {
1941         struct net_device *netdev = data;
1942         struct e1000_adapter *adapter = netdev_priv(netdev);
1943         struct e1000_hw *hw = &adapter->hw;
1944         struct e1000_ring *tx_ring = adapter->tx_ring;
1945
1946         adapter->total_tx_bytes = 0;
1947         adapter->total_tx_packets = 0;
1948
1949         if (!e1000_clean_tx_irq(tx_ring))
1950                 /* Ring was not completely cleaned, so fire another interrupt */
1951                 ew32(ICS, tx_ring->ims_val);
1952
1953         return IRQ_HANDLED;
1954 }
1955
1956 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1957 {
1958         struct net_device *netdev = data;
1959         struct e1000_adapter *adapter = netdev_priv(netdev);
1960         struct e1000_ring *rx_ring = adapter->rx_ring;
1961
1962         /* Write the ITR value calculated at the end of the
1963          * previous interrupt.
1964          */
1965         if (rx_ring->set_itr) {
1966                 writel(1000000000 / (rx_ring->itr_val * 256),
1967                        rx_ring->itr_register);
1968                 rx_ring->set_itr = 0;
1969         }
1970
1971         if (napi_schedule_prep(&adapter->napi)) {
1972                 adapter->total_rx_bytes = 0;
1973                 adapter->total_rx_packets = 0;
1974                 __napi_schedule(&adapter->napi);
1975         }
1976         return IRQ_HANDLED;
1977 }
1978
1979 /**
1980  * e1000_configure_msix - Configure MSI-X hardware
1981  *
1982  * e1000_configure_msix sets up the hardware to properly
1983  * generate MSI-X interrupts.
1984  **/
1985 static void e1000_configure_msix(struct e1000_adapter *adapter)
1986 {
1987         struct e1000_hw *hw = &adapter->hw;
1988         struct e1000_ring *rx_ring = adapter->rx_ring;
1989         struct e1000_ring *tx_ring = adapter->tx_ring;
1990         int vector = 0;
1991         u32 ctrl_ext, ivar = 0;
1992
1993         adapter->eiac_mask = 0;
1994
1995         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1996         if (hw->mac.type == e1000_82574) {
1997                 u32 rfctl = er32(RFCTL);
1998
1999                 rfctl |= E1000_RFCTL_ACK_DIS;
2000                 ew32(RFCTL, rfctl);
2001         }
2002
2003         /* Configure Rx vector */
2004         rx_ring->ims_val = E1000_IMS_RXQ0;
2005         adapter->eiac_mask |= rx_ring->ims_val;
2006         if (rx_ring->itr_val)
2007                 writel(1000000000 / (rx_ring->itr_val * 256),
2008                        rx_ring->itr_register);
2009         else
2010                 writel(1, rx_ring->itr_register);
2011         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2012
2013         /* Configure Tx vector */
2014         tx_ring->ims_val = E1000_IMS_TXQ0;
2015         vector++;
2016         if (tx_ring->itr_val)
2017                 writel(1000000000 / (tx_ring->itr_val * 256),
2018                        tx_ring->itr_register);
2019         else
2020                 writel(1, tx_ring->itr_register);
2021         adapter->eiac_mask |= tx_ring->ims_val;
2022         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2023
2024         /* set vector for Other Causes, e.g. link changes */
2025         vector++;
2026         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2027         if (rx_ring->itr_val)
2028                 writel(1000000000 / (rx_ring->itr_val * 256),
2029                        hw->hw_addr + E1000_EITR_82574(vector));
2030         else
2031                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2032
2033         /* Cause Tx interrupts on every write back */
2034         ivar |= (1 << 31);
2035
2036         ew32(IVAR, ivar);
2037
2038         /* enable MSI-X PBA support */
2039         ctrl_ext = er32(CTRL_EXT);
2040         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
2041
2042         /* Auto-Mask Other interrupts upon ICR read */
2043         ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
2044         ctrl_ext |= E1000_CTRL_EXT_EIAME;
2045         ew32(CTRL_EXT, ctrl_ext);
2046         e1e_flush();
2047 }
2048
2049 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2050 {
2051         if (adapter->msix_entries) {
2052                 pci_disable_msix(adapter->pdev);
2053                 kfree(adapter->msix_entries);
2054                 adapter->msix_entries = NULL;
2055         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2056                 pci_disable_msi(adapter->pdev);
2057                 adapter->flags &= ~FLAG_MSI_ENABLED;
2058         }
2059 }
2060
2061 /**
2062  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2063  *
2064  * Attempt to configure interrupts using the best available
2065  * capabilities of the hardware and kernel.
2066  **/
2067 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2068 {
2069         int err;
2070         int i;
2071
2072         switch (adapter->int_mode) {
2073         case E1000E_INT_MODE_MSIX:
2074                 if (adapter->flags & FLAG_HAS_MSIX) {
2075                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2076                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2077                                                         sizeof(struct
2078                                                                msix_entry),
2079                                                         GFP_KERNEL);
2080                         if (adapter->msix_entries) {
2081                                 struct e1000_adapter *a = adapter;
2082
2083                                 for (i = 0; i < adapter->num_vectors; i++)
2084                                         adapter->msix_entries[i].entry = i;
2085
2086                                 err = pci_enable_msix_range(a->pdev,
2087                                                             a->msix_entries,
2088                                                             a->num_vectors,
2089                                                             a->num_vectors);
2090                                 if (err > 0)
2091                                         return;
2092                         }
2093                         /* MSI-X failed, so fall through and try MSI */
2094                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2095                         e1000e_reset_interrupt_capability(adapter);
2096                 }
2097                 adapter->int_mode = E1000E_INT_MODE_MSI;
2098                 /* Fall through */
2099         case E1000E_INT_MODE_MSI:
2100                 if (!pci_enable_msi(adapter->pdev)) {
2101                         adapter->flags |= FLAG_MSI_ENABLED;
2102                 } else {
2103                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2104                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2105                 }
2106                 /* Fall through */
2107         case E1000E_INT_MODE_LEGACY:
2108                 /* Don't do anything; this is the system default */
2109                 break;
2110         }
2111
2112         /* store the number of vectors being used */
2113         adapter->num_vectors = 1;
2114 }
2115
2116 /**
2117  * e1000_request_msix - Initialize MSI-X interrupts
2118  *
2119  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2120  * kernel.
2121  **/
2122 static int e1000_request_msix(struct e1000_adapter *adapter)
2123 {
2124         struct net_device *netdev = adapter->netdev;
2125         int err = 0, vector = 0;
2126
2127         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2128                 snprintf(adapter->rx_ring->name,
2129                          sizeof(adapter->rx_ring->name) - 1,
2130                          "%s-rx-0", netdev->name);
2131         else
2132                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2133         err = request_irq(adapter->msix_entries[vector].vector,
2134                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2135                           netdev);
2136         if (err)
2137                 return err;
2138         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2139             E1000_EITR_82574(vector);
2140         adapter->rx_ring->itr_val = adapter->itr;
2141         vector++;
2142
2143         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2144                 snprintf(adapter->tx_ring->name,
2145                          sizeof(adapter->tx_ring->name) - 1,
2146                          "%s-tx-0", netdev->name);
2147         else
2148                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2149         err = request_irq(adapter->msix_entries[vector].vector,
2150                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2151                           netdev);
2152         if (err)
2153                 return err;
2154         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2155             E1000_EITR_82574(vector);
2156         adapter->tx_ring->itr_val = adapter->itr;
2157         vector++;
2158
2159         err = request_irq(adapter->msix_entries[vector].vector,
2160                           e1000_msix_other, 0, netdev->name, netdev);
2161         if (err)
2162                 return err;
2163
2164         e1000_configure_msix(adapter);
2165
2166         return 0;
2167 }
2168
2169 /**
2170  * e1000_request_irq - initialize interrupts
2171  *
2172  * Attempts to configure interrupts using the best available
2173  * capabilities of the hardware and kernel.
2174  **/
2175 static int e1000_request_irq(struct e1000_adapter *adapter)
2176 {
2177         struct net_device *netdev = adapter->netdev;
2178         int err;
2179
2180         if (adapter->msix_entries) {
2181                 err = e1000_request_msix(adapter);
2182                 if (!err)
2183                         return err;
2184                 /* fall back to MSI */
2185                 e1000e_reset_interrupt_capability(adapter);
2186                 adapter->int_mode = E1000E_INT_MODE_MSI;
2187                 e1000e_set_interrupt_capability(adapter);
2188         }
2189         if (adapter->flags & FLAG_MSI_ENABLED) {
2190                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2191                                   netdev->name, netdev);
2192                 if (!err)
2193                         return err;
2194
2195                 /* fall back to legacy interrupt */
2196                 e1000e_reset_interrupt_capability(adapter);
2197                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2198         }
2199
2200         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2201                           netdev->name, netdev);
2202         if (err)
2203                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2204
2205         return err;
2206 }
2207
2208 static void e1000_free_irq(struct e1000_adapter *adapter)
2209 {
2210         struct net_device *netdev = adapter->netdev;
2211
2212         if (adapter->msix_entries) {
2213                 int vector = 0;
2214
2215                 free_irq(adapter->msix_entries[vector].vector, netdev);
2216                 vector++;
2217
2218                 free_irq(adapter->msix_entries[vector].vector, netdev);
2219                 vector++;
2220
2221                 /* Other Causes interrupt vector */
2222                 free_irq(adapter->msix_entries[vector].vector, netdev);
2223                 return;
2224         }
2225
2226         free_irq(adapter->pdev->irq, netdev);
2227 }
2228
2229 /**
2230  * e1000_irq_disable - Mask off interrupt generation on the NIC
2231  **/
2232 static void e1000_irq_disable(struct e1000_adapter *adapter)
2233 {
2234         struct e1000_hw *hw = &adapter->hw;
2235
2236         ew32(IMC, ~0);
2237         if (adapter->msix_entries)
2238                 ew32(EIAC_82574, 0);
2239         e1e_flush();
2240
2241         if (adapter->msix_entries) {
2242                 int i;
2243
2244                 for (i = 0; i < adapter->num_vectors; i++)
2245                         synchronize_irq(adapter->msix_entries[i].vector);
2246         } else {
2247                 synchronize_irq(adapter->pdev->irq);
2248         }
2249 }
2250
2251 /**
2252  * e1000_irq_enable - Enable default interrupt generation settings
2253  **/
2254 static void e1000_irq_enable(struct e1000_adapter *adapter)
2255 {
2256         struct e1000_hw *hw = &adapter->hw;
2257
2258         if (adapter->msix_entries) {
2259                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2260                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2261         } else if (hw->mac.type == e1000_pch_lpt) {
2262                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2263         } else {
2264                 ew32(IMS, IMS_ENABLE_MASK);
2265         }
2266         e1e_flush();
2267 }
2268
2269 /**
2270  * e1000e_get_hw_control - get control of the h/w from f/w
2271  * @adapter: address of board private structure
2272  *
2273  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2274  * For ASF and Pass Through versions of f/w this means that
2275  * the driver is loaded. For AMT version (only with 82573)
2276  * of the f/w this means that the network i/f is open.
2277  **/
2278 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2279 {
2280         struct e1000_hw *hw = &adapter->hw;
2281         u32 ctrl_ext;
2282         u32 swsm;
2283
2284         /* Let firmware know the driver has taken over */
2285         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2286                 swsm = er32(SWSM);
2287                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2288         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2289                 ctrl_ext = er32(CTRL_EXT);
2290                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2291         }
2292 }
2293
2294 /**
2295  * e1000e_release_hw_control - release control of the h/w to f/w
2296  * @adapter: address of board private structure
2297  *
2298  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2299  * For ASF and Pass Through versions of f/w this means that the
2300  * driver is no longer loaded. For AMT version (only with 82573) i
2301  * of the f/w this means that the network i/f is closed.
2302  *
2303  **/
2304 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2305 {
2306         struct e1000_hw *hw = &adapter->hw;
2307         u32 ctrl_ext;
2308         u32 swsm;
2309
2310         /* Let firmware taken over control of h/w */
2311         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2312                 swsm = er32(SWSM);
2313                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2314         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2315                 ctrl_ext = er32(CTRL_EXT);
2316                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2317         }
2318 }
2319
2320 /**
2321  * e1000_alloc_ring_dma - allocate memory for a ring structure
2322  **/
2323 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2324                                 struct e1000_ring *ring)
2325 {
2326         struct pci_dev *pdev = adapter->pdev;
2327
2328         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2329                                         GFP_KERNEL);
2330         if (!ring->desc)
2331                 return -ENOMEM;
2332
2333         return 0;
2334 }
2335
2336 /**
2337  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2338  * @tx_ring: Tx descriptor ring
2339  *
2340  * Return 0 on success, negative on failure
2341  **/
2342 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2343 {
2344         struct e1000_adapter *adapter = tx_ring->adapter;
2345         int err = -ENOMEM, size;
2346
2347         size = sizeof(struct e1000_buffer) * tx_ring->count;
2348         tx_ring->buffer_info = vzalloc(size);
2349         if (!tx_ring->buffer_info)
2350                 goto err;
2351
2352         /* round up to nearest 4K */
2353         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2354         tx_ring->size = ALIGN(tx_ring->size, 4096);
2355
2356         err = e1000_alloc_ring_dma(adapter, tx_ring);
2357         if (err)
2358                 goto err;
2359
2360         tx_ring->next_to_use = 0;
2361         tx_ring->next_to_clean = 0;
2362
2363         return 0;
2364 err:
2365         vfree(tx_ring->buffer_info);
2366         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2367         return err;
2368 }
2369
2370 /**
2371  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2372  * @rx_ring: Rx descriptor ring
2373  *
2374  * Returns 0 on success, negative on failure
2375  **/
2376 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2377 {
2378         struct e1000_adapter *adapter = rx_ring->adapter;
2379         struct e1000_buffer *buffer_info;
2380         int i, size, desc_len, err = -ENOMEM;
2381
2382         size = sizeof(struct e1000_buffer) * rx_ring->count;
2383         rx_ring->buffer_info = vzalloc(size);
2384         if (!rx_ring->buffer_info)
2385                 goto err;
2386
2387         for (i = 0; i < rx_ring->count; i++) {
2388                 buffer_info = &rx_ring->buffer_info[i];
2389                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2390                                                 sizeof(struct e1000_ps_page),
2391                                                 GFP_KERNEL);
2392                 if (!buffer_info->ps_pages)
2393                         goto err_pages;
2394         }
2395
2396         desc_len = sizeof(union e1000_rx_desc_packet_split);
2397
2398         /* Round up to nearest 4K */
2399         rx_ring->size = rx_ring->count * desc_len;
2400         rx_ring->size = ALIGN(rx_ring->size, 4096);
2401
2402         err = e1000_alloc_ring_dma(adapter, rx_ring);
2403         if (err)
2404                 goto err_pages;
2405
2406         rx_ring->next_to_clean = 0;
2407         rx_ring->next_to_use = 0;
2408         rx_ring->rx_skb_top = NULL;
2409
2410         return 0;
2411
2412 err_pages:
2413         for (i = 0; i < rx_ring->count; i++) {
2414                 buffer_info = &rx_ring->buffer_info[i];
2415                 kfree(buffer_info->ps_pages);
2416         }
2417 err:
2418         vfree(rx_ring->buffer_info);
2419         e_err("Unable to allocate memory for the receive descriptor ring\n");
2420         return err;
2421 }
2422
2423 /**
2424  * e1000_clean_tx_ring - Free Tx Buffers
2425  * @tx_ring: Tx descriptor ring
2426  **/
2427 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2428 {
2429         struct e1000_adapter *adapter = tx_ring->adapter;
2430         struct e1000_buffer *buffer_info;
2431         unsigned long size;
2432         unsigned int i;
2433
2434         for (i = 0; i < tx_ring->count; i++) {
2435                 buffer_info = &tx_ring->buffer_info[i];
2436                 e1000_put_txbuf(tx_ring, buffer_info);
2437         }
2438
2439         netdev_reset_queue(adapter->netdev);
2440         size = sizeof(struct e1000_buffer) * tx_ring->count;
2441         memset(tx_ring->buffer_info, 0, size);
2442
2443         memset(tx_ring->desc, 0, tx_ring->size);
2444
2445         tx_ring->next_to_use = 0;
2446         tx_ring->next_to_clean = 0;
2447
2448         writel(0, tx_ring->head);
2449         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2450                 e1000e_update_tdt_wa(tx_ring, 0);
2451         else
2452                 writel(0, tx_ring->tail);
2453 }
2454
2455 /**
2456  * e1000e_free_tx_resources - Free Tx Resources per Queue
2457  * @tx_ring: Tx descriptor ring
2458  *
2459  * Free all transmit software resources
2460  **/
2461 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2462 {
2463         struct e1000_adapter *adapter = tx_ring->adapter;
2464         struct pci_dev *pdev = adapter->pdev;
2465
2466         e1000_clean_tx_ring(tx_ring);
2467
2468         vfree(tx_ring->buffer_info);
2469         tx_ring->buffer_info = NULL;
2470
2471         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2472                           tx_ring->dma);
2473         tx_ring->desc = NULL;
2474 }
2475
2476 /**
2477  * e1000e_free_rx_resources - Free Rx Resources
2478  * @rx_ring: Rx descriptor ring
2479  *
2480  * Free all receive software resources
2481  **/
2482 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2483 {
2484         struct e1000_adapter *adapter = rx_ring->adapter;
2485         struct pci_dev *pdev = adapter->pdev;
2486         int i;
2487
2488         e1000_clean_rx_ring(rx_ring);
2489
2490         for (i = 0; i < rx_ring->count; i++)
2491                 kfree(rx_ring->buffer_info[i].ps_pages);
2492
2493         vfree(rx_ring->buffer_info);
2494         rx_ring->buffer_info = NULL;
2495
2496         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2497                           rx_ring->dma);
2498         rx_ring->desc = NULL;
2499 }
2500
2501 /**
2502  * e1000_update_itr - update the dynamic ITR value based on statistics
2503  * @adapter: pointer to adapter
2504  * @itr_setting: current adapter->itr
2505  * @packets: the number of packets during this measurement interval
2506  * @bytes: the number of bytes during this measurement interval
2507  *
2508  *      Stores a new ITR value based on packets and byte
2509  *      counts during the last interrupt.  The advantage of per interrupt
2510  *      computation is faster updates and more accurate ITR for the current
2511  *      traffic pattern.  Constants in this function were computed
2512  *      based on theoretical maximum wire speed and thresholds were set based
2513  *      on testing data as well as attempting to minimize response time
2514  *      while increasing bulk throughput.  This functionality is controlled
2515  *      by the InterruptThrottleRate module parameter.
2516  **/
2517 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2518 {
2519         unsigned int retval = itr_setting;
2520
2521         if (packets == 0)
2522                 return itr_setting;
2523
2524         switch (itr_setting) {
2525         case lowest_latency:
2526                 /* handle TSO and jumbo frames */
2527                 if (bytes / packets > 8000)
2528                         retval = bulk_latency;
2529                 else if ((packets < 5) && (bytes > 512))
2530                         retval = low_latency;
2531                 break;
2532         case low_latency:       /* 50 usec aka 20000 ints/s */
2533                 if (bytes > 10000) {
2534                         /* this if handles the TSO accounting */
2535                         if (bytes / packets > 8000)
2536                                 retval = bulk_latency;
2537                         else if ((packets < 10) || ((bytes / packets) > 1200))
2538                                 retval = bulk_latency;
2539                         else if ((packets > 35))
2540                                 retval = lowest_latency;
2541                 } else if (bytes / packets > 2000) {
2542                         retval = bulk_latency;
2543                 } else if (packets <= 2 && bytes < 512) {
2544                         retval = lowest_latency;
2545                 }
2546                 break;
2547         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2548                 if (bytes > 25000) {
2549                         if (packets > 35)
2550                                 retval = low_latency;
2551                 } else if (bytes < 6000) {
2552                         retval = low_latency;
2553                 }
2554                 break;
2555         }
2556
2557         return retval;
2558 }
2559
2560 static void e1000_set_itr(struct e1000_adapter *adapter)
2561 {
2562         u16 current_itr;
2563         u32 new_itr = adapter->itr;
2564
2565         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2566         if (adapter->link_speed != SPEED_1000) {
2567                 current_itr = 0;
2568                 new_itr = 4000;
2569                 goto set_itr_now;
2570         }
2571
2572         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2573                 new_itr = 0;
2574                 goto set_itr_now;
2575         }
2576
2577         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2578                                            adapter->total_tx_packets,
2579                                            adapter->total_tx_bytes);
2580         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2581         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2582                 adapter->tx_itr = low_latency;
2583
2584         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2585                                            adapter->total_rx_packets,
2586                                            adapter->total_rx_bytes);
2587         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2588         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2589                 adapter->rx_itr = low_latency;
2590
2591         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2592
2593         /* counts and packets in update_itr are dependent on these numbers */
2594         switch (current_itr) {
2595         case lowest_latency:
2596                 new_itr = 70000;
2597                 break;
2598         case low_latency:
2599                 new_itr = 20000;        /* aka hwitr = ~200 */
2600                 break;
2601         case bulk_latency:
2602                 new_itr = 4000;
2603                 break;
2604         default:
2605                 break;
2606         }
2607
2608 set_itr_now:
2609         if (new_itr != adapter->itr) {
2610                 /* this attempts to bias the interrupt rate towards Bulk
2611                  * by adding intermediate steps when interrupt rate is
2612                  * increasing
2613                  */
2614                 new_itr = new_itr > adapter->itr ?
2615                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2616                 adapter->itr = new_itr;
2617                 adapter->rx_ring->itr_val = new_itr;
2618                 if (adapter->msix_entries)
2619                         adapter->rx_ring->set_itr = 1;
2620                 else
2621                         e1000e_write_itr(adapter, new_itr);
2622         }
2623 }
2624
2625 /**
2626  * e1000e_write_itr - write the ITR value to the appropriate registers
2627  * @adapter: address of board private structure
2628  * @itr: new ITR value to program
2629  *
2630  * e1000e_write_itr determines if the adapter is in MSI-X mode
2631  * and, if so, writes the EITR registers with the ITR value.
2632  * Otherwise, it writes the ITR value into the ITR register.
2633  **/
2634 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2635 {
2636         struct e1000_hw *hw = &adapter->hw;
2637         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2638
2639         if (adapter->msix_entries) {
2640                 int vector;
2641
2642                 for (vector = 0; vector < adapter->num_vectors; vector++)
2643                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2644         } else {
2645                 ew32(ITR, new_itr);
2646         }
2647 }
2648
2649 /**
2650  * e1000_alloc_queues - Allocate memory for all rings
2651  * @adapter: board private structure to initialize
2652  **/
2653 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2654 {
2655         int size = sizeof(struct e1000_ring);
2656
2657         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2658         if (!adapter->tx_ring)
2659                 goto err;
2660         adapter->tx_ring->count = adapter->tx_ring_count;
2661         adapter->tx_ring->adapter = adapter;
2662
2663         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2664         if (!adapter->rx_ring)
2665                 goto err;
2666         adapter->rx_ring->count = adapter->rx_ring_count;
2667         adapter->rx_ring->adapter = adapter;
2668
2669         return 0;
2670 err:
2671         e_err("Unable to allocate memory for queues\n");
2672         kfree(adapter->rx_ring);
2673         kfree(adapter->tx_ring);
2674         return -ENOMEM;
2675 }
2676
2677 /**
2678  * e1000e_poll - NAPI Rx polling callback
2679  * @napi: struct associated with this polling callback
2680  * @weight: number of packets driver is allowed to process this poll
2681  **/
2682 static int e1000e_poll(struct napi_struct *napi, int weight)
2683 {
2684         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2685                                                      napi);
2686         struct e1000_hw *hw = &adapter->hw;
2687         struct net_device *poll_dev = adapter->netdev;
2688         int tx_cleaned = 1, work_done = 0;
2689
2690         adapter = netdev_priv(poll_dev);
2691
2692         if (!adapter->msix_entries ||
2693             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2694                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2695
2696         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2697
2698         if (!tx_cleaned)
2699                 work_done = weight;
2700
2701         /* If weight not fully consumed, exit the polling mode */
2702         if (work_done < weight) {
2703                 if (adapter->itr_setting & 3)
2704                         e1000_set_itr(adapter);
2705                 napi_complete(napi);
2706                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2707                         if (adapter->msix_entries)
2708                                 ew32(IMS, adapter->rx_ring->ims_val);
2709                         else
2710                                 e1000_irq_enable(adapter);
2711                 }
2712         }
2713
2714         return work_done;
2715 }
2716
2717 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2718                                  __always_unused __be16 proto, u16 vid)
2719 {
2720         struct e1000_adapter *adapter = netdev_priv(netdev);
2721         struct e1000_hw *hw = &adapter->hw;
2722         u32 vfta, index;
2723
2724         /* don't update vlan cookie if already programmed */
2725         if ((adapter->hw.mng_cookie.status &
2726              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2727             (vid == adapter->mng_vlan_id))
2728                 return 0;
2729
2730         /* add VID to filter table */
2731         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2732                 index = (vid >> 5) & 0x7F;
2733                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2734                 vfta |= (1 << (vid & 0x1F));
2735                 hw->mac.ops.write_vfta(hw, index, vfta);
2736         }
2737
2738         set_bit(vid, adapter->active_vlans);
2739
2740         return 0;
2741 }
2742
2743 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2744                                   __always_unused __be16 proto, u16 vid)
2745 {
2746         struct e1000_adapter *adapter = netdev_priv(netdev);
2747         struct e1000_hw *hw = &adapter->hw;
2748         u32 vfta, index;
2749
2750         if ((adapter->hw.mng_cookie.status &
2751              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2752             (vid == adapter->mng_vlan_id)) {
2753                 /* release control to f/w */
2754                 e1000e_release_hw_control(adapter);
2755                 return 0;
2756         }
2757
2758         /* remove VID from filter table */
2759         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2760                 index = (vid >> 5) & 0x7F;
2761                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2762                 vfta &= ~(1 << (vid & 0x1F));
2763                 hw->mac.ops.write_vfta(hw, index, vfta);
2764         }
2765
2766         clear_bit(vid, adapter->active_vlans);
2767
2768         return 0;
2769 }
2770
2771 /**
2772  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2773  * @adapter: board private structure to initialize
2774  **/
2775 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2776 {
2777         struct net_device *netdev = adapter->netdev;
2778         struct e1000_hw *hw = &adapter->hw;
2779         u32 rctl;
2780
2781         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2782                 /* disable VLAN receive filtering */
2783                 rctl = er32(RCTL);
2784                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2785                 ew32(RCTL, rctl);
2786
2787                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2788                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2789                                                adapter->mng_vlan_id);
2790                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2791                 }
2792         }
2793 }
2794
2795 /**
2796  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2797  * @adapter: board private structure to initialize
2798  **/
2799 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2800 {
2801         struct e1000_hw *hw = &adapter->hw;
2802         u32 rctl;
2803
2804         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2805                 /* enable VLAN receive filtering */
2806                 rctl = er32(RCTL);
2807                 rctl |= E1000_RCTL_VFE;
2808                 rctl &= ~E1000_RCTL_CFIEN;
2809                 ew32(RCTL, rctl);
2810         }
2811 }
2812
2813 /**
2814  * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2815  * @adapter: board private structure to initialize
2816  **/
2817 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2818 {
2819         struct e1000_hw *hw = &adapter->hw;
2820         u32 ctrl;
2821
2822         /* disable VLAN tag insert/strip */
2823         ctrl = er32(CTRL);
2824         ctrl &= ~E1000_CTRL_VME;
2825         ew32(CTRL, ctrl);
2826 }
2827
2828 /**
2829  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2830  * @adapter: board private structure to initialize
2831  **/
2832 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2833 {
2834         struct e1000_hw *hw = &adapter->hw;
2835         u32 ctrl;
2836
2837         /* enable VLAN tag insert/strip */
2838         ctrl = er32(CTRL);
2839         ctrl |= E1000_CTRL_VME;
2840         ew32(CTRL, ctrl);
2841 }
2842
2843 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2844 {
2845         struct net_device *netdev = adapter->netdev;
2846         u16 vid = adapter->hw.mng_cookie.vlan_id;
2847         u16 old_vid = adapter->mng_vlan_id;
2848
2849         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2850                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2851                 adapter->mng_vlan_id = vid;
2852         }
2853
2854         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2855                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2856 }
2857
2858 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2859 {
2860         u16 vid;
2861
2862         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2863
2864         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2865             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2866 }
2867
2868 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2869 {
2870         struct e1000_hw *hw = &adapter->hw;
2871         u32 manc, manc2h, mdef, i, j;
2872
2873         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2874                 return;
2875
2876         manc = er32(MANC);
2877
2878         /* enable receiving management packets to the host. this will probably
2879          * generate destination unreachable messages from the host OS, but
2880          * the packets will be handled on SMBUS
2881          */
2882         manc |= E1000_MANC_EN_MNG2HOST;
2883         manc2h = er32(MANC2H);
2884
2885         switch (hw->mac.type) {
2886         default:
2887                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2888                 break;
2889         case e1000_82574:
2890         case e1000_82583:
2891                 /* Check if IPMI pass-through decision filter already exists;
2892                  * if so, enable it.
2893                  */
2894                 for (i = 0, j = 0; i < 8; i++) {
2895                         mdef = er32(MDEF(i));
2896
2897                         /* Ignore filters with anything other than IPMI ports */
2898                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2899                                 continue;
2900
2901                         /* Enable this decision filter in MANC2H */
2902                         if (mdef)
2903                                 manc2h |= (1 << i);
2904
2905                         j |= mdef;
2906                 }
2907
2908                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2909                         break;
2910
2911                 /* Create new decision filter in an empty filter */
2912                 for (i = 0, j = 0; i < 8; i++)
2913                         if (er32(MDEF(i)) == 0) {
2914                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2915                                                E1000_MDEF_PORT_664));
2916                                 manc2h |= (1 << 1);
2917                                 j++;
2918                                 break;
2919                         }
2920
2921                 if (!j)
2922                         e_warn("Unable to create IPMI pass-through filter\n");
2923                 break;
2924         }
2925
2926         ew32(MANC2H, manc2h);
2927         ew32(MANC, manc);
2928 }
2929
2930 /**
2931  * e1000_configure_tx - Configure Transmit Unit after Reset
2932  * @adapter: board private structure
2933  *
2934  * Configure the Tx unit of the MAC after a reset.
2935  **/
2936 static void e1000_configure_tx(struct e1000_adapter *adapter)
2937 {
2938         struct e1000_hw *hw = &adapter->hw;
2939         struct e1000_ring *tx_ring = adapter->tx_ring;
2940         u64 tdba;
2941         u32 tdlen, tctl, tarc;
2942
2943         /* Setup the HW Tx Head and Tail descriptor pointers */
2944         tdba = tx_ring->dma;
2945         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2946         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2947         ew32(TDBAH(0), (tdba >> 32));
2948         ew32(TDLEN(0), tdlen);
2949         ew32(TDH(0), 0);
2950         ew32(TDT(0), 0);
2951         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2952         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2953
2954         /* Set the Tx Interrupt Delay register */
2955         ew32(TIDV, adapter->tx_int_delay);
2956         /* Tx irq moderation */
2957         ew32(TADV, adapter->tx_abs_int_delay);
2958
2959         if (adapter->flags2 & FLAG2_DMA_BURST) {
2960                 u32 txdctl = er32(TXDCTL(0));
2961
2962                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2963                             E1000_TXDCTL_WTHRESH);
2964                 /* set up some performance related parameters to encourage the
2965                  * hardware to use the bus more efficiently in bursts, depends
2966                  * on the tx_int_delay to be enabled,
2967                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2968                  * hthresh = 1 ==> prefetch when one or more available
2969                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2970                  * BEWARE: this seems to work but should be considered first if
2971                  * there are Tx hangs or other Tx related bugs
2972                  */
2973                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2974                 ew32(TXDCTL(0), txdctl);
2975         }
2976         /* erratum work around: set txdctl the same for both queues */
2977         ew32(TXDCTL(1), er32(TXDCTL(0)));
2978
2979         /* Program the Transmit Control Register */
2980         tctl = er32(TCTL);
2981         tctl &= ~E1000_TCTL_CT;
2982         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2983                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2984
2985         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2986                 tarc = er32(TARC(0));
2987                 /* set the speed mode bit, we'll clear it if we're not at
2988                  * gigabit link later
2989                  */
2990 #define SPEED_MODE_BIT (1 << 21)
2991                 tarc |= SPEED_MODE_BIT;
2992                 ew32(TARC(0), tarc);
2993         }
2994
2995         /* errata: program both queues to unweighted RR */
2996         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2997                 tarc = er32(TARC(0));
2998                 tarc |= 1;
2999                 ew32(TARC(0), tarc);
3000                 tarc = er32(TARC(1));
3001                 tarc |= 1;
3002                 ew32(TARC(1), tarc);
3003         }
3004
3005         /* Setup Transmit Descriptor Settings for eop descriptor */
3006         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3007
3008         /* only set IDE if we are delaying interrupts using the timers */
3009         if (adapter->tx_int_delay)
3010                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3011
3012         /* enable Report Status bit */
3013         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3014
3015         ew32(TCTL, tctl);
3016
3017         hw->mac.ops.config_collision_dist(hw);
3018 }
3019
3020 /**
3021  * e1000_setup_rctl - configure the receive control registers
3022  * @adapter: Board private structure
3023  **/
3024 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3025                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3026 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3027 {
3028         struct e1000_hw *hw = &adapter->hw;
3029         u32 rctl, rfctl;
3030         u32 pages = 0;
3031
3032         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3033          * If jumbo frames not set, program related MAC/PHY registers
3034          * to h/w defaults
3035          */
3036         if (hw->mac.type >= e1000_pch2lan) {
3037                 s32 ret_val;
3038
3039                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3040                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3041                 else
3042                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3043
3044                 if (ret_val)
3045                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3046         }
3047
3048         /* Program MC offset vector base */
3049         rctl = er32(RCTL);
3050         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3051         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3052             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3053             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3054
3055         /* Do not Store bad packets */
3056         rctl &= ~E1000_RCTL_SBP;
3057
3058         /* Enable Long Packet receive */
3059         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3060                 rctl &= ~E1000_RCTL_LPE;
3061         else
3062                 rctl |= E1000_RCTL_LPE;
3063
3064         /* Some systems expect that the CRC is included in SMBUS traffic. The
3065          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3066          * host memory when this is enabled
3067          */
3068         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3069                 rctl |= E1000_RCTL_SECRC;
3070
3071         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3072         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3073                 u16 phy_data;
3074
3075                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3076                 phy_data &= 0xfff8;
3077                 phy_data |= (1 << 2);
3078                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3079
3080                 e1e_rphy(hw, 22, &phy_data);
3081                 phy_data &= 0x0fff;
3082                 phy_data |= (1 << 14);
3083                 e1e_wphy(hw, 0x10, 0x2823);
3084                 e1e_wphy(hw, 0x11, 0x0003);
3085                 e1e_wphy(hw, 22, phy_data);
3086         }
3087
3088         /* Setup buffer sizes */
3089         rctl &= ~E1000_RCTL_SZ_4096;
3090         rctl |= E1000_RCTL_BSEX;
3091         switch (adapter->rx_buffer_len) {
3092         case 2048:
3093         default:
3094                 rctl |= E1000_RCTL_SZ_2048;
3095                 rctl &= ~E1000_RCTL_BSEX;
3096                 break;
3097         case 4096:
3098                 rctl |= E1000_RCTL_SZ_4096;
3099                 break;
3100         case 8192:
3101                 rctl |= E1000_RCTL_SZ_8192;
3102                 break;
3103         case 16384:
3104                 rctl |= E1000_RCTL_SZ_16384;
3105                 break;
3106         }
3107
3108         /* Enable Extended Status in all Receive Descriptors */
3109         rfctl = er32(RFCTL);
3110         rfctl |= E1000_RFCTL_EXTEN;
3111         ew32(RFCTL, rfctl);
3112
3113         /* 82571 and greater support packet-split where the protocol
3114          * header is placed in skb->data and the packet data is
3115          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3116          * In the case of a non-split, skb->data is linearly filled,
3117          * followed by the page buffers.  Therefore, skb->data is
3118          * sized to hold the largest protocol header.
3119          *
3120          * allocations using alloc_page take too long for regular MTU
3121          * so only enable packet split for jumbo frames
3122          *
3123          * Using pages when the page size is greater than 16k wastes
3124          * a lot of memory, since we allocate 3 pages at all times
3125          * per packet.
3126          */
3127         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3128         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3129                 adapter->rx_ps_pages = pages;
3130         else
3131                 adapter->rx_ps_pages = 0;
3132
3133         if (adapter->rx_ps_pages) {
3134                 u32 psrctl = 0;
3135
3136                 /* Enable Packet split descriptors */
3137                 rctl |= E1000_RCTL_DTYP_PS;
3138
3139                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3140
3141                 switch (adapter->rx_ps_pages) {
3142                 case 3:
3143                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3144                         /* fall-through */
3145                 case 2:
3146                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3147                         /* fall-through */
3148                 case 1:
3149                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3150                         break;
3151                 }
3152
3153                 ew32(PSRCTL, psrctl);
3154         }
3155
3156         /* This is useful for sniffing bad packets. */
3157         if (adapter->netdev->features & NETIF_F_RXALL) {
3158                 /* UPE and MPE will be handled by normal PROMISC logic
3159                  * in e1000e_set_rx_mode
3160                  */
3161                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3162                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3163                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3164
3165                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3166                           E1000_RCTL_DPF |      /* Allow filtered pause */
3167                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3168                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3169                  * and that breaks VLANs.
3170                  */
3171         }
3172
3173         ew32(RCTL, rctl);
3174         /* just started the receive unit, no need to restart */
3175         adapter->flags &= ~FLAG_RESTART_NOW;
3176 }
3177
3178 /**
3179  * e1000_configure_rx - Configure Receive Unit after Reset
3180  * @adapter: board private structure
3181  *
3182  * Configure the Rx unit of the MAC after a reset.
3183  **/
3184 static void e1000_configure_rx(struct e1000_adapter *adapter)
3185 {
3186         struct e1000_hw *hw = &adapter->hw;
3187         struct e1000_ring *rx_ring = adapter->rx_ring;
3188         u64 rdba;
3189         u32 rdlen, rctl, rxcsum, ctrl_ext;
3190
3191         if (adapter->rx_ps_pages) {
3192                 /* this is a 32 byte descriptor */
3193                 rdlen = rx_ring->count *
3194                     sizeof(union e1000_rx_desc_packet_split);
3195                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3196                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3197         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3198                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3199                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3200                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3201         } else {
3202                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3203                 adapter->clean_rx = e1000_clean_rx_irq;
3204                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3205         }
3206
3207         /* disable receives while setting up the descriptors */
3208         rctl = er32(RCTL);
3209         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3210                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3211         e1e_flush();
3212         usleep_range(10000, 20000);
3213
3214         if (adapter->flags2 & FLAG2_DMA_BURST) {
3215                 /* set the writeback threshold (only takes effect if the RDTR
3216                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3217                  * enable prefetching of 0x20 Rx descriptors
3218                  * granularity = 01
3219                  * wthresh = 04,
3220                  * hthresh = 04,
3221                  * pthresh = 0x20
3222                  */
3223                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3224                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3225
3226                 /* override the delay timers for enabling bursting, only if
3227                  * the value was not set by the user via module options
3228                  */
3229                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3230                         adapter->rx_int_delay = BURST_RDTR;
3231                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3232                         adapter->rx_abs_int_delay = BURST_RADV;
3233         }
3234
3235         /* set the Receive Delay Timer Register */
3236         ew32(RDTR, adapter->rx_int_delay);
3237
3238         /* irq moderation */
3239         ew32(RADV, adapter->rx_abs_int_delay);
3240         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3241                 e1000e_write_itr(adapter, adapter->itr);
3242
3243         ctrl_ext = er32(CTRL_EXT);
3244         /* Auto-Mask interrupts upon ICR access */
3245         ctrl_ext |= E1000_CTRL_EXT_IAME;
3246         ew32(IAM, 0xffffffff);
3247         ew32(CTRL_EXT, ctrl_ext);
3248         e1e_flush();
3249
3250         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3251          * the Base and Length of the Rx Descriptor Ring
3252          */
3253         rdba = rx_ring->dma;
3254         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3255         ew32(RDBAH(0), (rdba >> 32));
3256         ew32(RDLEN(0), rdlen);
3257         ew32(RDH(0), 0);
3258         ew32(RDT(0), 0);
3259         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3260         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3261
3262         /* Enable Receive Checksum Offload for TCP and UDP */
3263         rxcsum = er32(RXCSUM);
3264         if (adapter->netdev->features & NETIF_F_RXCSUM)
3265                 rxcsum |= E1000_RXCSUM_TUOFL;
3266         else
3267                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3268         ew32(RXCSUM, rxcsum);
3269
3270         /* With jumbo frames, excessive C-state transition latencies result
3271          * in dropped transactions.
3272          */
3273         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3274                 u32 lat =
3275                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3276                      adapter->max_frame_size) * 8 / 1000;
3277
3278                 if (adapter->flags & FLAG_IS_ICH) {
3279                         u32 rxdctl = er32(RXDCTL(0));
3280
3281                         ew32(RXDCTL(0), rxdctl | 0x3);
3282                 }
3283
3284                 pm_qos_update_request(&adapter->netdev->pm_qos_req, lat);
3285         } else {
3286                 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3287                                       PM_QOS_DEFAULT_VALUE);
3288         }
3289
3290         /* Enable Receives */
3291         ew32(RCTL, rctl);
3292 }
3293
3294 /**
3295  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3296  * @netdev: network interface device structure
3297  *
3298  * Writes multicast address list to the MTA hash table.
3299  * Returns: -ENOMEM on failure
3300  *                0 on no addresses written
3301  *                X on writing X addresses to MTA
3302  */
3303 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3304 {
3305         struct e1000_adapter *adapter = netdev_priv(netdev);
3306         struct e1000_hw *hw = &adapter->hw;
3307         struct netdev_hw_addr *ha;
3308         u8 *mta_list;
3309         int i;
3310
3311         if (netdev_mc_empty(netdev)) {
3312                 /* nothing to program, so clear mc list */
3313                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3314                 return 0;
3315         }
3316
3317         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3318         if (!mta_list)
3319                 return -ENOMEM;
3320
3321         /* update_mc_addr_list expects a packed array of only addresses. */
3322         i = 0;
3323         netdev_for_each_mc_addr(ha, netdev)
3324             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3325
3326         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3327         kfree(mta_list);
3328
3329         return netdev_mc_count(netdev);
3330 }
3331
3332 /**
3333  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3334  * @netdev: network interface device structure
3335  *
3336  * Writes unicast address list to the RAR table.
3337  * Returns: -ENOMEM on failure/insufficient address space
3338  *                0 on no addresses written
3339  *                X on writing X addresses to the RAR table
3340  **/
3341 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3342 {
3343         struct e1000_adapter *adapter = netdev_priv(netdev);
3344         struct e1000_hw *hw = &adapter->hw;
3345         unsigned int rar_entries;
3346         int count = 0;
3347
3348         rar_entries = hw->mac.ops.rar_get_count(hw);
3349
3350         /* save a rar entry for our hardware address */
3351         rar_entries--;
3352
3353         /* save a rar entry for the LAA workaround */
3354         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3355                 rar_entries--;
3356
3357         /* return ENOMEM indicating insufficient memory for addresses */
3358         if (netdev_uc_count(netdev) > rar_entries)
3359                 return -ENOMEM;
3360
3361         if (!netdev_uc_empty(netdev) && rar_entries) {
3362                 struct netdev_hw_addr *ha;
3363
3364                 /* write the addresses in reverse order to avoid write
3365                  * combining
3366                  */
3367                 netdev_for_each_uc_addr(ha, netdev) {
3368                         int rval;
3369
3370                         if (!rar_entries)
3371                                 break;
3372                         rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3373                         if (rval < 0)
3374                                 return -ENOMEM;
3375                         count++;
3376                 }
3377         }
3378
3379         /* zero out the remaining RAR entries not used above */
3380         for (; rar_entries > 0; rar_entries--) {
3381                 ew32(RAH(rar_entries), 0);
3382                 ew32(RAL(rar_entries), 0);
3383         }
3384         e1e_flush();
3385
3386         return count;
3387 }
3388
3389 /**
3390  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3391  * @netdev: network interface device structure
3392  *
3393  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3394  * address list or the network interface flags are updated.  This routine is
3395  * responsible for configuring the hardware for proper unicast, multicast,
3396  * promiscuous mode, and all-multi behavior.
3397  **/
3398 static void e1000e_set_rx_mode(struct net_device *netdev)
3399 {
3400         struct e1000_adapter *adapter = netdev_priv(netdev);
3401         struct e1000_hw *hw = &adapter->hw;
3402         u32 rctl;
3403
3404         if (pm_runtime_suspended(netdev->dev.parent))
3405                 return;
3406
3407         /* Check for Promiscuous and All Multicast modes */
3408         rctl = er32(RCTL);
3409
3410         /* clear the affected bits */
3411         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3412
3413         if (netdev->flags & IFF_PROMISC) {
3414                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3415                 /* Do not hardware filter VLANs in promisc mode */
3416                 e1000e_vlan_filter_disable(adapter);
3417         } else {
3418                 int count;
3419
3420                 if (netdev->flags & IFF_ALLMULTI) {
3421                         rctl |= E1000_RCTL_MPE;
3422                 } else {
3423                         /* Write addresses to the MTA, if the attempt fails
3424                          * then we should just turn on promiscuous mode so
3425                          * that we can at least receive multicast traffic
3426                          */
3427                         count = e1000e_write_mc_addr_list(netdev);
3428                         if (count < 0)
3429                                 rctl |= E1000_RCTL_MPE;
3430                 }
3431                 e1000e_vlan_filter_enable(adapter);
3432                 /* Write addresses to available RAR registers, if there is not
3433                  * sufficient space to store all the addresses then enable
3434                  * unicast promiscuous mode
3435                  */
3436                 count = e1000e_write_uc_addr_list(netdev);
3437                 if (count < 0)
3438                         rctl |= E1000_RCTL_UPE;
3439         }
3440
3441         ew32(RCTL, rctl);
3442
3443         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3444                 e1000e_vlan_strip_enable(adapter);
3445         else
3446                 e1000e_vlan_strip_disable(adapter);
3447 }
3448
3449 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3450 {
3451         struct e1000_hw *hw = &adapter->hw;
3452         u32 mrqc, rxcsum;
3453         u32 rss_key[10];
3454         int i;
3455
3456         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3457         for (i = 0; i < 10; i++)
3458                 ew32(RSSRK(i), rss_key[i]);
3459
3460         /* Direct all traffic to queue 0 */
3461         for (i = 0; i < 32; i++)
3462                 ew32(RETA(i), 0);
3463
3464         /* Disable raw packet checksumming so that RSS hash is placed in
3465          * descriptor on writeback.
3466          */
3467         rxcsum = er32(RXCSUM);
3468         rxcsum |= E1000_RXCSUM_PCSD;
3469
3470         ew32(RXCSUM, rxcsum);
3471
3472         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3473                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3474                 E1000_MRQC_RSS_FIELD_IPV6 |
3475                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3476                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3477
3478         ew32(MRQC, mrqc);
3479 }
3480
3481 /**
3482  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3483  * @adapter: board private structure
3484  * @timinca: pointer to returned time increment attributes
3485  *
3486  * Get attributes for incrementing the System Time Register SYSTIML/H at
3487  * the default base frequency, and set the cyclecounter shift value.
3488  **/
3489 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3490 {
3491         struct e1000_hw *hw = &adapter->hw;
3492         u32 incvalue, incperiod, shift;
3493
3494         /* Make sure clock is enabled on I217 before checking the frequency */
3495         if ((hw->mac.type == e1000_pch_lpt) &&
3496             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3497             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3498                 u32 fextnvm7 = er32(FEXTNVM7);
3499
3500                 if (!(fextnvm7 & (1 << 0))) {
3501                         ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3502                         e1e_flush();
3503                 }
3504         }
3505
3506         switch (hw->mac.type) {
3507         case e1000_pch2lan:
3508         case e1000_pch_lpt:
3509                 /* On I217, the clock frequency is 25MHz or 96MHz as
3510                  * indicated by the System Clock Frequency Indication
3511                  */
3512                 if ((hw->mac.type != e1000_pch_lpt) ||
3513                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
3514                         /* Stable 96MHz frequency */
3515                         incperiod = INCPERIOD_96MHz;
3516                         incvalue = INCVALUE_96MHz;
3517                         shift = INCVALUE_SHIFT_96MHz;
3518                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3519                         break;
3520                 }
3521                 /* fall-through */
3522         case e1000_82574:
3523         case e1000_82583:
3524                 /* Stable 25MHz frequency */
3525                 incperiod = INCPERIOD_25MHz;
3526                 incvalue = INCVALUE_25MHz;
3527                 shift = INCVALUE_SHIFT_25MHz;
3528                 adapter->cc.shift = shift;
3529                 break;
3530         default:
3531                 return -EINVAL;
3532         }
3533
3534         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3535                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3536
3537         return 0;
3538 }
3539
3540 /**
3541  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3542  * @adapter: board private structure
3543  *
3544  * Outgoing time stamping can be enabled and disabled. Play nice and
3545  * disable it when requested, although it shouldn't cause any overhead
3546  * when no packet needs it. At most one packet in the queue may be
3547  * marked for time stamping, otherwise it would be impossible to tell
3548  * for sure to which packet the hardware time stamp belongs.
3549  *
3550  * Incoming time stamping has to be configured via the hardware filters.
3551  * Not all combinations are supported, in particular event type has to be
3552  * specified. Matching the kind of event packet is not supported, with the
3553  * exception of "all V2 events regardless of level 2 or 4".
3554  **/
3555 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3556                                   struct hwtstamp_config *config)
3557 {
3558         struct e1000_hw *hw = &adapter->hw;
3559         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3560         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3561         u32 rxmtrl = 0;
3562         u16 rxudp = 0;
3563         bool is_l4 = false;
3564         bool is_l2 = false;
3565         u32 regval;
3566         s32 ret_val;
3567
3568         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3569                 return -EINVAL;
3570
3571         /* flags reserved for future extensions - must be zero */
3572         if (config->flags)
3573                 return -EINVAL;
3574
3575         switch (config->tx_type) {
3576         case HWTSTAMP_TX_OFF:
3577                 tsync_tx_ctl = 0;
3578                 break;
3579         case HWTSTAMP_TX_ON:
3580                 break;
3581         default:
3582                 return -ERANGE;
3583         }
3584
3585         switch (config->rx_filter) {
3586         case HWTSTAMP_FILTER_NONE:
3587                 tsync_rx_ctl = 0;
3588                 break;
3589         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3590                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3591                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3592                 is_l4 = true;
3593                 break;
3594         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3595                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3596                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3597                 is_l4 = true;
3598                 break;
3599         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3600                 /* Also time stamps V2 L2 Path Delay Request/Response */
3601                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3602                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3603                 is_l2 = true;
3604                 break;
3605         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3606                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3607                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3608                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3609                 is_l2 = true;
3610                 break;
3611         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3612                 /* Hardware cannot filter just V2 L4 Sync messages;
3613                  * fall-through to V2 (both L2 and L4) Sync.
3614                  */
3615         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3616                 /* Also time stamps V2 Path Delay Request/Response. */
3617                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3618                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3619                 is_l2 = true;
3620                 is_l4 = true;
3621                 break;
3622         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3623                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3624                  * fall-through to V2 (both L2 and L4) Delay Request.
3625                  */
3626         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3627                 /* Also time stamps V2 Path Delay Request/Response. */
3628                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3629                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3630                 is_l2 = true;
3631                 is_l4 = true;
3632                 break;
3633         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3634         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3635                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3636                  * fall-through to all V2 (both L2 and L4) Events.
3637                  */
3638         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3639                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3640                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3641                 is_l2 = true;
3642                 is_l4 = true;
3643                 break;
3644         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3645                 /* For V1, the hardware can only filter Sync messages or
3646                  * Delay Request messages but not both so fall-through to
3647                  * time stamp all packets.
3648                  */
3649         case HWTSTAMP_FILTER_ALL:
3650                 is_l2 = true;
3651                 is_l4 = true;
3652                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3653                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3654                 break;
3655         default:
3656                 return -ERANGE;
3657         }
3658
3659         adapter->hwtstamp_config = *config;
3660
3661         /* enable/disable Tx h/w time stamping */
3662         regval = er32(TSYNCTXCTL);
3663         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3664         regval |= tsync_tx_ctl;
3665         ew32(TSYNCTXCTL, regval);
3666         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3667             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3668                 e_err("Timesync Tx Control register not set as expected\n");
3669                 return -EAGAIN;
3670         }
3671
3672         /* enable/disable Rx h/w time stamping */
3673         regval = er32(TSYNCRXCTL);
3674         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3675         regval |= tsync_rx_ctl;
3676         ew32(TSYNCRXCTL, regval);
3677         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3678                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3679             (regval & (E1000_TSYNCRXCTL_ENABLED |
3680                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3681                 e_err("Timesync Rx Control register not set as expected\n");
3682                 return -EAGAIN;
3683         }
3684
3685         /* L2: define ethertype filter for time stamped packets */
3686         if (is_l2)
3687                 rxmtrl |= ETH_P_1588;
3688
3689         /* define which PTP packets get time stamped */
3690         ew32(RXMTRL, rxmtrl);
3691
3692         /* Filter by destination port */
3693         if (is_l4) {
3694                 rxudp = PTP_EV_PORT;
3695                 cpu_to_be16s(&rxudp);
3696         }
3697         ew32(RXUDP, rxudp);
3698
3699         e1e_flush();
3700
3701         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3702         er32(RXSTMPH);
3703         er32(TXSTMPH);
3704
3705         /* Get and set the System Time Register SYSTIM base frequency */
3706         ret_val = e1000e_get_base_timinca(adapter, &regval);
3707         if (ret_val)
3708                 return ret_val;
3709         ew32(TIMINCA, regval);
3710
3711         /* reset the ns time counter */
3712         timecounter_init(&adapter->tc, &adapter->cc,
3713                          ktime_to_ns(ktime_get_real()));
3714
3715         return 0;
3716 }
3717
3718 /**
3719  * e1000_configure - configure the hardware for Rx and Tx
3720  * @adapter: private board structure
3721  **/
3722 static void e1000_configure(struct e1000_adapter *adapter)
3723 {
3724         struct e1000_ring *rx_ring = adapter->rx_ring;
3725
3726         e1000e_set_rx_mode(adapter->netdev);
3727
3728         e1000_restore_vlan(adapter);
3729         e1000_init_manageability_pt(adapter);
3730
3731         e1000_configure_tx(adapter);
3732
3733         if (adapter->netdev->features & NETIF_F_RXHASH)
3734                 e1000e_setup_rss_hash(adapter);
3735         e1000_setup_rctl(adapter);
3736         e1000_configure_rx(adapter);
3737         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3738 }
3739
3740 /**
3741  * e1000e_power_up_phy - restore link in case the phy was powered down
3742  * @adapter: address of board private structure
3743  *
3744  * The phy may be powered down to save power and turn off link when the
3745  * driver is unloaded and wake on lan is not enabled (among others)
3746  * *** this routine MUST be followed by a call to e1000e_reset ***
3747  **/
3748 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3749 {
3750         if (adapter->hw.phy.ops.power_up)
3751                 adapter->hw.phy.ops.power_up(&adapter->hw);
3752
3753         adapter->hw.mac.ops.setup_link(&adapter->hw);
3754 }
3755
3756 /**
3757  * e1000_power_down_phy - Power down the PHY
3758  *
3759  * Power down the PHY so no link is implied when interface is down.
3760  * The PHY cannot be powered down if management or WoL is active.
3761  */
3762 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3763 {
3764         if (adapter->hw.phy.ops.power_down)
3765                 adapter->hw.phy.ops.power_down(&adapter->hw);
3766 }
3767
3768 /**
3769  * e1000e_reset - bring the hardware into a known good state
3770  *
3771  * This function boots the hardware and enables some settings that
3772  * require a configuration cycle of the hardware - those cannot be
3773  * set/changed during runtime. After reset the device needs to be
3774  * properly configured for Rx, Tx etc.
3775  */
3776 void e1000e_reset(struct e1000_adapter *adapter)
3777 {
3778         struct e1000_mac_info *mac = &adapter->hw.mac;
3779         struct e1000_fc_info *fc = &adapter->hw.fc;
3780         struct e1000_hw *hw = &adapter->hw;
3781         u32 tx_space, min_tx_space, min_rx_space;
3782         u32 pba = adapter->pba;
3783         u16 hwm;
3784
3785         /* reset Packet Buffer Allocation to default */
3786         ew32(PBA, pba);
3787
3788         if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3789                 /* To maintain wire speed transmits, the Tx FIFO should be
3790                  * large enough to accommodate two full transmit packets,
3791                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3792                  * the Rx FIFO should be large enough to accommodate at least
3793                  * one full receive packet and is similarly rounded up and
3794                  * expressed in KB.
3795                  */
3796                 pba = er32(PBA);
3797                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3798                 tx_space = pba >> 16;
3799                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3800                 pba &= 0xffff;
3801                 /* the Tx fifo also stores 16 bytes of information about the Tx
3802                  * but don't include ethernet FCS because hardware appends it
3803                  */
3804                 min_tx_space = (adapter->max_frame_size +
3805                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3806                 min_tx_space = ALIGN(min_tx_space, 1024);
3807                 min_tx_space >>= 10;
3808                 /* software strips receive CRC, so leave room for it */
3809                 min_rx_space = adapter->max_frame_size;
3810                 min_rx_space = ALIGN(min_rx_space, 1024);
3811                 min_rx_space >>= 10;
3812
3813                 /* If current Tx allocation is less than the min Tx FIFO size,
3814                  * and the min Tx FIFO size is less than the current Rx FIFO
3815                  * allocation, take space away from current Rx allocation
3816                  */
3817                 if ((tx_space < min_tx_space) &&
3818                     ((min_tx_space - tx_space) < pba)) {
3819                         pba -= min_tx_space - tx_space;
3820
3821                         /* if short on Rx space, Rx wins and must trump Tx
3822                          * adjustment
3823                          */
3824                         if (pba < min_rx_space)
3825                                 pba = min_rx_space;
3826                 }
3827
3828                 ew32(PBA, pba);
3829         }
3830
3831         /* flow control settings
3832          *
3833          * The high water mark must be low enough to fit one full frame
3834          * (or the size used for early receive) above it in the Rx FIFO.
3835          * Set it to the lower of:
3836          * - 90% of the Rx FIFO size, and
3837          * - the full Rx FIFO size minus one full frame
3838          */
3839         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3840                 fc->pause_time = 0xFFFF;
3841         else
3842                 fc->pause_time = E1000_FC_PAUSE_TIME;
3843         fc->send_xon = true;
3844         fc->current_mode = fc->requested_mode;
3845
3846         switch (hw->mac.type) {
3847         case e1000_ich9lan:
3848         case e1000_ich10lan:
3849                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3850                         pba = 14;
3851                         ew32(PBA, pba);
3852                         fc->high_water = 0x2800;
3853                         fc->low_water = fc->high_water - 8;
3854                         break;
3855                 }
3856                 /* fall-through */
3857         default:
3858                 hwm = min(((pba << 10) * 9 / 10),
3859                           ((pba << 10) - adapter->max_frame_size));
3860
3861                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3862                 fc->low_water = fc->high_water - 8;
3863                 break;
3864         case e1000_pchlan:
3865                 /* Workaround PCH LOM adapter hangs with certain network
3866                  * loads.  If hangs persist, try disabling Tx flow control.
3867                  */
3868                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3869                         fc->high_water = 0x3500;
3870                         fc->low_water = 0x1500;
3871                 } else {
3872                         fc->high_water = 0x5000;
3873                         fc->low_water = 0x3000;
3874                 }
3875                 fc->refresh_time = 0x1000;
3876                 break;
3877         case e1000_pch2lan:
3878         case e1000_pch_lpt:
3879                 fc->refresh_time = 0x0400;
3880
3881                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
3882                         fc->high_water = 0x05C20;
3883                         fc->low_water = 0x05048;
3884                         fc->pause_time = 0x0650;
3885                         break;
3886                 }
3887
3888                 pba = 14;
3889                 ew32(PBA, pba);
3890                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
3891                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
3892                 break;
3893         }
3894
3895         /* Alignment of Tx data is on an arbitrary byte boundary with the
3896          * maximum size per Tx descriptor limited only to the transmit
3897          * allocation of the packet buffer minus 96 bytes with an upper
3898          * limit of 24KB due to receive synchronization limitations.
3899          */
3900         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
3901                                        24 << 10);
3902
3903         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
3904          * fit in receive buffer.
3905          */
3906         if (adapter->itr_setting & 0x3) {
3907                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3908                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3909                                 dev_info(&adapter->pdev->dev,
3910                                          "Interrupt Throttle Rate off\n");
3911                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
3912                                 e1000e_write_itr(adapter, 0);
3913                         }
3914                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3915                         dev_info(&adapter->pdev->dev,
3916                                  "Interrupt Throttle Rate on\n");
3917                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3918                         adapter->itr = 20000;
3919                         e1000e_write_itr(adapter, adapter->itr);
3920                 }
3921         }
3922
3923         /* Allow time for pending master requests to run */
3924         mac->ops.reset_hw(hw);
3925
3926         /* For parts with AMT enabled, let the firmware know
3927          * that the network interface is in control
3928          */
3929         if (adapter->flags & FLAG_HAS_AMT)
3930                 e1000e_get_hw_control(adapter);
3931
3932         ew32(WUC, 0);
3933
3934         if (mac->ops.init_hw(hw))
3935                 e_err("Hardware Error\n");
3936
3937         e1000_update_mng_vlan(adapter);
3938
3939         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3940         ew32(VET, ETH_P_8021Q);
3941
3942         e1000e_reset_adaptive(hw);
3943
3944         /* initialize systim and reset the ns time counter */
3945         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3946
3947         /* Set EEE advertisement as appropriate */
3948         if (adapter->flags2 & FLAG2_HAS_EEE) {
3949                 s32 ret_val;
3950                 u16 adv_addr;
3951
3952                 switch (hw->phy.type) {
3953                 case e1000_phy_82579:
3954                         adv_addr = I82579_EEE_ADVERTISEMENT;
3955                         break;
3956                 case e1000_phy_i217:
3957                         adv_addr = I217_EEE_ADVERTISEMENT;
3958                         break;
3959                 default:
3960                         dev_err(&adapter->pdev->dev,
3961                                 "Invalid PHY type setting EEE advertisement\n");
3962                         return;
3963                 }
3964
3965                 ret_val = hw->phy.ops.acquire(hw);
3966                 if (ret_val) {
3967                         dev_err(&adapter->pdev->dev,
3968                                 "EEE advertisement - unable to acquire PHY\n");
3969                         return;
3970                 }
3971
3972                 e1000_write_emi_reg_locked(hw, adv_addr,
3973                                            hw->dev_spec.ich8lan.eee_disable ?
3974                                            0 : adapter->eee_advert);
3975
3976                 hw->phy.ops.release(hw);
3977         }
3978
3979         if (!netif_running(adapter->netdev) &&
3980             !test_bit(__E1000_TESTING, &adapter->state))
3981                 e1000_power_down_phy(adapter);
3982
3983         e1000_get_phy_info(hw);
3984
3985         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3986             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3987                 u16 phy_data = 0;
3988                 /* speed up time to link by disabling smart power down, ignore
3989                  * the return value of this function because there is nothing
3990                  * different we would do if it failed
3991                  */
3992                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3993                 phy_data &= ~IGP02E1000_PM_SPD;
3994                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3995         }
3996 }
3997
3998 int e1000e_up(struct e1000_adapter *adapter)
3999 {
4000         struct e1000_hw *hw = &adapter->hw;
4001
4002         /* hardware has been reset, we need to reload some things */
4003         e1000_configure(adapter);
4004
4005         clear_bit(__E1000_DOWN, &adapter->state);
4006
4007         if (adapter->msix_entries)
4008                 e1000_configure_msix(adapter);
4009         e1000_irq_enable(adapter);
4010
4011         netif_start_queue(adapter->netdev);
4012
4013         /* fire a link change interrupt to start the watchdog */
4014         if (adapter->msix_entries)
4015                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4016         else
4017                 ew32(ICS, E1000_ICS_LSC);
4018
4019         return 0;
4020 }
4021
4022 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4023 {
4024         struct e1000_hw *hw = &adapter->hw;
4025
4026         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4027                 return;
4028
4029         /* flush pending descriptor writebacks to memory */
4030         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4031         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4032
4033         /* execute the writes immediately */
4034         e1e_flush();
4035
4036         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4037          * write is successful
4038          */
4039         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4040         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4041
4042         /* execute the writes immediately */
4043         e1e_flush();
4044 }
4045
4046 static void e1000e_update_stats(struct e1000_adapter *adapter);
4047
4048 /**
4049  * e1000e_down - quiesce the device and optionally reset the hardware
4050  * @adapter: board private structure
4051  * @reset: boolean flag to reset the hardware or not
4052  */
4053 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4054 {
4055         struct net_device *netdev = adapter->netdev;
4056         struct e1000_hw *hw = &adapter->hw;
4057         u32 tctl, rctl;
4058
4059         /* signal that we're down so the interrupt handler does not
4060          * reschedule our watchdog timer
4061          */
4062         set_bit(__E1000_DOWN, &adapter->state);
4063
4064         /* disable receives in the hardware */
4065         rctl = er32(RCTL);
4066         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4067                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4068         /* flush and sleep below */
4069
4070         netif_stop_queue(netdev);
4071
4072         /* disable transmits in the hardware */
4073         tctl = er32(TCTL);
4074         tctl &= ~E1000_TCTL_EN;
4075         ew32(TCTL, tctl);
4076
4077         /* flush both disables and wait for them to finish */
4078         e1e_flush();
4079         usleep_range(10000, 20000);
4080
4081         e1000_irq_disable(adapter);
4082
4083         napi_synchronize(&adapter->napi);
4084
4085         del_timer_sync(&adapter->watchdog_timer);
4086         del_timer_sync(&adapter->phy_info_timer);
4087
4088         netif_carrier_off(netdev);
4089
4090         spin_lock(&adapter->stats64_lock);
4091         e1000e_update_stats(adapter);
4092         spin_unlock(&adapter->stats64_lock);
4093
4094         e1000e_flush_descriptors(adapter);
4095         e1000_clean_tx_ring(adapter->tx_ring);
4096         e1000_clean_rx_ring(adapter->rx_ring);
4097
4098         adapter->link_speed = 0;
4099         adapter->link_duplex = 0;
4100
4101         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4102         if ((hw->mac.type >= e1000_pch2lan) &&
4103             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4104             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4105                 e_dbg("failed to disable jumbo frame workaround mode\n");
4106
4107         if (reset && !pci_channel_offline(adapter->pdev))
4108                 e1000e_reset(adapter);
4109 }
4110
4111 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4112 {
4113         might_sleep();
4114         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4115                 usleep_range(1000, 2000);
4116         e1000e_down(adapter, true);
4117         e1000e_up(adapter);
4118         clear_bit(__E1000_RESETTING, &adapter->state);
4119 }
4120
4121 /**
4122  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4123  * @cc: cyclecounter structure
4124  **/
4125 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4126 {
4127         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4128                                                      cc);
4129         struct e1000_hw *hw = &adapter->hw;
4130         cycle_t systim, systim_next;
4131
4132         /* latch SYSTIMH on read of SYSTIML */
4133         systim = (cycle_t)er32(SYSTIML);
4134         systim |= (cycle_t)er32(SYSTIMH) << 32;
4135
4136         if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
4137                 u64 incvalue, time_delta, rem, temp;
4138                 int i;
4139
4140                 /* errata for 82574/82583 possible bad bits read from SYSTIMH/L
4141                  * check to see that the time is incrementing at a reasonable
4142                  * rate and is a multiple of incvalue
4143                  */
4144                 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4145                 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4146                         /* latch SYSTIMH on read of SYSTIML */
4147                         systim_next = (cycle_t)er32(SYSTIML);
4148                         systim_next |= (cycle_t)er32(SYSTIMH) << 32;
4149
4150                         time_delta = systim_next - systim;
4151                         temp = time_delta;
4152                         rem = do_div(temp, incvalue);
4153
4154                         systim = systim_next;
4155
4156                         if ((time_delta < E1000_82574_SYSTIM_EPSILON) &&
4157                             (rem == 0))
4158                                 break;
4159                 }
4160         }
4161         return systim;
4162 }
4163
4164 /**
4165  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4166  * @adapter: board private structure to initialize
4167  *
4168  * e1000_sw_init initializes the Adapter private data structure.
4169  * Fields are initialized based on PCI device information and
4170  * OS network device settings (MTU size).
4171  **/
4172 static int e1000_sw_init(struct e1000_adapter *adapter)
4173 {
4174         struct net_device *netdev = adapter->netdev;
4175
4176         adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
4177         adapter->rx_ps_bsize0 = 128;
4178         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4179         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4180         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4181         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4182
4183         spin_lock_init(&adapter->stats64_lock);
4184
4185         e1000e_set_interrupt_capability(adapter);
4186
4187         if (e1000_alloc_queues(adapter))
4188                 return -ENOMEM;
4189
4190         /* Setup hardware time stamping cyclecounter */
4191         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4192                 adapter->cc.read = e1000e_cyclecounter_read;
4193                 adapter->cc.mask = CLOCKSOURCE_MASK(64);
4194                 adapter->cc.mult = 1;
4195                 /* cc.shift set in e1000e_get_base_tininca() */
4196
4197                 spin_lock_init(&adapter->systim_lock);
4198                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4199         }
4200
4201         /* Explicitly disable IRQ since the NIC can be in any state. */
4202         e1000_irq_disable(adapter);
4203
4204         set_bit(__E1000_DOWN, &adapter->state);
4205         return 0;
4206 }
4207
4208 /**
4209  * e1000_intr_msi_test - Interrupt Handler
4210  * @irq: interrupt number
4211  * @data: pointer to a network interface device structure
4212  **/
4213 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4214 {
4215         struct net_device *netdev = data;
4216         struct e1000_adapter *adapter = netdev_priv(netdev);
4217         struct e1000_hw *hw = &adapter->hw;
4218         u32 icr = er32(ICR);
4219
4220         e_dbg("icr is %08X\n", icr);
4221         if (icr & E1000_ICR_RXSEQ) {
4222                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4223                 /* Force memory writes to complete before acknowledging the
4224                  * interrupt is handled.
4225                  */
4226                 wmb();
4227         }
4228
4229         return IRQ_HANDLED;
4230 }
4231
4232 /**
4233  * e1000_test_msi_interrupt - Returns 0 for successful test
4234  * @adapter: board private struct
4235  *
4236  * code flow taken from tg3.c
4237  **/
4238 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4239 {
4240         struct net_device *netdev = adapter->netdev;
4241         struct e1000_hw *hw = &adapter->hw;
4242         int err;
4243
4244         /* poll_enable hasn't been called yet, so don't need disable */
4245         /* clear any pending events */
4246         er32(ICR);
4247
4248         /* free the real vector and request a test handler */
4249         e1000_free_irq(adapter);
4250         e1000e_reset_interrupt_capability(adapter);
4251
4252         /* Assume that the test fails, if it succeeds then the test
4253          * MSI irq handler will unset this flag
4254          */
4255         adapter->flags |= FLAG_MSI_TEST_FAILED;
4256
4257         err = pci_enable_msi(adapter->pdev);
4258         if (err)
4259                 goto msi_test_failed;
4260
4261         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4262                           netdev->name, netdev);
4263         if (err) {
4264                 pci_disable_msi(adapter->pdev);
4265                 goto msi_test_failed;
4266         }
4267
4268         /* Force memory writes to complete before enabling and firing an
4269          * interrupt.
4270          */
4271         wmb();
4272
4273         e1000_irq_enable(adapter);
4274
4275         /* fire an unusual interrupt on the test handler */
4276         ew32(ICS, E1000_ICS_RXSEQ);
4277         e1e_flush();
4278         msleep(100);
4279
4280         e1000_irq_disable(adapter);
4281
4282         rmb();                  /* read flags after interrupt has been fired */
4283
4284         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4285                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4286                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4287         } else {
4288                 e_dbg("MSI interrupt test succeeded!\n");
4289         }
4290
4291         free_irq(adapter->pdev->irq, netdev);
4292         pci_disable_msi(adapter->pdev);
4293
4294 msi_test_failed:
4295         e1000e_set_interrupt_capability(adapter);
4296         return e1000_request_irq(adapter);
4297 }
4298
4299 /**
4300  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4301  * @adapter: board private struct
4302  *
4303  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4304  **/
4305 static int e1000_test_msi(struct e1000_adapter *adapter)
4306 {
4307         int err;
4308         u16 pci_cmd;
4309
4310         if (!(adapter->flags & FLAG_MSI_ENABLED))
4311                 return 0;
4312
4313         /* disable SERR in case the MSI write causes a master abort */
4314         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4315         if (pci_cmd & PCI_COMMAND_SERR)
4316                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4317                                       pci_cmd & ~PCI_COMMAND_SERR);
4318
4319         err = e1000_test_msi_interrupt(adapter);
4320
4321         /* re-enable SERR */
4322         if (pci_cmd & PCI_COMMAND_SERR) {
4323                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4324                 pci_cmd |= PCI_COMMAND_SERR;
4325                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4326         }
4327
4328         return err;
4329 }
4330
4331 /**
4332  * e1000_open - Called when a network interface is made active
4333  * @netdev: network interface device structure
4334  *
4335  * Returns 0 on success, negative value on failure
4336  *
4337  * The open entry point is called when a network interface is made
4338  * active by the system (IFF_UP).  At this point all resources needed
4339  * for transmit and receive operations are allocated, the interrupt
4340  * handler is registered with the OS, the watchdog timer is started,
4341  * and the stack is notified that the interface is ready.
4342  **/
4343 static int e1000_open(struct net_device *netdev)
4344 {
4345         struct e1000_adapter *adapter = netdev_priv(netdev);
4346         struct e1000_hw *hw = &adapter->hw;
4347         struct pci_dev *pdev = adapter->pdev;
4348         int err;
4349
4350         /* disallow open during test */
4351         if (test_bit(__E1000_TESTING, &adapter->state))
4352                 return -EBUSY;
4353
4354         pm_runtime_get_sync(&pdev->dev);
4355
4356         netif_carrier_off(netdev);
4357
4358         /* allocate transmit descriptors */
4359         err = e1000e_setup_tx_resources(adapter->tx_ring);
4360         if (err)
4361                 goto err_setup_tx;
4362
4363         /* allocate receive descriptors */
4364         err = e1000e_setup_rx_resources(adapter->rx_ring);
4365         if (err)
4366                 goto err_setup_rx;
4367
4368         /* If AMT is enabled, let the firmware know that the network
4369          * interface is now open and reset the part to a known state.
4370          */
4371         if (adapter->flags & FLAG_HAS_AMT) {
4372                 e1000e_get_hw_control(adapter);
4373                 e1000e_reset(adapter);
4374         }
4375
4376         e1000e_power_up_phy(adapter);
4377
4378         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4379         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4380                 e1000_update_mng_vlan(adapter);
4381
4382         /* DMA latency requirement to workaround jumbo issue */
4383         pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4384                            PM_QOS_DEFAULT_VALUE);
4385
4386         /* before we allocate an interrupt, we must be ready to handle it.
4387          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4388          * as soon as we call pci_request_irq, so we have to setup our
4389          * clean_rx handler before we do so.
4390          */
4391         e1000_configure(adapter);
4392
4393         err = e1000_request_irq(adapter);
4394         if (err)
4395                 goto err_req_irq;
4396
4397         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4398          * ignore e1000e MSI messages, which means we need to test our MSI
4399          * interrupt now
4400          */
4401         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4402                 err = e1000_test_msi(adapter);
4403                 if (err) {
4404                         e_err("Interrupt allocation failed\n");
4405                         goto err_req_irq;
4406                 }
4407         }
4408
4409         /* From here on the code is the same as e1000e_up() */
4410         clear_bit(__E1000_DOWN, &adapter->state);
4411
4412         napi_enable(&adapter->napi);
4413
4414         e1000_irq_enable(adapter);
4415
4416         adapter->tx_hang_recheck = false;
4417         netif_start_queue(netdev);
4418
4419         hw->mac.get_link_status = true;
4420         pm_runtime_put(&pdev->dev);
4421
4422         /* fire a link status change interrupt to start the watchdog */
4423         if (adapter->msix_entries)
4424                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4425         else
4426                 ew32(ICS, E1000_ICS_LSC);
4427
4428         return 0;
4429
4430 err_req_irq:
4431         e1000e_release_hw_control(adapter);
4432         e1000_power_down_phy(adapter);
4433         e1000e_free_rx_resources(adapter->rx_ring);
4434 err_setup_rx:
4435         e1000e_free_tx_resources(adapter->tx_ring);
4436 err_setup_tx:
4437         e1000e_reset(adapter);
4438         pm_runtime_put_sync(&pdev->dev);
4439
4440         return err;
4441 }
4442
4443 /**
4444  * e1000_close - Disables a network interface
4445  * @netdev: network interface device structure
4446  *
4447  * Returns 0, this is not allowed to fail
4448  *
4449  * The close entry point is called when an interface is de-activated
4450  * by the OS.  The hardware is still under the drivers control, but
4451  * needs to be disabled.  A global MAC reset is issued to stop the
4452  * hardware, and all transmit and receive resources are freed.
4453  **/
4454 static int e1000_close(struct net_device *netdev)
4455 {
4456         struct e1000_adapter *adapter = netdev_priv(netdev);
4457         struct pci_dev *pdev = adapter->pdev;
4458         int count = E1000_CHECK_RESET_COUNT;
4459
4460         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4461                 usleep_range(10000, 20000);
4462
4463         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4464
4465         pm_runtime_get_sync(&pdev->dev);
4466
4467         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4468                 e1000e_down(adapter, true);
4469                 e1000_free_irq(adapter);
4470
4471                 /* Link status message must follow this format */
4472                 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4473         }
4474
4475         napi_disable(&adapter->napi);
4476
4477         e1000e_free_tx_resources(adapter->tx_ring);
4478         e1000e_free_rx_resources(adapter->rx_ring);
4479
4480         /* kill manageability vlan ID if supported, but not if a vlan with
4481          * the same ID is registered on the host OS (let 8021q kill it)
4482          */
4483         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4484                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4485                                        adapter->mng_vlan_id);
4486
4487         /* If AMT is enabled, let the firmware know that the network
4488          * interface is now closed
4489          */
4490         if ((adapter->flags & FLAG_HAS_AMT) &&
4491             !test_bit(__E1000_TESTING, &adapter->state))
4492                 e1000e_release_hw_control(adapter);
4493
4494         pm_qos_remove_request(&adapter->netdev->pm_qos_req);
4495
4496         pm_runtime_put_sync(&pdev->dev);
4497
4498         return 0;
4499 }
4500
4501 /**
4502  * e1000_set_mac - Change the Ethernet Address of the NIC
4503  * @netdev: network interface device structure
4504  * @p: pointer to an address structure
4505  *
4506  * Returns 0 on success, negative on failure
4507  **/
4508 static int e1000_set_mac(struct net_device *netdev, void *p)
4509 {
4510         struct e1000_adapter *adapter = netdev_priv(netdev);
4511         struct e1000_hw *hw = &adapter->hw;
4512         struct sockaddr *addr = p;
4513
4514         if (!is_valid_ether_addr(addr->sa_data))
4515                 return -EADDRNOTAVAIL;
4516
4517         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4518         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4519
4520         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4521
4522         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4523                 /* activate the work around */
4524                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4525
4526                 /* Hold a copy of the LAA in RAR[14] This is done so that
4527                  * between the time RAR[0] gets clobbered  and the time it
4528                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4529                  * of the RARs and no incoming packets directed to this port
4530                  * are dropped. Eventually the LAA will be in RAR[0] and
4531                  * RAR[14]
4532                  */
4533                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4534                                     adapter->hw.mac.rar_entry_count - 1);
4535         }
4536
4537         return 0;
4538 }
4539
4540 /**
4541  * e1000e_update_phy_task - work thread to update phy
4542  * @work: pointer to our work struct
4543  *
4544  * this worker thread exists because we must acquire a
4545  * semaphore to read the phy, which we could msleep while
4546  * waiting for it, and we can't msleep in a timer.
4547  **/
4548 static void e1000e_update_phy_task(struct work_struct *work)
4549 {
4550         struct e1000_adapter *adapter = container_of(work,
4551                                                      struct e1000_adapter,
4552                                                      update_phy_task);
4553         struct e1000_hw *hw = &adapter->hw;
4554
4555         if (test_bit(__E1000_DOWN, &adapter->state))
4556                 return;
4557
4558         e1000_get_phy_info(hw);
4559
4560         /* Enable EEE on 82579 after link up */
4561         if (hw->phy.type >= e1000_phy_82579)
4562                 e1000_set_eee_pchlan(hw);
4563 }
4564
4565 /**
4566  * e1000_update_phy_info - timre call-back to update PHY info
4567  * @data: pointer to adapter cast into an unsigned long
4568  *
4569  * Need to wait a few seconds after link up to get diagnostic information from
4570  * the phy
4571  **/
4572 static void e1000_update_phy_info(unsigned long data)
4573 {
4574         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4575
4576         if (test_bit(__E1000_DOWN, &adapter->state))
4577                 return;
4578
4579         schedule_work(&adapter->update_phy_task);
4580 }
4581
4582 /**
4583  * e1000e_update_phy_stats - Update the PHY statistics counters
4584  * @adapter: board private structure
4585  *
4586  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4587  **/
4588 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4589 {
4590         struct e1000_hw *hw = &adapter->hw;
4591         s32 ret_val;
4592         u16 phy_data;
4593
4594         ret_val = hw->phy.ops.acquire(hw);
4595         if (ret_val)
4596                 return;
4597
4598         /* A page set is expensive so check if already on desired page.
4599          * If not, set to the page with the PHY status registers.
4600          */
4601         hw->phy.addr = 1;
4602         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4603                                            &phy_data);
4604         if (ret_val)
4605                 goto release;
4606         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4607                 ret_val = hw->phy.ops.set_page(hw,
4608                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4609                 if (ret_val)
4610                         goto release;
4611         }
4612
4613         /* Single Collision Count */
4614         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4615         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4616         if (!ret_val)
4617                 adapter->stats.scc += phy_data;
4618
4619         /* Excessive Collision Count */
4620         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4621         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4622         if (!ret_val)
4623                 adapter->stats.ecol += phy_data;
4624
4625         /* Multiple Collision Count */
4626         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4627         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4628         if (!ret_val)
4629                 adapter->stats.mcc += phy_data;
4630
4631         /* Late Collision Count */
4632         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4633         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4634         if (!ret_val)
4635                 adapter->stats.latecol += phy_data;
4636
4637         /* Collision Count - also used for adaptive IFS */
4638         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4639         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4640         if (!ret_val)
4641                 hw->mac.collision_delta = phy_data;
4642
4643         /* Defer Count */
4644         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4645         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4646         if (!ret_val)
4647                 adapter->stats.dc += phy_data;
4648
4649         /* Transmit with no CRS */
4650         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4651         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4652         if (!ret_val)
4653                 adapter->stats.tncrs += phy_data;
4654
4655 release:
4656         hw->phy.ops.release(hw);
4657 }
4658
4659 /**
4660  * e1000e_update_stats - Update the board statistics counters
4661  * @adapter: board private structure
4662  **/
4663 static void e1000e_update_stats(struct e1000_adapter *adapter)
4664 {
4665         struct net_device *netdev = adapter->netdev;
4666         struct e1000_hw *hw = &adapter->hw;
4667         struct pci_dev *pdev = adapter->pdev;
4668
4669         /* Prevent stats update while adapter is being reset, or if the pci
4670          * connection is down.
4671          */
4672         if (adapter->link_speed == 0)
4673                 return;
4674         if (pci_channel_offline(pdev))
4675                 return;
4676
4677         adapter->stats.crcerrs += er32(CRCERRS);
4678         adapter->stats.gprc += er32(GPRC);
4679         adapter->stats.gorc += er32(GORCL);
4680         er32(GORCH);            /* Clear gorc */
4681         adapter->stats.bprc += er32(BPRC);
4682         adapter->stats.mprc += er32(MPRC);
4683         adapter->stats.roc += er32(ROC);
4684
4685         adapter->stats.mpc += er32(MPC);
4686
4687         /* Half-duplex statistics */
4688         if (adapter->link_duplex == HALF_DUPLEX) {
4689                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4690                         e1000e_update_phy_stats(adapter);
4691                 } else {
4692                         adapter->stats.scc += er32(SCC);
4693                         adapter->stats.ecol += er32(ECOL);
4694                         adapter->stats.mcc += er32(MCC);
4695                         adapter->stats.latecol += er32(LATECOL);
4696                         adapter->stats.dc += er32(DC);
4697
4698                         hw->mac.collision_delta = er32(COLC);
4699
4700                         if ((hw->mac.type != e1000_82574) &&
4701                             (hw->mac.type != e1000_82583))
4702                                 adapter->stats.tncrs += er32(TNCRS);
4703                 }
4704                 adapter->stats.colc += hw->mac.collision_delta;
4705         }
4706
4707         adapter->stats.xonrxc += er32(XONRXC);
4708         adapter->stats.xontxc += er32(XONTXC);
4709         adapter->stats.xoffrxc += er32(XOFFRXC);
4710         adapter->stats.xofftxc += er32(XOFFTXC);
4711         adapter->stats.gptc += er32(GPTC);
4712         adapter->stats.gotc += er32(GOTCL);
4713         er32(GOTCH);            /* Clear gotc */
4714         adapter->stats.rnbc += er32(RNBC);
4715         adapter->stats.ruc += er32(RUC);
4716
4717         adapter->stats.mptc += er32(MPTC);
4718         adapter->stats.bptc += er32(BPTC);
4719
4720         /* used for adaptive IFS */
4721
4722         hw->mac.tx_packet_delta = er32(TPT);
4723         adapter->stats.tpt += hw->mac.tx_packet_delta;
4724
4725         adapter->stats.algnerrc += er32(ALGNERRC);
4726         adapter->stats.rxerrc += er32(RXERRC);
4727         adapter->stats.cexterr += er32(CEXTERR);
4728         adapter->stats.tsctc += er32(TSCTC);
4729         adapter->stats.tsctfc += er32(TSCTFC);
4730
4731         /* Fill out the OS statistics structure */
4732         netdev->stats.multicast = adapter->stats.mprc;
4733         netdev->stats.collisions = adapter->stats.colc;
4734
4735         /* Rx Errors */
4736
4737         /* RLEC on some newer hardware can be incorrect so build
4738          * our own version based on RUC and ROC
4739          */
4740         netdev->stats.rx_errors = adapter->stats.rxerrc +
4741             adapter->stats.crcerrs + adapter->stats.algnerrc +
4742             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4743         netdev->stats.rx_length_errors = adapter->stats.ruc +
4744             adapter->stats.roc;
4745         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4746         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4747         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4748
4749         /* Tx Errors */
4750         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4751         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4752         netdev->stats.tx_window_errors = adapter->stats.latecol;
4753         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4754
4755         /* Tx Dropped needs to be maintained elsewhere */
4756
4757         /* Management Stats */
4758         adapter->stats.mgptc += er32(MGTPTC);
4759         adapter->stats.mgprc += er32(MGTPRC);
4760         adapter->stats.mgpdc += er32(MGTPDC);
4761
4762         /* Correctable ECC Errors */
4763         if (hw->mac.type == e1000_pch_lpt) {
4764                 u32 pbeccsts = er32(PBECCSTS);
4765
4766                 adapter->corr_errors +=
4767                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4768                 adapter->uncorr_errors +=
4769                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4770                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4771         }
4772 }
4773
4774 /**
4775  * e1000_phy_read_status - Update the PHY register status snapshot
4776  * @adapter: board private structure
4777  **/
4778 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4779 {
4780         struct e1000_hw *hw = &adapter->hw;
4781         struct e1000_phy_regs *phy = &adapter->phy_regs;
4782
4783         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4784             (er32(STATUS) & E1000_STATUS_LU) &&
4785             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4786                 int ret_val;
4787
4788                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4789                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4790                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4791                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4792                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4793                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4794                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4795                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4796                 if (ret_val)
4797                         e_warn("Error reading PHY register\n");
4798         } else {
4799                 /* Do not read PHY registers if link is not up
4800                  * Set values to typical power-on defaults
4801                  */
4802                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4803                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4804                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4805                              BMSR_ERCAP);
4806                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4807                                   ADVERTISE_ALL | ADVERTISE_CSMA);
4808                 phy->lpa = 0;
4809                 phy->expansion = EXPANSION_ENABLENPAGE;
4810                 phy->ctrl1000 = ADVERTISE_1000FULL;
4811                 phy->stat1000 = 0;
4812                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4813         }
4814 }
4815
4816 static void e1000_print_link_info(struct e1000_adapter *adapter)
4817 {
4818         struct e1000_hw *hw = &adapter->hw;
4819         u32 ctrl = er32(CTRL);
4820
4821         /* Link status message must follow this format for user tools */
4822         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4823                 adapter->netdev->name, adapter->link_speed,
4824                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4825                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4826                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4827                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4828 }
4829
4830 static bool e1000e_has_link(struct e1000_adapter *adapter)
4831 {
4832         struct e1000_hw *hw = &adapter->hw;
4833         bool link_active = false;
4834         s32 ret_val = 0;
4835
4836         /* get_link_status is set on LSC (link status) interrupt or
4837          * Rx sequence error interrupt.  get_link_status will stay
4838          * false until the check_for_link establishes link
4839          * for copper adapters ONLY
4840          */
4841         switch (hw->phy.media_type) {
4842         case e1000_media_type_copper:
4843                 if (hw->mac.get_link_status) {
4844                         ret_val = hw->mac.ops.check_for_link(hw);
4845                         link_active = !hw->mac.get_link_status;
4846                 } else {
4847                         link_active = true;
4848                 }
4849                 break;
4850         case e1000_media_type_fiber:
4851                 ret_val = hw->mac.ops.check_for_link(hw);
4852                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4853                 break;
4854         case e1000_media_type_internal_serdes:
4855                 ret_val = hw->mac.ops.check_for_link(hw);
4856                 link_active = adapter->hw.mac.serdes_has_link;
4857                 break;
4858         default:
4859         case e1000_media_type_unknown:
4860                 break;
4861         }
4862
4863         if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4864             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4865                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4866                 e_info("Gigabit has been disabled, downgrading speed\n");
4867         }
4868
4869         return link_active;
4870 }
4871
4872 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4873 {
4874         /* make sure the receive unit is started */
4875         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4876             (adapter->flags & FLAG_RESTART_NOW)) {
4877                 struct e1000_hw *hw = &adapter->hw;
4878                 u32 rctl = er32(RCTL);
4879
4880                 ew32(RCTL, rctl | E1000_RCTL_EN);
4881                 adapter->flags &= ~FLAG_RESTART_NOW;
4882         }
4883 }
4884
4885 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4886 {
4887         struct e1000_hw *hw = &adapter->hw;
4888
4889         /* With 82574 controllers, PHY needs to be checked periodically
4890          * for hung state and reset, if two calls return true
4891          */
4892         if (e1000_check_phy_82574(hw))
4893                 adapter->phy_hang_count++;
4894         else
4895                 adapter->phy_hang_count = 0;
4896
4897         if (adapter->phy_hang_count > 1) {
4898                 adapter->phy_hang_count = 0;
4899                 e_dbg("PHY appears hung - resetting\n");
4900                 schedule_work(&adapter->reset_task);
4901         }
4902 }
4903
4904 /**
4905  * e1000_watchdog - Timer Call-back
4906  * @data: pointer to adapter cast into an unsigned long
4907  **/
4908 static void e1000_watchdog(unsigned long data)
4909 {
4910         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4911
4912         /* Do the rest outside of interrupt context */
4913         schedule_work(&adapter->watchdog_task);
4914
4915         /* TODO: make this use queue_delayed_work() */
4916 }
4917
4918 static void e1000_watchdog_task(struct work_struct *work)
4919 {
4920         struct e1000_adapter *adapter = container_of(work,
4921                                                      struct e1000_adapter,
4922                                                      watchdog_task);
4923         struct net_device *netdev = adapter->netdev;
4924         struct e1000_mac_info *mac = &adapter->hw.mac;
4925         struct e1000_phy_info *phy = &adapter->hw.phy;
4926         struct e1000_ring *tx_ring = adapter->tx_ring;
4927         struct e1000_hw *hw = &adapter->hw;
4928         u32 link, tctl;
4929
4930         if (test_bit(__E1000_DOWN, &adapter->state))
4931                 return;
4932
4933         link = e1000e_has_link(adapter);
4934         if ((netif_carrier_ok(netdev)) && link) {
4935                 /* Cancel scheduled suspend requests. */
4936                 pm_runtime_resume(netdev->dev.parent);
4937
4938                 e1000e_enable_receives(adapter);
4939                 goto link_up;
4940         }
4941
4942         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4943             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4944                 e1000_update_mng_vlan(adapter);
4945
4946         if (link) {
4947                 if (!netif_carrier_ok(netdev)) {
4948                         bool txb2b = true;
4949
4950                         /* Cancel scheduled suspend requests. */
4951                         pm_runtime_resume(netdev->dev.parent);
4952
4953                         /* update snapshot of PHY registers on LSC */
4954                         e1000_phy_read_status(adapter);
4955                         mac->ops.get_link_up_info(&adapter->hw,
4956                                                   &adapter->link_speed,
4957                                                   &adapter->link_duplex);
4958                         e1000_print_link_info(adapter);
4959
4960                         /* check if SmartSpeed worked */
4961                         e1000e_check_downshift(hw);
4962                         if (phy->speed_downgraded)
4963                                 netdev_warn(netdev,
4964                                             "Link Speed was downgraded by SmartSpeed\n");
4965
4966                         /* On supported PHYs, check for duplex mismatch only
4967                          * if link has autonegotiated at 10/100 half
4968                          */
4969                         if ((hw->phy.type == e1000_phy_igp_3 ||
4970                              hw->phy.type == e1000_phy_bm) &&
4971                             hw->mac.autoneg &&
4972                             (adapter->link_speed == SPEED_10 ||
4973                              adapter->link_speed == SPEED_100) &&
4974                             (adapter->link_duplex == HALF_DUPLEX)) {
4975                                 u16 autoneg_exp;
4976
4977                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
4978
4979                                 if (!(autoneg_exp & EXPANSION_NWAY))
4980                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
4981                         }
4982
4983                         /* adjust timeout factor according to speed/duplex */
4984                         adapter->tx_timeout_factor = 1;
4985                         switch (adapter->link_speed) {
4986                         case SPEED_10:
4987                                 txb2b = false;
4988                                 adapter->tx_timeout_factor = 16;
4989                                 break;
4990                         case SPEED_100:
4991                                 txb2b = false;
4992                                 adapter->tx_timeout_factor = 10;
4993                                 break;
4994                         }
4995
4996                         /* workaround: re-program speed mode bit after
4997                          * link-up event
4998                          */
4999                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5000                             !txb2b) {
5001                                 u32 tarc0;
5002
5003                                 tarc0 = er32(TARC(0));
5004                                 tarc0 &= ~SPEED_MODE_BIT;
5005                                 ew32(TARC(0), tarc0);
5006                         }
5007
5008                         /* disable TSO for pcie and 10/100 speeds, to avoid
5009                          * some hardware issues
5010                          */
5011                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5012                                 switch (adapter->link_speed) {
5013                                 case SPEED_10:
5014                                 case SPEED_100:
5015                                         e_info("10/100 speed: disabling TSO\n");
5016                                         netdev->features &= ~NETIF_F_TSO;
5017                                         netdev->features &= ~NETIF_F_TSO6;
5018                                         break;
5019                                 case SPEED_1000:
5020                                         netdev->features |= NETIF_F_TSO;
5021                                         netdev->features |= NETIF_F_TSO6;
5022                                         break;
5023                                 default:
5024                                         /* oops */
5025                                         break;
5026                                 }
5027                         }
5028
5029                         /* enable transmits in the hardware, need to do this
5030                          * after setting TARC(0)
5031                          */
5032                         tctl = er32(TCTL);
5033                         tctl |= E1000_TCTL_EN;
5034                         ew32(TCTL, tctl);
5035
5036                         /* Perform any post-link-up configuration before
5037                          * reporting link up.
5038                          */
5039                         if (phy->ops.cfg_on_link_up)
5040                                 phy->ops.cfg_on_link_up(hw);
5041
5042                         netif_carrier_on(netdev);
5043
5044                         if (!test_bit(__E1000_DOWN, &adapter->state))
5045                                 mod_timer(&adapter->phy_info_timer,
5046                                           round_jiffies(jiffies + 2 * HZ));
5047                 }
5048         } else {
5049                 if (netif_carrier_ok(netdev)) {
5050                         adapter->link_speed = 0;
5051                         adapter->link_duplex = 0;
5052                         /* Link status message must follow this format */
5053                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5054                         netif_carrier_off(netdev);
5055                         if (!test_bit(__E1000_DOWN, &adapter->state))
5056                                 mod_timer(&adapter->phy_info_timer,
5057                                           round_jiffies(jiffies + 2 * HZ));
5058
5059                         /* 8000ES2LAN requires a Rx packet buffer work-around
5060                          * on link down event; reset the controller to flush
5061                          * the Rx packet buffer.
5062                          */
5063                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5064                                 adapter->flags |= FLAG_RESTART_NOW;
5065                         else
5066                                 pm_schedule_suspend(netdev->dev.parent,
5067                                                     LINK_TIMEOUT);
5068                 }
5069         }
5070
5071 link_up:
5072         spin_lock(&adapter->stats64_lock);
5073         e1000e_update_stats(adapter);
5074
5075         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5076         adapter->tpt_old = adapter->stats.tpt;
5077         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5078         adapter->colc_old = adapter->stats.colc;
5079
5080         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5081         adapter->gorc_old = adapter->stats.gorc;
5082         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5083         adapter->gotc_old = adapter->stats.gotc;
5084         spin_unlock(&adapter->stats64_lock);
5085
5086         /* If the link is lost the controller stops DMA, but
5087          * if there is queued Tx work it cannot be done.  So
5088          * reset the controller to flush the Tx packet buffers.
5089          */
5090         if (!netif_carrier_ok(netdev) &&
5091             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5092                 adapter->flags |= FLAG_RESTART_NOW;
5093
5094         /* If reset is necessary, do it outside of interrupt context. */
5095         if (adapter->flags & FLAG_RESTART_NOW) {
5096                 schedule_work(&adapter->reset_task);
5097                 /* return immediately since reset is imminent */
5098                 return;
5099         }
5100
5101         e1000e_update_adaptive(&adapter->hw);
5102
5103         /* Simple mode for Interrupt Throttle Rate (ITR) */
5104         if (adapter->itr_setting == 4) {
5105                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5106                  * Total asymmetrical Tx or Rx gets ITR=8000;
5107                  * everyone else is between 2000-8000.
5108                  */
5109                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5110                 u32 dif = (adapter->gotc > adapter->gorc ?
5111                            adapter->gotc - adapter->gorc :
5112                            adapter->gorc - adapter->gotc) / 10000;
5113                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5114
5115                 e1000e_write_itr(adapter, itr);
5116         }
5117
5118         /* Cause software interrupt to ensure Rx ring is cleaned */
5119         if (adapter->msix_entries)
5120                 ew32(ICS, adapter->rx_ring->ims_val);
5121         else
5122                 ew32(ICS, E1000_ICS_RXDMT0);
5123
5124         /* flush pending descriptors to memory before detecting Tx hang */
5125         e1000e_flush_descriptors(adapter);
5126
5127         /* Force detection of hung controller every watchdog period */
5128         adapter->detect_tx_hung = true;
5129
5130         /* With 82571 controllers, LAA may be overwritten due to controller
5131          * reset from the other port. Set the appropriate LAA in RAR[0]
5132          */
5133         if (e1000e_get_laa_state_82571(hw))
5134                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5135
5136         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5137                 e1000e_check_82574_phy_workaround(adapter);
5138
5139         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5140         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5141                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5142                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5143                         er32(RXSTMPH);
5144                         adapter->rx_hwtstamp_cleared++;
5145                 } else {
5146                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5147                 }
5148         }
5149
5150         /* Reset the timer */
5151         if (!test_bit(__E1000_DOWN, &adapter->state))
5152                 mod_timer(&adapter->watchdog_timer,
5153                           round_jiffies(jiffies + 2 * HZ));
5154 }
5155
5156 #define E1000_TX_FLAGS_CSUM             0x00000001
5157 #define E1000_TX_FLAGS_VLAN             0x00000002
5158 #define E1000_TX_FLAGS_TSO              0x00000004
5159 #define E1000_TX_FLAGS_IPV4             0x00000008
5160 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5161 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5162 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5163 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5164
5165 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5166                      __be16 protocol)
5167 {
5168         struct e1000_context_desc *context_desc;
5169         struct e1000_buffer *buffer_info;
5170         unsigned int i;
5171         u32 cmd_length = 0;
5172         u16 ipcse = 0, mss;
5173         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5174         int err;
5175
5176         if (!skb_is_gso(skb))
5177                 return 0;
5178
5179         err = skb_cow_head(skb, 0);
5180         if (err < 0)
5181                 return err;
5182
5183         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5184         mss = skb_shinfo(skb)->gso_size;
5185         if (protocol == htons(ETH_P_IP)) {
5186                 struct iphdr *iph = ip_hdr(skb);
5187                 iph->tot_len = 0;
5188                 iph->check = 0;
5189                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5190                                                          0, IPPROTO_TCP, 0);
5191                 cmd_length = E1000_TXD_CMD_IP;
5192                 ipcse = skb_transport_offset(skb) - 1;
5193         } else if (skb_is_gso_v6(skb)) {
5194                 ipv6_hdr(skb)->payload_len = 0;
5195                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5196                                                        &ipv6_hdr(skb)->daddr,
5197                                                        0, IPPROTO_TCP, 0);
5198                 ipcse = 0;
5199         }
5200         ipcss = skb_network_offset(skb);
5201         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5202         tucss = skb_transport_offset(skb);
5203         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5204
5205         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5206                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5207
5208         i = tx_ring->next_to_use;
5209         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5210         buffer_info = &tx_ring->buffer_info[i];
5211
5212         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5213         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5214         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5215         context_desc->upper_setup.tcp_fields.tucss = tucss;
5216         context_desc->upper_setup.tcp_fields.tucso = tucso;
5217         context_desc->upper_setup.tcp_fields.tucse = 0;
5218         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5219         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5220         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5221
5222         buffer_info->time_stamp = jiffies;
5223         buffer_info->next_to_watch = i;
5224
5225         i++;
5226         if (i == tx_ring->count)
5227                 i = 0;
5228         tx_ring->next_to_use = i;
5229
5230         return 1;
5231 }
5232
5233 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5234                           __be16 protocol)
5235 {
5236         struct e1000_adapter *adapter = tx_ring->adapter;
5237         struct e1000_context_desc *context_desc;
5238         struct e1000_buffer *buffer_info;
5239         unsigned int i;
5240         u8 css;
5241         u32 cmd_len = E1000_TXD_CMD_DEXT;
5242
5243         if (skb->ip_summed != CHECKSUM_PARTIAL)
5244                 return false;
5245
5246         switch (protocol) {
5247         case cpu_to_be16(ETH_P_IP):
5248                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5249                         cmd_len |= E1000_TXD_CMD_TCP;
5250                 break;
5251         case cpu_to_be16(ETH_P_IPV6):
5252                 /* XXX not handling all IPV6 headers */
5253                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5254                         cmd_len |= E1000_TXD_CMD_TCP;
5255                 break;
5256         default:
5257                 if (unlikely(net_ratelimit()))
5258                         e_warn("checksum_partial proto=%x!\n",
5259                                be16_to_cpu(protocol));
5260                 break;
5261         }
5262
5263         css = skb_checksum_start_offset(skb);
5264
5265         i = tx_ring->next_to_use;
5266         buffer_info = &tx_ring->buffer_info[i];
5267         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5268
5269         context_desc->lower_setup.ip_config = 0;
5270         context_desc->upper_setup.tcp_fields.tucss = css;
5271         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5272         context_desc->upper_setup.tcp_fields.tucse = 0;
5273         context_desc->tcp_seg_setup.data = 0;
5274         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5275
5276         buffer_info->time_stamp = jiffies;
5277         buffer_info->next_to_watch = i;
5278
5279         i++;
5280         if (i == tx_ring->count)
5281                 i = 0;
5282         tx_ring->next_to_use = i;
5283
5284         return true;
5285 }
5286
5287 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5288                         unsigned int first, unsigned int max_per_txd,
5289                         unsigned int nr_frags)
5290 {
5291         struct e1000_adapter *adapter = tx_ring->adapter;
5292         struct pci_dev *pdev = adapter->pdev;
5293         struct e1000_buffer *buffer_info;
5294         unsigned int len = skb_headlen(skb);
5295         unsigned int offset = 0, size, count = 0, i;
5296         unsigned int f, bytecount, segs;
5297
5298         i = tx_ring->next_to_use;
5299
5300         while (len) {
5301                 buffer_info = &tx_ring->buffer_info[i];
5302                 size = min(len, max_per_txd);
5303
5304                 buffer_info->length = size;
5305                 buffer_info->time_stamp = jiffies;
5306                 buffer_info->next_to_watch = i;
5307                 buffer_info->dma = dma_map_single(&pdev->dev,
5308                                                   skb->data + offset,
5309                                                   size, DMA_TO_DEVICE);
5310                 buffer_info->mapped_as_page = false;
5311                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5312                         goto dma_error;
5313
5314                 len -= size;
5315                 offset += size;
5316                 count++;
5317
5318                 if (len) {
5319                         i++;
5320                         if (i == tx_ring->count)
5321                                 i = 0;
5322                 }
5323         }
5324
5325         for (f = 0; f < nr_frags; f++) {
5326                 const struct skb_frag_struct *frag;
5327
5328                 frag = &skb_shinfo(skb)->frags[f];
5329                 len = skb_frag_size(frag);
5330                 offset = 0;
5331
5332                 while (len) {
5333                         i++;
5334                         if (i == tx_ring->count)
5335                                 i = 0;
5336
5337                         buffer_info = &tx_ring->buffer_info[i];
5338                         size = min(len, max_per_txd);
5339
5340                         buffer_info->length = size;
5341                         buffer_info->time_stamp = jiffies;
5342                         buffer_info->next_to_watch = i;
5343                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5344                                                             offset, size,
5345                                                             DMA_TO_DEVICE);
5346                         buffer_info->mapped_as_page = true;
5347                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5348                                 goto dma_error;
5349
5350                         len -= size;
5351                         offset += size;
5352                         count++;
5353                 }
5354         }
5355
5356         segs = skb_shinfo(skb)->gso_segs ? : 1;
5357         /* multiply data chunks by size of headers */
5358         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5359
5360         tx_ring->buffer_info[i].skb = skb;
5361         tx_ring->buffer_info[i].segs = segs;
5362         tx_ring->buffer_info[i].bytecount = bytecount;
5363         tx_ring->buffer_info[first].next_to_watch = i;
5364
5365         return count;
5366
5367 dma_error:
5368         dev_err(&pdev->dev, "Tx DMA map failed\n");
5369         buffer_info->dma = 0;
5370         if (count)
5371                 count--;
5372
5373         while (count--) {
5374                 if (i == 0)
5375                         i += tx_ring->count;
5376                 i--;
5377                 buffer_info = &tx_ring->buffer_info[i];
5378                 e1000_put_txbuf(tx_ring, buffer_info);
5379         }
5380
5381         return 0;
5382 }
5383
5384 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5385 {
5386         struct e1000_adapter *adapter = tx_ring->adapter;
5387         struct e1000_tx_desc *tx_desc = NULL;
5388         struct e1000_buffer *buffer_info;
5389         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5390         unsigned int i;
5391
5392         if (tx_flags & E1000_TX_FLAGS_TSO) {
5393                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5394                     E1000_TXD_CMD_TSE;
5395                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5396
5397                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5398                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5399         }
5400
5401         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5402                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5403                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5404         }
5405
5406         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5407                 txd_lower |= E1000_TXD_CMD_VLE;
5408                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5409         }
5410
5411         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5412                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5413
5414         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5415                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5416                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5417         }
5418
5419         i = tx_ring->next_to_use;
5420
5421         do {
5422                 buffer_info = &tx_ring->buffer_info[i];
5423                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5424                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5425                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5426                                                   buffer_info->length);
5427                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5428
5429                 i++;
5430                 if (i == tx_ring->count)
5431                         i = 0;
5432         } while (--count > 0);
5433
5434         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5435
5436         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5437         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5438                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5439
5440         /* Force memory writes to complete before letting h/w
5441          * know there are new descriptors to fetch.  (Only
5442          * applicable for weak-ordered memory model archs,
5443          * such as IA-64).
5444          */
5445         wmb();
5446
5447         tx_ring->next_to_use = i;
5448
5449         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5450                 e1000e_update_tdt_wa(tx_ring, i);
5451         else
5452                 writel(i, tx_ring->tail);
5453
5454         /* we need this if more than one processor can write to our tail
5455          * at a time, it synchronizes IO on IA64/Altix systems
5456          */
5457         mmiowb();
5458 }
5459
5460 #define MINIMUM_DHCP_PACKET_SIZE 282
5461 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5462                                     struct sk_buff *skb)
5463 {
5464         struct e1000_hw *hw = &adapter->hw;
5465         u16 length, offset;
5466
5467         if (vlan_tx_tag_present(skb) &&
5468             !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5469               (adapter->hw.mng_cookie.status &
5470                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5471                 return 0;
5472
5473         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5474                 return 0;
5475
5476         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5477                 return 0;
5478
5479         {
5480                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5481                 struct udphdr *udp;
5482
5483                 if (ip->protocol != IPPROTO_UDP)
5484                         return 0;
5485
5486                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5487                 if (ntohs(udp->dest) != 67)
5488                         return 0;
5489
5490                 offset = (u8 *)udp + 8 - skb->data;
5491                 length = skb->len - offset;
5492                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5493         }
5494
5495         return 0;
5496 }
5497
5498 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5499 {
5500         struct e1000_adapter *adapter = tx_ring->adapter;
5501
5502         netif_stop_queue(adapter->netdev);
5503         /* Herbert's original patch had:
5504          *  smp_mb__after_netif_stop_queue();
5505          * but since that doesn't exist yet, just open code it.
5506          */
5507         smp_mb();
5508
5509         /* We need to check again in a case another CPU has just
5510          * made room available.
5511          */
5512         if (e1000_desc_unused(tx_ring) < size)
5513                 return -EBUSY;
5514
5515         /* A reprieve! */
5516         netif_start_queue(adapter->netdev);
5517         ++adapter->restart_queue;
5518         return 0;
5519 }
5520
5521 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5522 {
5523         BUG_ON(size > tx_ring->count);
5524
5525         if (e1000_desc_unused(tx_ring) >= size)
5526                 return 0;
5527         return __e1000_maybe_stop_tx(tx_ring, size);
5528 }
5529
5530 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5531                                     struct net_device *netdev)
5532 {
5533         struct e1000_adapter *adapter = netdev_priv(netdev);
5534         struct e1000_ring *tx_ring = adapter->tx_ring;
5535         unsigned int first;
5536         unsigned int tx_flags = 0;
5537         unsigned int len = skb_headlen(skb);
5538         unsigned int nr_frags;
5539         unsigned int mss;
5540         int count = 0;
5541         int tso;
5542         unsigned int f;
5543         __be16 protocol = vlan_get_protocol(skb);
5544
5545         if (test_bit(__E1000_DOWN, &adapter->state)) {
5546                 dev_kfree_skb_any(skb);
5547                 return NETDEV_TX_OK;
5548         }
5549
5550         if (skb->len <= 0) {
5551                 dev_kfree_skb_any(skb);
5552                 return NETDEV_TX_OK;
5553         }
5554
5555         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5556          * pad skb in order to meet this minimum size requirement
5557          */
5558         if (skb_put_padto(skb, 17))
5559                 return NETDEV_TX_OK;
5560
5561         mss = skb_shinfo(skb)->gso_size;
5562         if (mss) {
5563                 u8 hdr_len;
5564
5565                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5566                  * points to just header, pull a few bytes of payload from
5567                  * frags into skb->data
5568                  */
5569                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5570                 /* we do this workaround for ES2LAN, but it is un-necessary,
5571                  * avoiding it could save a lot of cycles
5572                  */
5573                 if (skb->data_len && (hdr_len == len)) {
5574                         unsigned int pull_size;
5575
5576                         pull_size = min_t(unsigned int, 4, skb->data_len);
5577                         if (!__pskb_pull_tail(skb, pull_size)) {
5578                                 e_err("__pskb_pull_tail failed.\n");
5579                                 dev_kfree_skb_any(skb);
5580                                 return NETDEV_TX_OK;
5581                         }
5582                         len = skb_headlen(skb);
5583                 }
5584         }
5585
5586         /* reserve a descriptor for the offload context */
5587         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5588                 count++;
5589         count++;
5590
5591         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5592
5593         nr_frags = skb_shinfo(skb)->nr_frags;
5594         for (f = 0; f < nr_frags; f++)
5595                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5596                                       adapter->tx_fifo_limit);
5597
5598         if (adapter->hw.mac.tx_pkt_filtering)
5599                 e1000_transfer_dhcp_info(adapter, skb);
5600
5601         /* need: count + 2 desc gap to keep tail from touching
5602          * head, otherwise try next time
5603          */
5604         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5605                 return NETDEV_TX_BUSY;
5606
5607         if (vlan_tx_tag_present(skb)) {
5608                 tx_flags |= E1000_TX_FLAGS_VLAN;
5609                 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5610         }
5611
5612         first = tx_ring->next_to_use;
5613
5614         tso = e1000_tso(tx_ring, skb, protocol);
5615         if (tso < 0) {
5616                 dev_kfree_skb_any(skb);
5617                 return NETDEV_TX_OK;
5618         }
5619
5620         if (tso)
5621                 tx_flags |= E1000_TX_FLAGS_TSO;
5622         else if (e1000_tx_csum(tx_ring, skb, protocol))
5623                 tx_flags |= E1000_TX_FLAGS_CSUM;
5624
5625         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5626          * 82571 hardware supports TSO capabilities for IPv6 as well...
5627          * no longer assume, we must.
5628          */
5629         if (protocol == htons(ETH_P_IP))
5630                 tx_flags |= E1000_TX_FLAGS_IPV4;
5631
5632         if (unlikely(skb->no_fcs))
5633                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5634
5635         /* if count is 0 then mapping error has occurred */
5636         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5637                              nr_frags);
5638         if (count) {
5639                 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5640                              !adapter->tx_hwtstamp_skb)) {
5641                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5642                         tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5643                         adapter->tx_hwtstamp_skb = skb_get(skb);
5644                         adapter->tx_hwtstamp_start = jiffies;
5645                         schedule_work(&adapter->tx_hwtstamp_work);
5646                 } else {
5647                         skb_tx_timestamp(skb);
5648                 }
5649
5650                 netdev_sent_queue(netdev, skb->len);
5651                 e1000_tx_queue(tx_ring, tx_flags, count);
5652                 /* Make sure there is space in the ring for the next send. */
5653                 e1000_maybe_stop_tx(tx_ring,
5654                                     (MAX_SKB_FRAGS *
5655                                      DIV_ROUND_UP(PAGE_SIZE,
5656                                                   adapter->tx_fifo_limit) + 2));
5657         } else {
5658                 dev_kfree_skb_any(skb);
5659                 tx_ring->buffer_info[first].time_stamp = 0;
5660                 tx_ring->next_to_use = first;
5661         }
5662
5663         return NETDEV_TX_OK;
5664 }
5665
5666 /**
5667  * e1000_tx_timeout - Respond to a Tx Hang
5668  * @netdev: network interface device structure
5669  **/
5670 static void e1000_tx_timeout(struct net_device *netdev)
5671 {
5672         struct e1000_adapter *adapter = netdev_priv(netdev);
5673
5674         /* Do the reset outside of interrupt context */
5675         adapter->tx_timeout_count++;
5676         schedule_work(&adapter->reset_task);
5677 }
5678
5679 static void e1000_reset_task(struct work_struct *work)
5680 {
5681         struct e1000_adapter *adapter;
5682         adapter = container_of(work, struct e1000_adapter, reset_task);
5683
5684         /* don't run the task if already down */
5685         if (test_bit(__E1000_DOWN, &adapter->state))
5686                 return;
5687
5688         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5689                 e1000e_dump(adapter);
5690                 e_err("Reset adapter unexpectedly\n");
5691         }
5692         e1000e_reinit_locked(adapter);
5693 }
5694
5695 /**
5696  * e1000_get_stats64 - Get System Network Statistics
5697  * @netdev: network interface device structure
5698  * @stats: rtnl_link_stats64 pointer
5699  *
5700  * Returns the address of the device statistics structure.
5701  **/
5702 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5703                                              struct rtnl_link_stats64 *stats)
5704 {
5705         struct e1000_adapter *adapter = netdev_priv(netdev);
5706
5707         memset(stats, 0, sizeof(struct rtnl_link_stats64));
5708         spin_lock(&adapter->stats64_lock);
5709         e1000e_update_stats(adapter);
5710         /* Fill out the OS statistics structure */
5711         stats->rx_bytes = adapter->stats.gorc;
5712         stats->rx_packets = adapter->stats.gprc;
5713         stats->tx_bytes = adapter->stats.gotc;
5714         stats->tx_packets = adapter->stats.gptc;
5715         stats->multicast = adapter->stats.mprc;
5716         stats->collisions = adapter->stats.colc;
5717
5718         /* Rx Errors */
5719
5720         /* RLEC on some newer hardware can be incorrect so build
5721          * our own version based on RUC and ROC
5722          */
5723         stats->rx_errors = adapter->stats.rxerrc +
5724             adapter->stats.crcerrs + adapter->stats.algnerrc +
5725             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5726         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5727         stats->rx_crc_errors = adapter->stats.crcerrs;
5728         stats->rx_frame_errors = adapter->stats.algnerrc;
5729         stats->rx_missed_errors = adapter->stats.mpc;
5730
5731         /* Tx Errors */
5732         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5733         stats->tx_aborted_errors = adapter->stats.ecol;
5734         stats->tx_window_errors = adapter->stats.latecol;
5735         stats->tx_carrier_errors = adapter->stats.tncrs;
5736
5737         /* Tx Dropped needs to be maintained elsewhere */
5738
5739         spin_unlock(&adapter->stats64_lock);
5740         return stats;
5741 }
5742
5743 /**
5744  * e1000_change_mtu - Change the Maximum Transfer Unit
5745  * @netdev: network interface device structure
5746  * @new_mtu: new value for maximum frame size
5747  *
5748  * Returns 0 on success, negative on failure
5749  **/
5750 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5751 {
5752         struct e1000_adapter *adapter = netdev_priv(netdev);
5753         int max_frame = new_mtu + VLAN_HLEN + ETH_HLEN + ETH_FCS_LEN;
5754
5755         /* Jumbo frame support */
5756         if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5757             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5758                 e_err("Jumbo Frames not supported.\n");
5759                 return -EINVAL;
5760         }
5761
5762         /* Supported frame sizes */
5763         if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5764             (max_frame > adapter->max_hw_frame_size)) {
5765                 e_err("Unsupported MTU setting\n");
5766                 return -EINVAL;
5767         }
5768
5769         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5770         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5771             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5772             (new_mtu > ETH_DATA_LEN)) {
5773                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5774                 return -EINVAL;
5775         }
5776
5777         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5778                 usleep_range(1000, 2000);
5779         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5780         adapter->max_frame_size = max_frame;
5781         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5782         netdev->mtu = new_mtu;
5783
5784         pm_runtime_get_sync(netdev->dev.parent);
5785
5786         if (netif_running(netdev))
5787                 e1000e_down(adapter, true);
5788
5789         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5790          * means we reserve 2 more, this pushes us to allocate from the next
5791          * larger slab size.
5792          * i.e. RXBUFFER_2048 --> size-4096 slab
5793          * However with the new *_jumbo_rx* routines, jumbo receives will use
5794          * fragmented skbs
5795          */
5796
5797         if (max_frame <= 2048)
5798                 adapter->rx_buffer_len = 2048;
5799         else
5800                 adapter->rx_buffer_len = 4096;
5801
5802         /* adjust allocation if LPE protects us, and we aren't using SBP */
5803         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5804             (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5805                 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5806                     + ETH_FCS_LEN;
5807
5808         if (netif_running(netdev))
5809                 e1000e_up(adapter);
5810         else
5811                 e1000e_reset(adapter);
5812
5813         pm_runtime_put_sync(netdev->dev.parent);
5814
5815         clear_bit(__E1000_RESETTING, &adapter->state);
5816
5817         return 0;
5818 }
5819
5820 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5821                            int cmd)
5822 {
5823         struct e1000_adapter *adapter = netdev_priv(netdev);
5824         struct mii_ioctl_data *data = if_mii(ifr);
5825
5826         if (adapter->hw.phy.media_type != e1000_media_type_copper)
5827                 return -EOPNOTSUPP;
5828
5829         switch (cmd) {
5830         case SIOCGMIIPHY:
5831                 data->phy_id = adapter->hw.phy.addr;
5832                 break;
5833         case SIOCGMIIREG:
5834                 e1000_phy_read_status(adapter);
5835
5836                 switch (data->reg_num & 0x1F) {
5837                 case MII_BMCR:
5838                         data->val_out = adapter->phy_regs.bmcr;
5839                         break;
5840                 case MII_BMSR:
5841                         data->val_out = adapter->phy_regs.bmsr;
5842                         break;
5843                 case MII_PHYSID1:
5844                         data->val_out = (adapter->hw.phy.id >> 16);
5845                         break;
5846                 case MII_PHYSID2:
5847                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
5848                         break;
5849                 case MII_ADVERTISE:
5850                         data->val_out = adapter->phy_regs.advertise;
5851                         break;
5852                 case MII_LPA:
5853                         data->val_out = adapter->phy_regs.lpa;
5854                         break;
5855                 case MII_EXPANSION:
5856                         data->val_out = adapter->phy_regs.expansion;
5857                         break;
5858                 case MII_CTRL1000:
5859                         data->val_out = adapter->phy_regs.ctrl1000;
5860                         break;
5861                 case MII_STAT1000:
5862                         data->val_out = adapter->phy_regs.stat1000;
5863                         break;
5864                 case MII_ESTATUS:
5865                         data->val_out = adapter->phy_regs.estatus;
5866                         break;
5867                 default:
5868                         return -EIO;
5869                 }
5870                 break;
5871         case SIOCSMIIREG:
5872         default:
5873                 return -EOPNOTSUPP;
5874         }
5875         return 0;
5876 }
5877
5878 /**
5879  * e1000e_hwtstamp_ioctl - control hardware time stamping
5880  * @netdev: network interface device structure
5881  * @ifreq: interface request
5882  *
5883  * Outgoing time stamping can be enabled and disabled. Play nice and
5884  * disable it when requested, although it shouldn't cause any overhead
5885  * when no packet needs it. At most one packet in the queue may be
5886  * marked for time stamping, otherwise it would be impossible to tell
5887  * for sure to which packet the hardware time stamp belongs.
5888  *
5889  * Incoming time stamping has to be configured via the hardware filters.
5890  * Not all combinations are supported, in particular event type has to be
5891  * specified. Matching the kind of event packet is not supported, with the
5892  * exception of "all V2 events regardless of level 2 or 4".
5893  **/
5894 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
5895 {
5896         struct e1000_adapter *adapter = netdev_priv(netdev);
5897         struct hwtstamp_config config;
5898         int ret_val;
5899
5900         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
5901                 return -EFAULT;
5902
5903         ret_val = e1000e_config_hwtstamp(adapter, &config);
5904         if (ret_val)
5905                 return ret_val;
5906
5907         switch (config.rx_filter) {
5908         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
5909         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
5910         case HWTSTAMP_FILTER_PTP_V2_SYNC:
5911         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
5912         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
5913         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
5914                 /* With V2 type filters which specify a Sync or Delay Request,
5915                  * Path Delay Request/Response messages are also time stamped
5916                  * by hardware so notify the caller the requested packets plus
5917                  * some others are time stamped.
5918                  */
5919                 config.rx_filter = HWTSTAMP_FILTER_SOME;
5920                 break;
5921         default:
5922                 break;
5923         }
5924
5925         return copy_to_user(ifr->ifr_data, &config,
5926                             sizeof(config)) ? -EFAULT : 0;
5927 }
5928
5929 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
5930 {
5931         struct e1000_adapter *adapter = netdev_priv(netdev);
5932
5933         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
5934                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
5935 }
5936
5937 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5938 {
5939         switch (cmd) {
5940         case SIOCGMIIPHY:
5941         case SIOCGMIIREG:
5942         case SIOCSMIIREG:
5943                 return e1000_mii_ioctl(netdev, ifr, cmd);
5944         case SIOCSHWTSTAMP:
5945                 return e1000e_hwtstamp_set(netdev, ifr);
5946         case SIOCGHWTSTAMP:
5947                 return e1000e_hwtstamp_get(netdev, ifr);
5948         default:
5949                 return -EOPNOTSUPP;
5950         }
5951 }
5952
5953 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5954 {
5955         struct e1000_hw *hw = &adapter->hw;
5956         u32 i, mac_reg, wuc;
5957         u16 phy_reg, wuc_enable;
5958         int retval;
5959
5960         /* copy MAC RARs to PHY RARs */
5961         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5962
5963         retval = hw->phy.ops.acquire(hw);
5964         if (retval) {
5965                 e_err("Could not acquire PHY\n");
5966                 return retval;
5967         }
5968
5969         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5970         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5971         if (retval)
5972                 goto release;
5973
5974         /* copy MAC MTA to PHY MTA - only needed for pchlan */
5975         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5976                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5977                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5978                                            (u16)(mac_reg & 0xFFFF));
5979                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5980                                            (u16)((mac_reg >> 16) & 0xFFFF));
5981         }
5982
5983         /* configure PHY Rx Control register */
5984         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5985         mac_reg = er32(RCTL);
5986         if (mac_reg & E1000_RCTL_UPE)
5987                 phy_reg |= BM_RCTL_UPE;
5988         if (mac_reg & E1000_RCTL_MPE)
5989                 phy_reg |= BM_RCTL_MPE;
5990         phy_reg &= ~(BM_RCTL_MO_MASK);
5991         if (mac_reg & E1000_RCTL_MO_3)
5992                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5993                             << BM_RCTL_MO_SHIFT);
5994         if (mac_reg & E1000_RCTL_BAM)
5995                 phy_reg |= BM_RCTL_BAM;
5996         if (mac_reg & E1000_RCTL_PMCF)
5997                 phy_reg |= BM_RCTL_PMCF;
5998         mac_reg = er32(CTRL);
5999         if (mac_reg & E1000_CTRL_RFCE)
6000                 phy_reg |= BM_RCTL_RFCE;
6001         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6002
6003         wuc = E1000_WUC_PME_EN;
6004         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6005                 wuc |= E1000_WUC_APME;
6006
6007         /* enable PHY wakeup in MAC register */
6008         ew32(WUFC, wufc);
6009         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6010                    E1000_WUC_PME_STATUS | wuc));
6011
6012         /* configure and enable PHY wakeup in PHY registers */
6013         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6014         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6015
6016         /* activate PHY wakeup */
6017         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6018         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6019         if (retval)
6020                 e_err("Could not set PHY Host Wakeup bit\n");
6021 release:
6022         hw->phy.ops.release(hw);
6023
6024         return retval;
6025 }
6026
6027 static void e1000e_flush_lpic(struct pci_dev *pdev)
6028 {
6029         struct net_device *netdev = pci_get_drvdata(pdev);
6030         struct e1000_adapter *adapter = netdev_priv(netdev);
6031         struct e1000_hw *hw = &adapter->hw;
6032         u32 ret_val;
6033
6034         pm_runtime_get_sync(netdev->dev.parent);
6035
6036         ret_val = hw->phy.ops.acquire(hw);
6037         if (ret_val)
6038                 goto fl_out;
6039
6040         pr_info("EEE TX LPI TIMER: %08X\n",
6041                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6042
6043         hw->phy.ops.release(hw);
6044
6045 fl_out:
6046         pm_runtime_put_sync(netdev->dev.parent);
6047 }
6048
6049 static int e1000e_pm_freeze(struct device *dev)
6050 {
6051         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6052         struct e1000_adapter *adapter = netdev_priv(netdev);
6053
6054         netif_device_detach(netdev);
6055
6056         if (netif_running(netdev)) {
6057                 int count = E1000_CHECK_RESET_COUNT;
6058
6059                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6060                         usleep_range(10000, 20000);
6061
6062                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6063
6064                 /* Quiesce the device without resetting the hardware */
6065                 e1000e_down(adapter, false);
6066                 e1000_free_irq(adapter);
6067         }
6068         e1000e_reset_interrupt_capability(adapter);
6069
6070         /* Allow time for pending master requests to run */
6071         e1000e_disable_pcie_master(&adapter->hw);
6072
6073         return 0;
6074 }
6075
6076 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6077 {
6078         struct net_device *netdev = pci_get_drvdata(pdev);
6079         struct e1000_adapter *adapter = netdev_priv(netdev);
6080         struct e1000_hw *hw = &adapter->hw;
6081         u32 ctrl, ctrl_ext, rctl, status;
6082         /* Runtime suspend should only enable wakeup for link changes */
6083         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6084         int retval = 0;
6085
6086         status = er32(STATUS);
6087         if (status & E1000_STATUS_LU)
6088                 wufc &= ~E1000_WUFC_LNKC;
6089
6090         if (wufc) {
6091                 e1000_setup_rctl(adapter);
6092                 e1000e_set_rx_mode(netdev);
6093
6094                 /* turn on all-multi mode if wake on multicast is enabled */
6095                 if (wufc & E1000_WUFC_MC) {
6096                         rctl = er32(RCTL);
6097                         rctl |= E1000_RCTL_MPE;
6098                         ew32(RCTL, rctl);
6099                 }
6100
6101                 ctrl = er32(CTRL);
6102                 ctrl |= E1000_CTRL_ADVD3WUC;
6103                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6104                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6105                 ew32(CTRL, ctrl);
6106
6107                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6108                     adapter->hw.phy.media_type ==
6109                     e1000_media_type_internal_serdes) {
6110                         /* keep the laser running in D3 */
6111                         ctrl_ext = er32(CTRL_EXT);
6112                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6113                         ew32(CTRL_EXT, ctrl_ext);
6114                 }
6115
6116                 if (!runtime)
6117                         e1000e_power_up_phy(adapter);
6118
6119                 if (adapter->flags & FLAG_IS_ICH)
6120                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6121
6122                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6123                         /* enable wakeup by the PHY */
6124                         retval = e1000_init_phy_wakeup(adapter, wufc);
6125                         if (retval)
6126                                 return retval;
6127                 } else {
6128                         /* enable wakeup by the MAC */
6129                         ew32(WUFC, wufc);
6130                         ew32(WUC, E1000_WUC_PME_EN);
6131                 }
6132         } else {
6133                 ew32(WUC, 0);
6134                 ew32(WUFC, 0);
6135
6136                 e1000_power_down_phy(adapter);
6137         }
6138
6139         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6140                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6141         } else if (hw->mac.type == e1000_pch_lpt) {
6142                 if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6143                         /* ULP does not support wake from unicast, multicast
6144                          * or broadcast.
6145                          */
6146                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6147
6148                 if (retval)
6149                         return retval;
6150         }
6151
6152
6153         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6154          * would have already happened in close and is redundant.
6155          */
6156         e1000e_release_hw_control(adapter);
6157
6158         pci_clear_master(pdev);
6159
6160         /* The pci-e switch on some quad port adapters will report a
6161          * correctable error when the MAC transitions from D0 to D3.  To
6162          * prevent this we need to mask off the correctable errors on the
6163          * downstream port of the pci-e switch.
6164          *
6165          * We don't have the associated upstream bridge while assigning
6166          * the PCI device into guest. For example, the KVM on power is
6167          * one of the cases.
6168          */
6169         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6170                 struct pci_dev *us_dev = pdev->bus->self;
6171                 u16 devctl;
6172
6173                 if (!us_dev)
6174                         return 0;
6175
6176                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6177                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6178                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6179
6180                 pci_save_state(pdev);
6181                 pci_prepare_to_sleep(pdev);
6182
6183                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6184         }
6185
6186         return 0;
6187 }
6188
6189 /**
6190  * e1000e_disable_aspm - Disable ASPM states
6191  * @pdev: pointer to PCI device struct
6192  * @state: bit-mask of ASPM states to disable
6193  *
6194  * Some devices *must* have certain ASPM states disabled per hardware errata.
6195  **/
6196 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6197 {
6198         struct pci_dev *parent = pdev->bus->self;
6199         u16 aspm_dis_mask = 0;
6200         u16 pdev_aspmc, parent_aspmc;
6201
6202         switch (state) {
6203         case PCIE_LINK_STATE_L0S:
6204         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6205                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6206                 /* fall-through - can't have L1 without L0s */
6207         case PCIE_LINK_STATE_L1:
6208                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6209                 break;
6210         default:
6211                 return;
6212         }
6213
6214         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6215         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6216
6217         if (parent) {
6218                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6219                                           &parent_aspmc);
6220                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6221         }
6222
6223         /* Nothing to do if the ASPM states to be disabled already are */
6224         if (!(pdev_aspmc & aspm_dis_mask) &&
6225             (!parent || !(parent_aspmc & aspm_dis_mask)))
6226                 return;
6227
6228         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6229                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6230                  "L0s" : "",
6231                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6232                  "L1" : "");
6233
6234 #ifdef CONFIG_PCIEASPM
6235         pci_disable_link_state_locked(pdev, state);
6236
6237         /* Double-check ASPM control.  If not disabled by the above, the
6238          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6239          * not enabled); override by writing PCI config space directly.
6240          */
6241         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6242         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6243
6244         if (!(aspm_dis_mask & pdev_aspmc))
6245                 return;
6246 #endif
6247
6248         /* Both device and parent should have the same ASPM setting.
6249          * Disable ASPM in downstream component first and then upstream.
6250          */
6251         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6252
6253         if (parent)
6254                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6255                                            aspm_dis_mask);
6256 }
6257
6258 #ifdef CONFIG_PM
6259 static int __e1000_resume(struct pci_dev *pdev)
6260 {
6261         struct net_device *netdev = pci_get_drvdata(pdev);
6262         struct e1000_adapter *adapter = netdev_priv(netdev);
6263         struct e1000_hw *hw = &adapter->hw;
6264         u16 aspm_disable_flag = 0;
6265
6266         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6267                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6268         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6269                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6270         if (aspm_disable_flag)
6271                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6272
6273         pci_set_master(pdev);
6274
6275         if (hw->mac.type >= e1000_pch2lan)
6276                 e1000_resume_workarounds_pchlan(&adapter->hw);
6277
6278         e1000e_power_up_phy(adapter);
6279
6280         /* report the system wakeup cause from S3/S4 */
6281         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6282                 u16 phy_data;
6283
6284                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6285                 if (phy_data) {
6286                         e_info("PHY Wakeup cause - %s\n",
6287                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6288                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6289                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6290                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6291                                phy_data & E1000_WUS_LNKC ?
6292                                "Link Status Change" : "other");
6293                 }
6294                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6295         } else {
6296                 u32 wus = er32(WUS);
6297
6298                 if (wus) {
6299                         e_info("MAC Wakeup cause - %s\n",
6300                                wus & E1000_WUS_EX ? "Unicast Packet" :
6301                                wus & E1000_WUS_MC ? "Multicast Packet" :
6302                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6303                                wus & E1000_WUS_MAG ? "Magic Packet" :
6304                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6305                                "other");
6306                 }
6307                 ew32(WUS, ~0);
6308         }
6309
6310         e1000e_reset(adapter);
6311
6312         e1000_init_manageability_pt(adapter);
6313
6314         /* If the controller has AMT, do not set DRV_LOAD until the interface
6315          * is up.  For all other cases, let the f/w know that the h/w is now
6316          * under the control of the driver.
6317          */
6318         if (!(adapter->flags & FLAG_HAS_AMT))
6319                 e1000e_get_hw_control(adapter);
6320
6321         return 0;
6322 }
6323
6324 #ifdef CONFIG_PM_SLEEP
6325 static int e1000e_pm_thaw(struct device *dev)
6326 {
6327         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6328         struct e1000_adapter *adapter = netdev_priv(netdev);
6329
6330         e1000e_set_interrupt_capability(adapter);
6331         if (netif_running(netdev)) {
6332                 u32 err = e1000_request_irq(adapter);
6333
6334                 if (err)
6335                         return err;
6336
6337                 e1000e_up(adapter);
6338         }
6339
6340         netif_device_attach(netdev);
6341
6342         return 0;
6343 }
6344
6345 static int e1000e_pm_suspend(struct device *dev)
6346 {
6347         struct pci_dev *pdev = to_pci_dev(dev);
6348
6349         e1000e_flush_lpic(pdev);
6350
6351         e1000e_pm_freeze(dev);
6352
6353         return __e1000_shutdown(pdev, false);
6354 }
6355
6356 static int e1000e_pm_resume(struct device *dev)
6357 {
6358         struct pci_dev *pdev = to_pci_dev(dev);
6359         int rc;
6360
6361         rc = __e1000_resume(pdev);
6362         if (rc)
6363                 return rc;
6364
6365         return e1000e_pm_thaw(dev);
6366 }
6367 #endif /* CONFIG_PM_SLEEP */
6368
6369 static int e1000e_pm_runtime_idle(struct device *dev)
6370 {
6371         struct pci_dev *pdev = to_pci_dev(dev);
6372         struct net_device *netdev = pci_get_drvdata(pdev);
6373         struct e1000_adapter *adapter = netdev_priv(netdev);
6374         u16 eee_lp;
6375
6376         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6377
6378         if (!e1000e_has_link(adapter)) {
6379                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6380                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6381         }
6382
6383         return -EBUSY;
6384 }
6385
6386 static int e1000e_pm_runtime_resume(struct device *dev)
6387 {
6388         struct pci_dev *pdev = to_pci_dev(dev);
6389         struct net_device *netdev = pci_get_drvdata(pdev);
6390         struct e1000_adapter *adapter = netdev_priv(netdev);
6391         int rc;
6392
6393         rc = __e1000_resume(pdev);
6394         if (rc)
6395                 return rc;
6396
6397         if (netdev->flags & IFF_UP)
6398                 rc = e1000e_up(adapter);
6399
6400         return rc;
6401 }
6402
6403 static int e1000e_pm_runtime_suspend(struct device *dev)
6404 {
6405         struct pci_dev *pdev = to_pci_dev(dev);
6406         struct net_device *netdev = pci_get_drvdata(pdev);
6407         struct e1000_adapter *adapter = netdev_priv(netdev);
6408
6409         if (netdev->flags & IFF_UP) {
6410                 int count = E1000_CHECK_RESET_COUNT;
6411
6412                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6413                         usleep_range(10000, 20000);
6414
6415                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6416
6417                 /* Down the device without resetting the hardware */
6418                 e1000e_down(adapter, false);
6419         }
6420
6421         if (__e1000_shutdown(pdev, true)) {
6422                 e1000e_pm_runtime_resume(dev);
6423                 return -EBUSY;
6424         }
6425
6426         return 0;
6427 }
6428 #endif /* CONFIG_PM */
6429
6430 static void e1000_shutdown(struct pci_dev *pdev)
6431 {
6432         e1000e_flush_lpic(pdev);
6433
6434         e1000e_pm_freeze(&pdev->dev);
6435
6436         __e1000_shutdown(pdev, false);
6437 }
6438
6439 #ifdef CONFIG_NET_POLL_CONTROLLER
6440
6441 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6442 {
6443         struct net_device *netdev = data;
6444         struct e1000_adapter *adapter = netdev_priv(netdev);
6445
6446         if (adapter->msix_entries) {
6447                 int vector, msix_irq;
6448
6449                 vector = 0;
6450                 msix_irq = adapter->msix_entries[vector].vector;
6451                 disable_irq(msix_irq);
6452                 e1000_intr_msix_rx(msix_irq, netdev);
6453                 enable_irq(msix_irq);
6454
6455                 vector++;
6456                 msix_irq = adapter->msix_entries[vector].vector;
6457                 disable_irq(msix_irq);
6458                 e1000_intr_msix_tx(msix_irq, netdev);
6459                 enable_irq(msix_irq);
6460
6461                 vector++;
6462                 msix_irq = adapter->msix_entries[vector].vector;
6463                 disable_irq(msix_irq);
6464                 e1000_msix_other(msix_irq, netdev);
6465                 enable_irq(msix_irq);
6466         }
6467
6468         return IRQ_HANDLED;
6469 }
6470
6471 /**
6472  * e1000_netpoll
6473  * @netdev: network interface device structure
6474  *
6475  * Polling 'interrupt' - used by things like netconsole to send skbs
6476  * without having to re-enable interrupts. It's not called while
6477  * the interrupt routine is executing.
6478  */
6479 static void e1000_netpoll(struct net_device *netdev)
6480 {
6481         struct e1000_adapter *adapter = netdev_priv(netdev);
6482
6483         switch (adapter->int_mode) {
6484         case E1000E_INT_MODE_MSIX:
6485                 e1000_intr_msix(adapter->pdev->irq, netdev);
6486                 break;
6487         case E1000E_INT_MODE_MSI:
6488                 disable_irq(adapter->pdev->irq);
6489                 e1000_intr_msi(adapter->pdev->irq, netdev);
6490                 enable_irq(adapter->pdev->irq);
6491                 break;
6492         default:                /* E1000E_INT_MODE_LEGACY */
6493                 disable_irq(adapter->pdev->irq);
6494                 e1000_intr(adapter->pdev->irq, netdev);
6495                 enable_irq(adapter->pdev->irq);
6496                 break;
6497         }
6498 }
6499 #endif
6500
6501 /**
6502  * e1000_io_error_detected - called when PCI error is detected
6503  * @pdev: Pointer to PCI device
6504  * @state: The current pci connection state
6505  *
6506  * This function is called after a PCI bus error affecting
6507  * this device has been detected.
6508  */
6509 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6510                                                 pci_channel_state_t state)
6511 {
6512         struct net_device *netdev = pci_get_drvdata(pdev);
6513         struct e1000_adapter *adapter = netdev_priv(netdev);
6514
6515         netif_device_detach(netdev);
6516
6517         if (state == pci_channel_io_perm_failure)
6518                 return PCI_ERS_RESULT_DISCONNECT;
6519
6520         if (netif_running(netdev))
6521                 e1000e_down(adapter, true);
6522         pci_disable_device(pdev);
6523
6524         /* Request a slot slot reset. */
6525         return PCI_ERS_RESULT_NEED_RESET;
6526 }
6527
6528 /**
6529  * e1000_io_slot_reset - called after the pci bus has been reset.
6530  * @pdev: Pointer to PCI device
6531  *
6532  * Restart the card from scratch, as if from a cold-boot. Implementation
6533  * resembles the first-half of the e1000e_pm_resume routine.
6534  */
6535 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6536 {
6537         struct net_device *netdev = pci_get_drvdata(pdev);
6538         struct e1000_adapter *adapter = netdev_priv(netdev);
6539         struct e1000_hw *hw = &adapter->hw;
6540         u16 aspm_disable_flag = 0;
6541         int err;
6542         pci_ers_result_t result;
6543
6544         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6545                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6546         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6547                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6548         if (aspm_disable_flag)
6549                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6550
6551         err = pci_enable_device_mem(pdev);
6552         if (err) {
6553                 dev_err(&pdev->dev,
6554                         "Cannot re-enable PCI device after reset.\n");
6555                 result = PCI_ERS_RESULT_DISCONNECT;
6556         } else {
6557                 pdev->state_saved = true;
6558                 pci_restore_state(pdev);
6559                 pci_set_master(pdev);
6560
6561                 pci_enable_wake(pdev, PCI_D3hot, 0);
6562                 pci_enable_wake(pdev, PCI_D3cold, 0);
6563
6564                 e1000e_reset(adapter);
6565                 ew32(WUS, ~0);
6566                 result = PCI_ERS_RESULT_RECOVERED;
6567         }
6568
6569         pci_cleanup_aer_uncorrect_error_status(pdev);
6570
6571         return result;
6572 }
6573
6574 /**
6575  * e1000_io_resume - called when traffic can start flowing again.
6576  * @pdev: Pointer to PCI device
6577  *
6578  * This callback is called when the error recovery driver tells us that
6579  * its OK to resume normal operation. Implementation resembles the
6580  * second-half of the e1000e_pm_resume routine.
6581  */
6582 static void e1000_io_resume(struct pci_dev *pdev)
6583 {
6584         struct net_device *netdev = pci_get_drvdata(pdev);
6585         struct e1000_adapter *adapter = netdev_priv(netdev);
6586
6587         e1000_init_manageability_pt(adapter);
6588
6589         if (netif_running(netdev)) {
6590                 if (e1000e_up(adapter)) {
6591                         dev_err(&pdev->dev,
6592                                 "can't bring device back up after reset\n");
6593                         return;
6594                 }
6595         }
6596
6597         netif_device_attach(netdev);
6598
6599         /* If the controller has AMT, do not set DRV_LOAD until the interface
6600          * is up.  For all other cases, let the f/w know that the h/w is now
6601          * under the control of the driver.
6602          */
6603         if (!(adapter->flags & FLAG_HAS_AMT))
6604                 e1000e_get_hw_control(adapter);
6605 }
6606
6607 static void e1000_print_device_info(struct e1000_adapter *adapter)
6608 {
6609         struct e1000_hw *hw = &adapter->hw;
6610         struct net_device *netdev = adapter->netdev;
6611         u32 ret_val;
6612         u8 pba_str[E1000_PBANUM_LENGTH];
6613
6614         /* print bus type/speed/width info */
6615         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6616                /* bus width */
6617                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6618                 "Width x1"),
6619                /* MAC address */
6620                netdev->dev_addr);
6621         e_info("Intel(R) PRO/%s Network Connection\n",
6622                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6623         ret_val = e1000_read_pba_string_generic(hw, pba_str,
6624                                                 E1000_PBANUM_LENGTH);
6625         if (ret_val)
6626                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6627         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6628                hw->mac.type, hw->phy.type, pba_str);
6629 }
6630
6631 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6632 {
6633         struct e1000_hw *hw = &adapter->hw;
6634         int ret_val;
6635         u16 buf = 0;
6636
6637         if (hw->mac.type != e1000_82573)
6638                 return;
6639
6640         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6641         le16_to_cpus(&buf);
6642         if (!ret_val && (!(buf & (1 << 0)))) {
6643                 /* Deep Smart Power Down (DSPD) */
6644                 dev_warn(&adapter->pdev->dev,
6645                          "Warning: detected DSPD enabled in EEPROM\n");
6646         }
6647 }
6648
6649 static int e1000_set_features(struct net_device *netdev,
6650                               netdev_features_t features)
6651 {
6652         struct e1000_adapter *adapter = netdev_priv(netdev);
6653         netdev_features_t changed = features ^ netdev->features;
6654
6655         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6656                 adapter->flags |= FLAG_TSO_FORCE;
6657
6658         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6659                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6660                          NETIF_F_RXALL)))
6661                 return 0;
6662
6663         if (changed & NETIF_F_RXFCS) {
6664                 if (features & NETIF_F_RXFCS) {
6665                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6666                 } else {
6667                         /* We need to take it back to defaults, which might mean
6668                          * stripping is still disabled at the adapter level.
6669                          */
6670                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6671                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6672                         else
6673                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6674                 }
6675         }
6676
6677         netdev->features = features;
6678
6679         if (netif_running(netdev))
6680                 e1000e_reinit_locked(adapter);
6681         else
6682                 e1000e_reset(adapter);
6683
6684         return 0;
6685 }
6686
6687 static const struct net_device_ops e1000e_netdev_ops = {
6688         .ndo_open               = e1000_open,
6689         .ndo_stop               = e1000_close,
6690         .ndo_start_xmit         = e1000_xmit_frame,
6691         .ndo_get_stats64        = e1000e_get_stats64,
6692         .ndo_set_rx_mode        = e1000e_set_rx_mode,
6693         .ndo_set_mac_address    = e1000_set_mac,
6694         .ndo_change_mtu         = e1000_change_mtu,
6695         .ndo_do_ioctl           = e1000_ioctl,
6696         .ndo_tx_timeout         = e1000_tx_timeout,
6697         .ndo_validate_addr      = eth_validate_addr,
6698
6699         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
6700         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
6701 #ifdef CONFIG_NET_POLL_CONTROLLER
6702         .ndo_poll_controller    = e1000_netpoll,
6703 #endif
6704         .ndo_set_features = e1000_set_features,
6705 };
6706
6707 /**
6708  * e1000_probe - Device Initialization Routine
6709  * @pdev: PCI device information struct
6710  * @ent: entry in e1000_pci_tbl
6711  *
6712  * Returns 0 on success, negative on failure
6713  *
6714  * e1000_probe initializes an adapter identified by a pci_dev structure.
6715  * The OS initialization, configuring of the adapter private structure,
6716  * and a hardware reset occur.
6717  **/
6718 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6719 {
6720         struct net_device *netdev;
6721         struct e1000_adapter *adapter;
6722         struct e1000_hw *hw;
6723         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6724         resource_size_t mmio_start, mmio_len;
6725         resource_size_t flash_start, flash_len;
6726         static int cards_found;
6727         u16 aspm_disable_flag = 0;
6728         int bars, i, err, pci_using_dac;
6729         u16 eeprom_data = 0;
6730         u16 eeprom_apme_mask = E1000_EEPROM_APME;
6731         s32 rval = 0;
6732
6733         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6734                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6735         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6736                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6737         if (aspm_disable_flag)
6738                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6739
6740         err = pci_enable_device_mem(pdev);
6741         if (err)
6742                 return err;
6743
6744         pci_using_dac = 0;
6745         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6746         if (!err) {
6747                 pci_using_dac = 1;
6748         } else {
6749                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
6750                 if (err) {
6751                         dev_err(&pdev->dev,
6752                                 "No usable DMA configuration, aborting\n");
6753                         goto err_dma;
6754                 }
6755         }
6756
6757         bars = pci_select_bars(pdev, IORESOURCE_MEM);
6758         err = pci_request_selected_regions_exclusive(pdev, bars,
6759                                                      e1000e_driver_name);
6760         if (err)
6761                 goto err_pci_reg;
6762
6763         /* AER (Advanced Error Reporting) hooks */
6764         pci_enable_pcie_error_reporting(pdev);
6765
6766         pci_set_master(pdev);
6767         /* PCI config space info */
6768         err = pci_save_state(pdev);
6769         if (err)
6770                 goto err_alloc_etherdev;
6771
6772         err = -ENOMEM;
6773         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6774         if (!netdev)
6775                 goto err_alloc_etherdev;
6776
6777         SET_NETDEV_DEV(netdev, &pdev->dev);
6778
6779         netdev->irq = pdev->irq;
6780
6781         pci_set_drvdata(pdev, netdev);
6782         adapter = netdev_priv(netdev);
6783         hw = &adapter->hw;
6784         adapter->netdev = netdev;
6785         adapter->pdev = pdev;
6786         adapter->ei = ei;
6787         adapter->pba = ei->pba;
6788         adapter->flags = ei->flags;
6789         adapter->flags2 = ei->flags2;
6790         adapter->hw.adapter = adapter;
6791         adapter->hw.mac.type = ei->mac;
6792         adapter->max_hw_frame_size = ei->max_hw_frame_size;
6793         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6794
6795         mmio_start = pci_resource_start(pdev, 0);
6796         mmio_len = pci_resource_len(pdev, 0);
6797
6798         err = -EIO;
6799         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6800         if (!adapter->hw.hw_addr)
6801                 goto err_ioremap;
6802
6803         if ((adapter->flags & FLAG_HAS_FLASH) &&
6804             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6805                 flash_start = pci_resource_start(pdev, 1);
6806                 flash_len = pci_resource_len(pdev, 1);
6807                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6808                 if (!adapter->hw.flash_address)
6809                         goto err_flashmap;
6810         }
6811
6812         /* Set default EEE advertisement */
6813         if (adapter->flags2 & FLAG2_HAS_EEE)
6814                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
6815
6816         /* construct the net_device struct */
6817         netdev->netdev_ops = &e1000e_netdev_ops;
6818         e1000e_set_ethtool_ops(netdev);
6819         netdev->watchdog_timeo = 5 * HZ;
6820         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6821         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6822
6823         netdev->mem_start = mmio_start;
6824         netdev->mem_end = mmio_start + mmio_len;
6825
6826         adapter->bd_number = cards_found++;
6827
6828         e1000e_check_options(adapter);
6829
6830         /* setup adapter struct */
6831         err = e1000_sw_init(adapter);
6832         if (err)
6833                 goto err_sw_init;
6834
6835         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6836         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6837         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6838
6839         err = ei->get_variants(adapter);
6840         if (err)
6841                 goto err_hw_init;
6842
6843         if ((adapter->flags & FLAG_IS_ICH) &&
6844             (adapter->flags & FLAG_READ_ONLY_NVM))
6845                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6846
6847         hw->mac.ops.get_bus_info(&adapter->hw);
6848
6849         adapter->hw.phy.autoneg_wait_to_complete = 0;
6850
6851         /* Copper options */
6852         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6853                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6854                 adapter->hw.phy.disable_polarity_correction = 0;
6855                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6856         }
6857
6858         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
6859                 dev_info(&pdev->dev,
6860                          "PHY reset is blocked due to SOL/IDER session.\n");
6861
6862         /* Set initial default active device features */
6863         netdev->features = (NETIF_F_SG |
6864                             NETIF_F_HW_VLAN_CTAG_RX |
6865                             NETIF_F_HW_VLAN_CTAG_TX |
6866                             NETIF_F_TSO |
6867                             NETIF_F_TSO6 |
6868                             NETIF_F_RXHASH |
6869                             NETIF_F_RXCSUM |
6870                             NETIF_F_HW_CSUM);
6871
6872         /* Set user-changeable features (subset of all device features) */
6873         netdev->hw_features = netdev->features;
6874         netdev->hw_features |= NETIF_F_RXFCS;
6875         netdev->priv_flags |= IFF_SUPP_NOFCS;
6876         netdev->hw_features |= NETIF_F_RXALL;
6877
6878         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6879                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
6880
6881         netdev->vlan_features |= (NETIF_F_SG |
6882                                   NETIF_F_TSO |
6883                                   NETIF_F_TSO6 |
6884                                   NETIF_F_HW_CSUM);
6885
6886         netdev->priv_flags |= IFF_UNICAST_FLT;
6887
6888         if (pci_using_dac) {
6889                 netdev->features |= NETIF_F_HIGHDMA;
6890                 netdev->vlan_features |= NETIF_F_HIGHDMA;
6891         }
6892
6893         if (e1000e_enable_mng_pass_thru(&adapter->hw))
6894                 adapter->flags |= FLAG_MNG_PT_ENABLED;
6895
6896         /* before reading the NVM, reset the controller to
6897          * put the device in a known good starting state
6898          */
6899         adapter->hw.mac.ops.reset_hw(&adapter->hw);
6900
6901         /* systems with ASPM and others may see the checksum fail on the first
6902          * attempt. Let's give it a few tries
6903          */
6904         for (i = 0;; i++) {
6905                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6906                         break;
6907                 if (i == 2) {
6908                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
6909                         err = -EIO;
6910                         goto err_eeprom;
6911                 }
6912         }
6913
6914         e1000_eeprom_checks(adapter);
6915
6916         /* copy the MAC address */
6917         if (e1000e_read_mac_addr(&adapter->hw))
6918                 dev_err(&pdev->dev,
6919                         "NVM Read Error while reading MAC address\n");
6920
6921         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6922
6923         if (!is_valid_ether_addr(netdev->dev_addr)) {
6924                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
6925                         netdev->dev_addr);
6926                 err = -EIO;
6927                 goto err_eeprom;
6928         }
6929
6930         init_timer(&adapter->watchdog_timer);
6931         adapter->watchdog_timer.function = e1000_watchdog;
6932         adapter->watchdog_timer.data = (unsigned long)adapter;
6933
6934         init_timer(&adapter->phy_info_timer);
6935         adapter->phy_info_timer.function = e1000_update_phy_info;
6936         adapter->phy_info_timer.data = (unsigned long)adapter;
6937
6938         INIT_WORK(&adapter->reset_task, e1000_reset_task);
6939         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6940         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6941         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6942         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6943
6944         /* Initialize link parameters. User can change them with ethtool */
6945         adapter->hw.mac.autoneg = 1;
6946         adapter->fc_autoneg = true;
6947         adapter->hw.fc.requested_mode = e1000_fc_default;
6948         adapter->hw.fc.current_mode = e1000_fc_default;
6949         adapter->hw.phy.autoneg_advertised = 0x2f;
6950
6951         /* Initial Wake on LAN setting - If APM wake is enabled in
6952          * the EEPROM, enable the ACPI Magic Packet filter
6953          */
6954         if (adapter->flags & FLAG_APME_IN_WUC) {
6955                 /* APME bit in EEPROM is mapped to WUC.APME */
6956                 eeprom_data = er32(WUC);
6957                 eeprom_apme_mask = E1000_WUC_APME;
6958                 if ((hw->mac.type > e1000_ich10lan) &&
6959                     (eeprom_data & E1000_WUC_PHY_WAKE))
6960                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6961         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6962                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6963                     (adapter->hw.bus.func == 1))
6964                         rval = e1000_read_nvm(&adapter->hw,
6965                                               NVM_INIT_CONTROL3_PORT_B,
6966                                               1, &eeprom_data);
6967                 else
6968                         rval = e1000_read_nvm(&adapter->hw,
6969                                               NVM_INIT_CONTROL3_PORT_A,
6970                                               1, &eeprom_data);
6971         }
6972
6973         /* fetch WoL from EEPROM */
6974         if (rval)
6975                 e_dbg("NVM read error getting WoL initial values: %d\n", rval);
6976         else if (eeprom_data & eeprom_apme_mask)
6977                 adapter->eeprom_wol |= E1000_WUFC_MAG;
6978
6979         /* now that we have the eeprom settings, apply the special cases
6980          * where the eeprom may be wrong or the board simply won't support
6981          * wake on lan on a particular port
6982          */
6983         if (!(adapter->flags & FLAG_HAS_WOL))
6984                 adapter->eeprom_wol = 0;
6985
6986         /* initialize the wol settings based on the eeprom settings */
6987         adapter->wol = adapter->eeprom_wol;
6988
6989         /* make sure adapter isn't asleep if manageability is enabled */
6990         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
6991             (hw->mac.ops.check_mng_mode(hw)))
6992                 device_wakeup_enable(&pdev->dev);
6993
6994         /* save off EEPROM version number */
6995         rval = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6996
6997         if (rval) {
6998                 e_dbg("NVM read error getting EEPROM version: %d\n", rval);
6999                 adapter->eeprom_vers = 0;
7000         }
7001
7002         /* reset the hardware with the new settings */
7003         e1000e_reset(adapter);
7004
7005         /* If the controller has AMT, do not set DRV_LOAD until the interface
7006          * is up.  For all other cases, let the f/w know that the h/w is now
7007          * under the control of the driver.
7008          */
7009         if (!(adapter->flags & FLAG_HAS_AMT))
7010                 e1000e_get_hw_control(adapter);
7011
7012         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7013         err = register_netdev(netdev);
7014         if (err)
7015                 goto err_register;
7016
7017         /* carrier off reporting is important to ethtool even BEFORE open */
7018         netif_carrier_off(netdev);
7019
7020         /* init PTP hardware clock */
7021         e1000e_ptp_init(adapter);
7022
7023         e1000_print_device_info(adapter);
7024
7025         if (pci_dev_run_wake(pdev))
7026                 pm_runtime_put_noidle(&pdev->dev);
7027
7028         return 0;
7029
7030 err_register:
7031         if (!(adapter->flags & FLAG_HAS_AMT))
7032                 e1000e_release_hw_control(adapter);
7033 err_eeprom:
7034         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7035                 e1000_phy_hw_reset(&adapter->hw);
7036 err_hw_init:
7037         kfree(adapter->tx_ring);
7038         kfree(adapter->rx_ring);
7039 err_sw_init:
7040         if (adapter->hw.flash_address)
7041                 iounmap(adapter->hw.flash_address);
7042         e1000e_reset_interrupt_capability(adapter);
7043 err_flashmap:
7044         iounmap(adapter->hw.hw_addr);
7045 err_ioremap:
7046         free_netdev(netdev);
7047 err_alloc_etherdev:
7048         pci_release_selected_regions(pdev,
7049                                      pci_select_bars(pdev, IORESOURCE_MEM));
7050 err_pci_reg:
7051 err_dma:
7052         pci_disable_device(pdev);
7053         return err;
7054 }
7055
7056 /**
7057  * e1000_remove - Device Removal Routine
7058  * @pdev: PCI device information struct
7059  *
7060  * e1000_remove is called by the PCI subsystem to alert the driver
7061  * that it should release a PCI device.  The could be caused by a
7062  * Hot-Plug event, or because the driver is going to be removed from
7063  * memory.
7064  **/
7065 static void e1000_remove(struct pci_dev *pdev)
7066 {
7067         struct net_device *netdev = pci_get_drvdata(pdev);
7068         struct e1000_adapter *adapter = netdev_priv(netdev);
7069         bool down = test_bit(__E1000_DOWN, &adapter->state);
7070
7071         e1000e_ptp_remove(adapter);
7072
7073         /* The timers may be rescheduled, so explicitly disable them
7074          * from being rescheduled.
7075          */
7076         if (!down)
7077                 set_bit(__E1000_DOWN, &adapter->state);
7078         del_timer_sync(&adapter->watchdog_timer);
7079         del_timer_sync(&adapter->phy_info_timer);
7080
7081         cancel_work_sync(&adapter->reset_task);
7082         cancel_work_sync(&adapter->watchdog_task);
7083         cancel_work_sync(&adapter->downshift_task);
7084         cancel_work_sync(&adapter->update_phy_task);
7085         cancel_work_sync(&adapter->print_hang_task);
7086
7087         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7088                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7089                 if (adapter->tx_hwtstamp_skb) {
7090                         dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7091                         adapter->tx_hwtstamp_skb = NULL;
7092                 }
7093         }
7094
7095         /* Don't lie to e1000_close() down the road. */
7096         if (!down)
7097                 clear_bit(__E1000_DOWN, &adapter->state);
7098         unregister_netdev(netdev);
7099
7100         if (pci_dev_run_wake(pdev))
7101                 pm_runtime_get_noresume(&pdev->dev);
7102
7103         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7104          * would have already happened in close and is redundant.
7105          */
7106         e1000e_release_hw_control(adapter);
7107
7108         e1000e_reset_interrupt_capability(adapter);
7109         kfree(adapter->tx_ring);
7110         kfree(adapter->rx_ring);
7111
7112         iounmap(adapter->hw.hw_addr);
7113         if (adapter->hw.flash_address)
7114                 iounmap(adapter->hw.flash_address);
7115         pci_release_selected_regions(pdev,
7116                                      pci_select_bars(pdev, IORESOURCE_MEM));
7117
7118         free_netdev(netdev);
7119
7120         /* AER disable */
7121         pci_disable_pcie_error_reporting(pdev);
7122
7123         pci_disable_device(pdev);
7124 }
7125
7126 /* PCI Error Recovery (ERS) */
7127 static const struct pci_error_handlers e1000_err_handler = {
7128         .error_detected = e1000_io_error_detected,
7129         .slot_reset = e1000_io_slot_reset,
7130         .resume = e1000_io_resume,
7131 };
7132
7133 static const struct pci_device_id e1000_pci_tbl[] = {
7134         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7135         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7136         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7137         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7138           board_82571 },
7139         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7140         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7141         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7142         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7143         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7144
7145         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7146         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7147         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7148         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7149
7150         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7151         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7152         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7153
7154         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7155         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7156         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7157
7158         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7159           board_80003es2lan },
7160         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7161           board_80003es2lan },
7162         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7163           board_80003es2lan },
7164         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7165           board_80003es2lan },
7166
7167         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7168         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7169         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7170         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7171         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7172         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7173         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7174         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7175
7176         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7177         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7178         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7179         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7180         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7181         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7182         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7183         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7184         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7185
7186         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7187         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7188         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7189
7190         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7191         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7192         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7193
7194         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7195         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7196         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7197         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7198
7199         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7200         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7201
7202         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7203         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7204         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7205         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7206         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7207         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7208         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7209         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7210
7211         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7212 };
7213 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7214
7215 static const struct dev_pm_ops e1000_pm_ops = {
7216 #ifdef CONFIG_PM_SLEEP
7217         .suspend        = e1000e_pm_suspend,
7218         .resume         = e1000e_pm_resume,
7219         .freeze         = e1000e_pm_freeze,
7220         .thaw           = e1000e_pm_thaw,
7221         .poweroff       = e1000e_pm_suspend,
7222         .restore        = e1000e_pm_resume,
7223 #endif
7224         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7225                            e1000e_pm_runtime_idle)
7226 };
7227
7228 /* PCI Device API Driver */
7229 static struct pci_driver e1000_driver = {
7230         .name     = e1000e_driver_name,
7231         .id_table = e1000_pci_tbl,
7232         .probe    = e1000_probe,
7233         .remove   = e1000_remove,
7234         .driver   = {
7235                 .pm = &e1000_pm_ops,
7236         },
7237         .shutdown = e1000_shutdown,
7238         .err_handler = &e1000_err_handler
7239 };
7240
7241 /**
7242  * e1000_init_module - Driver Registration Routine
7243  *
7244  * e1000_init_module is the first routine called when the driver is
7245  * loaded. All it does is register with the PCI subsystem.
7246  **/
7247 static int __init e1000_init_module(void)
7248 {
7249         int ret;
7250
7251         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7252                 e1000e_driver_version);
7253         pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n");
7254         ret = pci_register_driver(&e1000_driver);
7255
7256         return ret;
7257 }
7258 module_init(e1000_init_module);
7259
7260 /**
7261  * e1000_exit_module - Driver Exit Cleanup Routine
7262  *
7263  * e1000_exit_module is called just before the driver is removed
7264  * from memory.
7265  **/
7266 static void __exit e1000_exit_module(void)
7267 {
7268         pci_unregister_driver(&e1000_driver);
7269 }
7270 module_exit(e1000_exit_module);
7271
7272 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7273 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7274 MODULE_LICENSE("GPL");
7275 MODULE_VERSION(DRV_VERSION);
7276
7277 /* netdev.c */