/* * Copyright 2016 ZTE Corporation. * Copyright 2016 Linaro Ltd. * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This library is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include #include #include / { compatible = "zte,zx296718"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&gic>; aliases { serial0 = &uart0; }; cpus { #address-cells = <2>; #size-cells = <0>; cpu-map { cluster0 { core0 { cpu = <&cpu0>; }; core1 { cpu = <&cpu1>; }; core2 { cpu = <&cpu2>; }; core3 { cpu = <&cpu3>; }; }; }; cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; }; cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; }; cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; }; }; clk24k: clk-24k { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000>; clock-output-names = "rtcclk"; }; osc32k: clk-osc32k { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32000>; clock-output-names = "osc32k"; }; osc12m: clk-osc12m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <12000000>; clock-output-names = "osc12m"; }; osc24m: clk-osc24m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; clock-output-names = "osc24m"; }; osc25m: clk-osc25m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; clock-output-names = "osc25m"; }; osc60m: clk-osc60m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <60000000>; clock-output-names = "osc60m"; }; osc99m: clk-osc99m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <99000000>; clock-output-names = "osc99m"; }; osc125m: clk-osc125m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; clock-output-names = "osc125m"; }; osc198m: clk-osc198m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <198000000>; clock-output-names = "osc198m"; }; pll_audio: clk-pll-884m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <884000000>; clock-output-names = "pll_audio"; }; pll_ddr: clk-pll-932m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <932000000>; clock-output-names = "pll_ddr"; }; pll_hsic: clk-pll-960m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <960000000>; clock-output-names = "pll_hsic"; }; pll_mac: clk-pll-1000m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000000>; clock-output-names = "pll_mac"; }; pll_vga: clk-pll-1073m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1073000000>; clock-output-names = "pll_vga"; }; pll_mm0: clk-pll-1188m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1188000000>; clock-output-names = "pll_mm0"; }; pll_mm1: clk-pll-1296m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1296000000>; clock-output-names = "pll_mm1"; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; timer { compatible = "arm,armv8-timer"; interrupts = , , , ; }; pmu { compatible = "arm,cortex-a53-pmu"; interrupts = ; }; gic: interrupt-controller@2a00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <0>; #redistributor-regions = <6>; redistributor-stride = <0x0 0x40000>; interrupt-controller; reg = <0x02a00000 0x10000>, <0x02b00000 0x20000>, <0x02b20000 0x20000>, <0x02b40000 0x20000>, <0x02b60000 0x20000>, <0x02b80000 0x20000>, <0x02ba0000 0x20000>; interrupts = ; }; soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges; aon_sysctrl: aon-sysctrl@116000 { compatible = "zte,zx296718-aon-sysctrl", "syscon"; reg = <0x116000 0x1000>; }; uart0: uart@11f000 { compatible = "arm,pl011", "arm,primecell"; arm,primecell-periphid = <0x001feffe>; reg = <0x11f000 0x1000>; interrupts = ; clocks = <&osc24m>; clock-names = "apb_pclk"; status = "disabled"; }; dma: dma-controller@1460000 { compatible = "zte,zx296702-dma"; reg = <0x01460000 0x1000>; interrupts = ; clocks = <&osc24m>; clock-names = "dmaclk"; #dma-cells = <1>; dma-channels = <32>; dma-requests = <32>; }; sysctrl: sysctrl@1463000 { compatible = "zte,zx296718-sysctrl", "syscon"; reg = <0x1463000 0x1000>; }; }; };