Merge tag 'tegra-for-4.8-i2c' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra...

[cascardo/linux.git] / Documentation / devicetree / bindings / clock / exynos5410-clock.txt

diff --git a/Documentation/devicetree/bindings/clock/exynos5410-clock.txt b/Documentation/devicetree/bindings/clock/exynos5410-clock.txt
index aeab635..4527de3 100644 (file)
--- a/Documentation/devicetree/bindings/clock/exynos5410-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5410-clock.txt
@@ -12,24 +12,29 @@ Required Properties:
 
 - #clock-cells: should be 1.
 
+- clocks: should contain an entry specifying the root clock from external
+  oscillator supplied through XXTI or XusbXTI pin.  This clock should be
+  defined using standard clock bindings with "fin_pll" clock-output-name.
+  That clock is being passed internally to the 9 PLLs.
+
 All available clocks are defined as preprocessor macros in
 dt-bindings/clock/exynos5410.h header and can be used in device
 tree sources.
 
-External clock:
-
-There is clock that is generated outside the SoC. It
-is expected that it is defined using standard clock bindings
-with following clock-output-name:
-
- - "fin_pll" - PLL input clock from XXTI
-
 Example 1: An example of a clock controller node is listed below.
 
+       fin_pll: xxti {
+               compatible = "fixed-clock";
+               clock-frequency = <24000000>;
+               clock-output-names = "fin_pll";
+               #clock-cells = <0>;
+       };
+
        clock: clock-controller@0x10010000 {
                compatible = "samsung,exynos5410-clock";
                reg = <0x10010000 0x30000>;
                #clock-cells = <1>;
+               clocks = <&fin_pll>;
        };
 
 Example 2: UART controller node that consumes the clock generated by the clock