IB/mlx5: Save flow table priority handler instead of index

[cascardo/linux.git] / MAINTAINERS

diff --git a/MAINTAINERS b/MAINTAINERS
index 20bb1d0..87e23cd 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -636,6 +636,15 @@ F: drivers/tty/serial/altera_jtaguart.c
 F:     include/linux/altera_uart.h
 F:     include/linux/altera_jtaguart.h
 
+AMAZON ETHERNET DRIVERS
+M:     Netanel Belgazal <netanel@annapurnalabs.com>
+R:     Saeed Bishara <saeed@annapurnalabs.com>
+R:     Zorik Machulsky <zorik@annapurnalabs.com>
+L:     netdev@vger.kernel.org
+S:     Supported
+F:     Documentation/networking/ena.txt
+F:     drivers/net/ethernet/amazon/
+
 AMD CRYPTOGRAPHIC COPROCESSOR (CCP) DRIVER
 M:     Tom Lendacky <thomas.lendacky@amd.com>
 M:     Gary Hook <gary.hook@amd.com>
@@ -1004,6 +1013,7 @@ N:        meson
 ARM/Annapurna Labs ALPINE ARCHITECTURE
 M:     Tsahee Zidenberg <tsahee@annapurnalabs.com>
 M:     Antoine Tenart <antoine.tenart@free-electrons.com>
+L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:     Maintained
 F:     arch/arm/mach-alpine/
 F:     arch/arm/boot/dts/alpine*
@@ -5557,6 +5567,14 @@ S:       Maintained
 F:     drivers/net/ethernet/hisilicon/
 F:     Documentation/devicetree/bindings/net/hisilicon*.txt
 
+HISILICON ROCE DRIVER
+M:     Lijun Ou <oulijun@huawei.com>
+M:     Wei Hu(Xavier) <xavier.huwei@huawei.com>
+L:     linux-rdma@vger.kernel.org
+S:     Maintained
+F:     drivers/infiniband/hw/hns/
+F:     Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt
+
 HISILICON SAS Controller
 M:     John Garry <john.garry@huawei.com>
 W:     http://www.hisilicon.com
@@ -9926,6 +9944,7 @@ F:        net/rfkill/
 
 RHASHTABLE
 M:     Thomas Graf <tgraf@suug.ch>
+M:     Herbert Xu <herbert@gondor.apana.org.au>
 L:     netdev@vger.kernel.org
 S:     Maintained
 F:     lib/rhashtable.c