Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[cascardo/linux.git] / arch / alpha / include / asm / atomic.h

diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index 572b228..498933a 100644 (file)
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -46,10 +46,9 @@ static __inline__ void atomic_##op(int i, atomic_t * v)                      \
 }                                                                      \
 
 #define ATOMIC_OP_RETURN(op, asm_op)                                   \
-static inline int atomic_##op##_return(int i, atomic_t *v)             \
+static inline int atomic_##op##_return_relaxed(int i, atomic_t *v)     \
 {                                                                      \
        long temp, result;                                              \
-       smp_mb();                                                       \
        __asm__ __volatile__(                                           \
        "1:     ldl_l %0,%1\n"                                          \
        "       " #asm_op " %0,%3,%2\n"                                 \
@@ -61,7 +60,23 @@ static inline int atomic_##op##_return(int i, atomic_t *v)           \
        ".previous"                                                     \
        :"=&r" (temp), "=m" (v->counter), "=&r" (result)                \
        :"Ir" (i), "m" (v->counter) : "memory");                        \
-       smp_mb();                                                       \
+       return result;                                                  \
+}
+
+#define ATOMIC_FETCH_OP(op, asm_op)                                    \
+static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v)      \
+{                                                                      \
+       long temp, result;                                              \
+       __asm__ __volatile__(                                           \
+       "1:     ldl_l %2,%1\n"                                          \
+       "       " #asm_op " %2,%3,%0\n"                                 \
+       "       stl_c %0,%1\n"                                          \
+       "       beq %0,2f\n"                                            \
+       ".subsection 2\n"                                               \
+       "2:     br 1b\n"                                                \
+       ".previous"                                                     \
+       :"=&r" (temp), "=m" (v->counter), "=&r" (result)                \
+       :"Ir" (i), "m" (v->counter) : "memory");                        \
        return result;                                                  \
 }
 
@@ -82,10 +97,9 @@ static __inline__ void atomic64_##op(long i, atomic64_t * v)         \
 }                                                                      \
 
 #define ATOMIC64_OP_RETURN(op, asm_op)                                 \
-static __inline__ long atomic64_##op##_return(long i, atomic64_t * v)  \
+static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v)  \
 {                                                                      \
        long temp, result;                                              \
-       smp_mb();                                                       \
        __asm__ __volatile__(                                           \
        "1:     ldq_l %0,%1\n"                                          \
        "       " #asm_op " %0,%3,%2\n"                                 \
@@ -97,34 +111,77 @@ static __inline__ long atomic64_##op##_return(long i, atomic64_t * v)      \
        ".previous"                                                     \
        :"=&r" (temp), "=m" (v->counter), "=&r" (result)                \
        :"Ir" (i), "m" (v->counter) : "memory");                        \
-       smp_mb();                                                       \
+       return result;                                                  \
+}
+
+#define ATOMIC64_FETCH_OP(op, asm_op)                                  \
+static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v)   \
+{                                                                      \
+       long temp, result;                                              \
+       __asm__ __volatile__(                                           \
+       "1:     ldq_l %2,%1\n"                                          \
+       "       " #asm_op " %2,%3,%0\n"                                 \
+       "       stq_c %0,%1\n"                                          \
+       "       beq %0,2f\n"                                            \
+       ".subsection 2\n"                                               \
+       "2:     br 1b\n"                                                \
+       ".previous"                                                     \
+       :"=&r" (temp), "=m" (v->counter), "=&r" (result)                \
+       :"Ir" (i), "m" (v->counter) : "memory");                        \
        return result;                                                  \
 }
 
 #define ATOMIC_OPS(op)                                                 \
        ATOMIC_OP(op, op##l)                                            \
        ATOMIC_OP_RETURN(op, op##l)                                     \
+       ATOMIC_FETCH_OP(op, op##l)                                      \
        ATOMIC64_OP(op, op##q)                                          \
-       ATOMIC64_OP_RETURN(op, op##q)
+       ATOMIC64_OP_RETURN(op, op##q)                                   \
+       ATOMIC64_FETCH_OP(op, op##q)
 
 ATOMIC_OPS(add)
 ATOMIC_OPS(sub)
 
+#define atomic_add_return_relaxed      atomic_add_return_relaxed
+#define atomic_sub_return_relaxed      atomic_sub_return_relaxed
+#define atomic_fetch_add_relaxed       atomic_fetch_add_relaxed
+#define atomic_fetch_sub_relaxed       atomic_fetch_sub_relaxed
+
+#define atomic64_add_return_relaxed    atomic64_add_return_relaxed
+#define atomic64_sub_return_relaxed    atomic64_sub_return_relaxed
+#define atomic64_fetch_add_relaxed     atomic64_fetch_add_relaxed
+#define atomic64_fetch_sub_relaxed     atomic64_fetch_sub_relaxed
+
 #define atomic_andnot atomic_andnot
 #define atomic64_andnot atomic64_andnot
 
-ATOMIC_OP(and, and)
-ATOMIC_OP(andnot, bic)
-ATOMIC_OP(or, bis)
-ATOMIC_OP(xor, xor)
-ATOMIC64_OP(and, and)
-ATOMIC64_OP(andnot, bic)
-ATOMIC64_OP(or, bis)
-ATOMIC64_OP(xor, xor)
+#undef ATOMIC_OPS
+#define ATOMIC_OPS(op, asm)                                            \
+       ATOMIC_OP(op, asm)                                              \
+       ATOMIC_FETCH_OP(op, asm)                                        \
+       ATOMIC64_OP(op, asm)                                            \
+       ATOMIC64_FETCH_OP(op, asm)
+
+ATOMIC_OPS(and, and)
+ATOMIC_OPS(andnot, bic)
+ATOMIC_OPS(or, bis)
+ATOMIC_OPS(xor, xor)
+
+#define atomic_fetch_and_relaxed       atomic_fetch_and_relaxed
+#define atomic_fetch_andnot_relaxed    atomic_fetch_andnot_relaxed
+#define atomic_fetch_or_relaxed                atomic_fetch_or_relaxed
+#define atomic_fetch_xor_relaxed       atomic_fetch_xor_relaxed
+
+#define atomic64_fetch_and_relaxed     atomic64_fetch_and_relaxed
+#define atomic64_fetch_andnot_relaxed  atomic64_fetch_andnot_relaxed
+#define atomic64_fetch_or_relaxed      atomic64_fetch_or_relaxed
+#define atomic64_fetch_xor_relaxed     atomic64_fetch_xor_relaxed
 
 #undef ATOMIC_OPS
+#undef ATOMIC64_FETCH_OP
 #undef ATOMIC64_OP_RETURN
 #undef ATOMIC64_OP
+#undef ATOMIC_FETCH_OP
 #undef ATOMIC_OP_RETURN
 #undef ATOMIC_OP