Merge tag 'cris-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper...

[cascardo/linux.git] / arch / arm / boot / dts / da850-evm.dts

diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 5fd4c37..41de15f 100644 (file)
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -29,6 +29,20 @@
                                        0x04 0x00011000 0x000ff000
                                >;
                        };
+                       nand_pins: nand_pins {
+                               pinctrl-single,bits = <
+                                       /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
+                                       0x1c 0x10110110  0xf0ff0ff0
+                                       /*
+                                        * EMA_D[0], EMA_D[1], EMA_D[2],
+                                        * EMA_D[3], EMA_D[4], EMA_D[5],
+                                        * EMA_D[6], EMA_D[7]
+                                        */
+                                       0x24 0x11111111  0xffffffff
+                                       /* EMA_A[1], EMA_A[2] */
+                                       0x30 0x01100000  0x0ff00000
+                               >;
+                       };
                };
                serial0: serial@42000 {
                        status = "okay";
@@ -131,11 +145,6 @@
                        status = "okay";
                };
        };
-       nand_cs3@62000000 {
-               status = "okay";
-               pinctrl-names = "default";
-               pinctrl-0 = <&nand_cs3_pins>;
-       };
        vbat: fixedregulator0 {
                compatible = "regulator-fixed";
                regulator-name = "vbat";
@@ -250,3 +259,33 @@
 &edma1 {
        ti,edma-reserved-slot-ranges = <32 90>;
 };
+
+&aemif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&nand_pins>;
+       status = "ok";
+       cs3 {
+               #address-cells = <2>;
+               #size-cells = <1>;
+               clock-ranges;
+               ranges;
+
+               ti,cs-chipselect = <3>;
+
+               nand@2000000,0 {
+                       compatible = "ti,davinci-nand";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0 0x02000000 0x02000000
+                              1 0x00000000 0x00008000>;
+
+                       ti,davinci-chipselect = <1>;
+                       ti,davinci-mask-ale = <0>;
+                       ti,davinci-mask-cle = <0>;
+                       ti,davinci-mask-chipsel = <0>;
+                       ti,davinci-ecc-mode = "hw";
+                       ti,davinci-ecc-bits = <4>;
+                       ti,davinci-nand-use-bbt;
+               };
+       };
+};