Merge tag 'ceph-for-4.9-rc1' of git://github.com/ceph/ceph-client

[cascardo/linux.git] / arch / arm / boot / dts / omap5.dtsi

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index c2ef128..2526211 100644 (file)
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -12,8 +12,8 @@
 #include <dt-bindings/pinctrl/omap.h>
 
 / {
-       #address-cells = <1>;
-       #size-cells = <1>;
+       #address-cells = <2>;
+       #size-cells = <2>;
 
        compatible = "ti,omap5";
        interrupt-parent = <&wakeupgen>;
@@ -90,10 +90,10 @@
                compatible = "arm,cortex-a15-gic";
                interrupt-controller;
                #interrupt-cells = <3>;
-               reg = <0x48211000 0x1000>,
-                     <0x48212000 0x1000>,
-                     <0x48214000 0x2000>,
-                     <0x48216000 0x2000>;
+               reg = <0 0x48211000 0 0x1000>,
+                     <0 0x48212000 0 0x1000>,
+                     <0 0x48214000 0 0x2000>,
+                     <0 0x48216000 0 0x2000>;
                interrupt-parent = <&gic>;
        };
 
@@ -101,7 +101,7 @@
                compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
                interrupt-controller;
                #interrupt-cells = <3>;
-               reg = <0x48281000 0x1000>;
+               reg = <0 0x48281000 0 0x1000>;
                interrupt-parent = <&gic>;
        };
 
@@ -129,11 +129,11 @@
                compatible = "ti,omap5-l3-noc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
-               ranges;
+               ranges = <0 0 0 0xc0000000>;
                ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
-               reg = <0x44000000 0x2000>,
-                     <0x44800000 0x3000>,
-                     <0x45000000 0x4000>;
+               reg = <0 0x44000000 0 0x2000>,
+                     <0 0x44800000 0 0x3000>,
+                     <0 0x45000000 0 0x4000>;
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;