Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[cascardo/linux.git] / arch / arm / boot / dts / rk3288.dtsi

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 91c4b3c..17ec2e2 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -45,6 +45,7 @@
 #include <dt-bindings/clock/rk3288-cru.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/power/rk3288-power.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
 #include "skeleton.dtsi"
 
 / {
@@ -793,6 +794,15 @@
                                clocks = <&cru ACLK_GPU>;
                        };
                };
+
+               reboot-mode {
+                       compatible = "syscon-reboot-mode";
+                       offset = <0x94>;
+                       mode-normal = <BOOT_NORMAL>;
+                       mode-recovery = <BOOT_RECOVERY>;
+                       mode-bootloader = <BOOT_FASTBOOT>;
+                       mode-loader = <BOOT_BL_DOWNLOAD>;
+               };
        };
 
        sgrf: syscon@ff740000 {
@@ -834,6 +844,37 @@
                        compatible = "rockchip,rk3288-io-voltage-domain";
                        status = "disabled";
                };
+
+               usbphy: usbphy {
+                       compatible = "rockchip,rk3288-usb-phy";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       usbphy0: usb-phy@320 {
+                               #phy-cells = <0>;
+                               reg = <0x320>;
+                               clocks = <&cru SCLK_OTGPHY0>;
+                               clock-names = "phyclk";
+                               #clock-cells = <0>;
+                       };
+
+                       usbphy1: usb-phy@334 {
+                               #phy-cells = <0>;
+                               reg = <0x334>;
+                               clocks = <&cru SCLK_OTGPHY1>;
+                               clock-names = "phyclk";
+                               #clock-cells = <0>;
+                       };
+
+                       usbphy2: usb-phy@348 {
+                               #phy-cells = <0>;
+                               reg = <0x348>;
+                               clocks = <&cru SCLK_OTGPHY2>;
+                               clock-names = "phyclk";
+                               #clock-cells = <0>;
+                       };
+               };
        };
 
        wdt: watchdog@ff800000 {
@@ -1087,38 +1128,6 @@
                };
        };
 
-       usbphy: phy {
-               compatible = "rockchip,rk3288-usb-phy";
-               rockchip,grf = <&grf>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-               status = "disabled";
-
-               usbphy0: usb-phy@320 {
-                       #phy-cells = <0>;
-                       reg = <0x320>;
-                       clocks = <&cru SCLK_OTGPHY0>;
-                       clock-names = "phyclk";
-                       #clock-cells = <0>;
-               };
-
-               usbphy1: usb-phy@334 {
-                       #phy-cells = <0>;
-                       reg = <0x334>;
-                       clocks = <&cru SCLK_OTGPHY1>;
-                       clock-names = "phyclk";
-                       #clock-cells = <0>;
-               };
-
-               usbphy2: usb-phy@348 {
-                       #phy-cells = <0>;
-                       reg = <0x348>;
-                       clocks = <&cru SCLK_OTGPHY2>;
-                       clock-names = "phyclk";
-                       #clock-cells = <0>;
-               };
-       };
-
        pinctrl: pinctrl {
                compatible = "rockchip,rk3288-pinctrl";
                rockchip,grf = <&grf>;