Merge tag 'cris-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper...

[cascardo/linux.git] / arch / arm / boot / dts / stih418-clock.dtsi

diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index ae6d997..ee6614b 100644 (file)
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -44,7 +44,7 @@
 
                        clockgen_a9_pll: clockgen-a9-pll {
                                #clock-cells = <1>;
-                               compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32";
+                               compatible = "st,stih418-clkgen-plla9";
 
                                clocks = <&clk_sysin>;
 
@@ -98,7 +98,7 @@
 
                        clk_s_a0_pll: clk-s-a0-pll {
                                #clock-cells = <1>;
-                               compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32";
+                               compatible = "st,clkgen-pll0";
 
                                clocks = <&clk_sysin>;
 
@@ -120,7 +120,7 @@
 
                clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
                        #clock-cells = <1>;
-                       compatible = "st,stih407-quadfs660-C", "st,quadfs";
+                       compatible = "st,quadfs-pll";
                        reg = <0x9103000 0x1000>;
 
                        clocks = <&clk_sysin>;
@@ -137,7 +137,7 @@
 
                        clk_s_c0_pll0: clk-s-c0-pll0 {
                                #clock-cells = <1>;
-                               compatible = "st,plls-c32-cx_0", "st,clkgen-plls-c32";
+                               compatible = "st,clkgen-pll0";
 
                                clocks = <&clk_sysin>;
 
@@ -146,7 +146,7 @@
 
                        clk_s_c0_pll1: clk-s-c0-pll1 {
                                #clock-cells = <1>;
-                               compatible = "st,plls-c32-cx_1", "st,clkgen-plls-c32";
+                               compatible = "st,clkgen-pll1";
 
                                clocks = <&clk_sysin>;
 
@@ -212,7 +212,7 @@
 
                clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
                        #clock-cells = <1>;
-                       compatible = "st,stih407-quadfs660-D", "st,quadfs";
+                       compatible = "st,quadfs";
                        reg = <0x9104000 0x1000>;
 
                        clocks = <&clk_sysin>;
@@ -229,7 +229,7 @@
 
                        clk_s_d0_flexgen: clk-s-d0-flexgen {
                                #clock-cells = <1>;
-                               compatible = "st,flexgen";
+                               compatible = "st,flexgen-audio", "st,flexgen";
 
                                clocks = <&clk_s_d0_quadfs 0>,
                                         <&clk_s_d0_quadfs 1>,
@@ -248,7 +248,7 @@
 
                clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
                        #clock-cells = <1>;
-                       compatible = "st,stih407-quadfs660-D", "st,quadfs";
+                       compatible = "st,quadfs";
                        reg = <0x9106000 0x1000>;
 
                        clocks = <&clk_sysin>;
@@ -271,7 +271,7 @@
 
                        clk_s_d2_flexgen: clk-s-d2-flexgen {
                                #clock-cells = <1>;
-                               compatible = "st,flexgen";
+                               compatible = "st,flexgen-video", "st,flexgen";
 
                                clocks = <&clk_s_d2_quadfs 0>,
                                         <&clk_s_d2_quadfs 1>,
@@ -309,7 +309,7 @@
 
                clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
                        #clock-cells = <1>;
-                       compatible = "st,stih407-quadfs660-D", "st,quadfs";
+                       compatible = "st,quadfs";
                        reg = <0x9107000 0x1000>;
 
                        clocks = <&clk_sysin>;