reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC0>,
<&ccu CLK_MMC0>,
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC0>,
<&ccu CLK_MMC0>,
reg = <0x01c10000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC1>,
<&ccu CLK_MMC1>,
reg = <0x01c10000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC1>,
<&ccu CLK_MMC1>,
reg = <0x01c11000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC2>,
<&ccu CLK_MMC2>,
reg = <0x01c11000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC2>,
<&ccu CLK_MMC2>,
reg = <0x01c12000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC3>,
<&ccu CLK_MMC3>,
reg = <0x01c12000 0x1000>;
clocks = <&ccu CLK_AHB1_MMC3>,
<&ccu CLK_MMC3>,