Merge branch 'work.splice_read' of git://git.kernel.org/pub/scm/linux/kernel/git...

[cascardo/linux.git] / arch / arm / boot / dts / sun8i-a23-a33.dtsi

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 7ea6de1..48fc24f 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -133,7 +133,7 @@
                };
 
                mmc0: mmc@01c0f000 {
-                       compatible = "allwinner,sun5i-a13-mmc";
+                       compatible = "allwinner,sun7i-a20-mmc";
                        reg = <0x01c0f000 0x1000>;
                        clocks = <&ccu CLK_BUS_MMC0>,
                                 <&ccu CLK_MMC0>,
@@ -152,7 +152,7 @@
                };
 
                mmc1: mmc@01c10000 {
-                       compatible = "allwinner,sun5i-a13-mmc";
+                       compatible = "allwinner,sun7i-a20-mmc";
                        reg = <0x01c10000 0x1000>;
                        clocks = <&ccu CLK_BUS_MMC1>,
                                 <&ccu CLK_MMC1>,
@@ -171,7 +171,7 @@
                };
 
                mmc2: mmc@01c11000 {
-                       compatible = "allwinner,sun5i-a13-mmc";
+                       compatible = "allwinner,sun7i-a20-mmc";
                        reg = <0x01c11000 0x1000>;
                        clocks = <&ccu CLK_BUS_MMC2>,
                                 <&ccu CLK_MMC2>,
@@ -202,6 +202,36 @@
                        #size-cells = <0>;
                };
 
+               usb_otg: usb@01c19000 {
+                       /* compatible gets set in SoC specific dtsi file */
+                       reg = <0x01c19000 0x0400>;
+                       clocks = <&ccu CLK_BUS_OTG>;
+                       resets = <&ccu RST_BUS_OTG>;
+                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "mc";
+                       phys = <&usbphy 0>;
+                       phy-names = "usb";
+                       extcon = <&usbphy 0>;
+                       status = "disabled";
+               };
+
+               usbphy: phy@01c19400 {
+                       /*
+                        * compatible and address regions get set in
+                        * SoC specific dtsi file
+                        */
+                       clocks = <&ccu CLK_USB_PHY0>,
+                                <&ccu CLK_USB_PHY1>;
+                       clock-names = "usb0_phy",
+                                     "usb1_phy";
+                       resets = <&ccu RST_USB_PHY0>,
+                                <&ccu RST_USB_PHY1>;
+                       reset-names = "usb0_reset",
+                                     "usb1_reset";
+                       status = "disabled";
+                       #phy-cells = <1>;
+               };
+
                ehci0: usb@01c1a000 {
                        compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
                        reg = <0x01c1a000 0x100>;
@@ -249,6 +279,16 @@
                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
+                       uart1_pins_a: uart1@0 {
+                               allwinner,pins = "PG6", "PG7";
+                               allwinner,function = "uart1";
+                       };
+
+                       uart1_pins_cts_rts_a: uart1-cts-rts@0 {
+                               allwinner,pins = "PG8", "PG9";
+                               allwinner,function = "uart1";
+                       };
+
                        mmc0_pins_a: mmc0@0 {
                                allwinner,pins = "PF0", "PF1", "PF2",
                                                 "PF3", "PF4", "PF5";