ARM: shmobile: INTC External IRQ pin driver on sh73a0

[cascardo/linux.git] / arch / arm / mach-shmobile / intc-sh73a0.c

diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index a81a1d8..19a26f4 100644 (file)
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -260,108 +260,6 @@ static int sh73a0_set_wake(struct irq_data *data, unsigned int on)
        return 0; /* always allow wakeup */
 }
 
-#define RELOC_BASE 0x1200
-
-/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */
-#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)
-
-INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
-                INTCS_VECT_RELOC, "sh73a0-intca-irq-pins");
-
-static int to_gic_irq(struct irq_data *data)
-{
-       unsigned int vect = irq2evt(data->irq) - INTCS_VECT_BASE;
-
-       if (vect >= 0x3200)
-               vect -= 0x3000;
-       else
-               vect -= 0x0200;
-
-       return gic_spi((vect >> 5) + 1);
-}
-
-static int to_intca_reloc_irq(struct irq_data *data)
-{
-       return data->irq + (RELOC_BASE >> 5);
-}
-
-#define irq_cb(cb, irq) irq_get_chip(irq)->cb(irq_get_irq_data(irq))
-#define irq_cbp(cb, irq, p...) irq_get_chip(irq)->cb(irq_get_irq_data(irq), p)
-
-static void intca_gic_enable(struct irq_data *data)
-{
-       irq_cb(irq_unmask, to_intca_reloc_irq(data));
-       irq_cb(irq_unmask, to_gic_irq(data));
-}
-
-static void intca_gic_disable(struct irq_data *data)
-{
-       irq_cb(irq_mask, to_gic_irq(data));
-       irq_cb(irq_mask, to_intca_reloc_irq(data));
-}
-
-static void intca_gic_mask_ack(struct irq_data *data)
-{
-       irq_cb(irq_mask, to_gic_irq(data));
-       irq_cb(irq_mask_ack, to_intca_reloc_irq(data));
-}
-
-static void intca_gic_eoi(struct irq_data *data)
-{
-       irq_cb(irq_eoi, to_gic_irq(data));
-}
-
-static int intca_gic_set_type(struct irq_data *data, unsigned int type)
-{
-       return irq_cbp(irq_set_type, to_intca_reloc_irq(data), type);
-}
-
-#ifdef CONFIG_SMP
-static int intca_gic_set_affinity(struct irq_data *data,
-                                 const struct cpumask *cpumask,
-                                 bool force)
-{
-       return irq_cbp(irq_set_affinity, to_gic_irq(data), cpumask, force);
-}
-#endif
-
-struct irq_chip intca_gic_irq_chip = {
-       .name                   = "INTCA-GIC",
-       .irq_mask               = intca_gic_disable,
-       .irq_unmask             = intca_gic_enable,
-       .irq_mask_ack           = intca_gic_mask_ack,
-       .irq_eoi                = intca_gic_eoi,
-       .irq_enable             = intca_gic_enable,
-       .irq_disable            = intca_gic_disable,
-       .irq_shutdown           = intca_gic_disable,
-       .irq_set_type           = intca_gic_set_type,
-       .irq_set_wake           = sh73a0_set_wake,
-#ifdef CONFIG_SMP
-       .irq_set_affinity       = intca_gic_set_affinity,
-#endif
-};
-
-static int to_intc_vect(int irq)
-{
-       unsigned int irq_pin = irq - gic_spi(1);
-       unsigned int offs;
-
-       if (irq_pin < 16)
-               offs = 0x0200;
-       else
-               offs = 0x3000;
-
-       return offs + (irq_pin << 5);
-}
-
-static irqreturn_t sh73a0_irq_pin_demux(int irq, void *dev_id)
-{
-       generic_handle_irq(intcs_evt2irq(to_intc_vect(irq)));
-       return IRQ_HANDLED;
-}
-
-static struct irqaction sh73a0_irq_pin_cascade[32];
-
 #define PINTER0_PHYS 0xe69000a0
 #define PINTER1_PHYS 0xe69000a4
 #define PINTER0_VIRT IOMEM(0xe69000a0)
@@ -422,13 +320,11 @@ void __init sh73a0_init_irq(void)
        void __iomem *gic_dist_base = IOMEM(0xf0001000);
        void __iomem *gic_cpu_base = IOMEM(0xf0000100);
        void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
-       int k, n;
 
        gic_init(0, 29, gic_dist_base, gic_cpu_base);
        gic_arch_extn.irq_set_wake = sh73a0_set_wake;
 
        register_intc_controller(&intcs_desc);
-       register_intc_controller(&intca_irq_pins_desc);
        register_intc_controller(&intc_pint0_desc);
        register_intc_controller(&intc_pint1_desc);
 
@@ -438,19 +334,6 @@ void __init sh73a0_init_irq(void)
        sh73a0_intcs_cascade.dev_id = intevtsa;
        setup_irq(gic_spi(50), &sh73a0_intcs_cascade);
 
-       /* IRQ pins require special handling through INTCA and GIC */
-       for (k = 0; k < 32; k++) {
-               sh73a0_irq_pin_cascade[k].name = "INTCA-GIC cascade";
-               sh73a0_irq_pin_cascade[k].handler = sh73a0_irq_pin_demux;
-               setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
-
-               n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
-               WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n);
-               irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
-                                             handle_level_irq, "level");
-               set_irq_flags(n, IRQF_VALID); /* yuck */
-       }
-
        /* PINT pins are sanely tied to the GIC as SPI */
        sh73a0_pint0_cascade.name = "PINT0 cascade";
        sh73a0_pint0_cascade.handler = sh73a0_pint0_demux;