Merge branch 'work.splice_read' of git://git.kernel.org/pub/scm/linux/kernel/git...

[cascardo/linux.git] / arch / arm / mm / proc-macros.S

diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index c671f34..0d40c28 100644 (file)
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -7,6 +7,10 @@
 #include <asm/asm-offsets.h>
 #include <asm/thread_info.h>
 
+#ifdef CONFIG_CPU_V7M
+#include <asm/v7m.h>
+#endif
+
 /*
  * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm)
  */
@@ -70,7 +74,13 @@
  * on ARMv7.
  */
        .macro  dcache_line_size, reg, tmp
+#ifdef CONFIG_CPU_V7M
+       movw    \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR
+       movt    \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR
+       ldr     \tmp, [\tmp]
+#else
        mrc     p15, 0, \tmp, c0, c0, 1         @ read ctr
+#endif
        lsr     \tmp, \tmp, #16
        and     \tmp, \tmp, #0xf                @ cache line size encoding
        mov     \reg, #4                        @ bytes per word
@@ -82,7 +92,13 @@
  * on ARMv7.
  */
        .macro  icache_line_size, reg, tmp
+#ifdef CONFIG_CPU_V7M
+       movw    \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR
+       movt    \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR
+       ldr     \tmp, [\tmp]
+#else
        mrc     p15, 0, \tmp, c0, c0, 1         @ read ctr
+#endif
        and     \tmp, \tmp, #0xf                @ cache line size encoding
        mov     \reg, #4                        @ bytes per word
        mov     \reg, \reg, lsl \tmp            @ actual cache line size