arm64: dts: NS2: Add all of the UARTs

[cascardo/linux.git] / arch / arm64 / boot / dts / broadcom / ns2.dtsi

diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 788ed8f..c77a9e8 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -357,6 +357,36 @@
                        status = "disabled";
                };
 
+               uart0: serial@66100000 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x66100000 0x100>;
+                       interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&iprocslow>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       status = "disabled";
+               };
+
+               uart1: serial@66110000 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x66110000 0x100>;
+                       interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&iprocslow>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       status = "disabled";
+               };
+
+               uart2: serial@66120000 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x66120000 0x100>;
+                       interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&iprocslow>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       status = "disabled";
+               };
+
                uart3: serial@66130000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x66130000 0x100>;