Merge tag 'ceph-for-4.9-rc1' of git://github.com/ceph/ceph-client

[cascardo/linux.git] / arch / arm64 / boot / dts / freescale / fsl-ls2080a.dtsi

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index e3b6034..d105976 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -588,6 +588,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
+                       dma-coherent;
                        num-lanes = <4>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -612,6 +613,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
+                       dma-coherent;
                        num-lanes = <4>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -636,6 +638,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
+                       dma-coherent;
                        num-lanes = <8>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -660,6 +663,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
+                       dma-coherent;
                        num-lanes = <4>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -715,4 +719,18 @@
                        interrupts = <0 12 4>;
                };
        };
+
+       ddr1: memory-controller@1080000 {
+               compatible = "fsl,qoriq-memory-controller";
+               reg = <0x0 0x1080000 0x0 0x1000>;
+               interrupts = <0 17 0x4>;
+               little-endian;
+       };
+
+       ddr2: memory-controller@1090000 {
+               compatible = "fsl,qoriq-memory-controller";
+               reg = <0x0 0x1090000 0x0 0x1000>;
+               interrupts = <0 18 0x4>;
+               little-endian;
+       };
 };