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Merge branch 'work.splice_read' of git://git.kernel.org/pub/scm/linux/kernel/git...
[cascardo/linux.git] / arch / arm64 / boot / dts / nvidia / tegra210.dtsi
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index b731880..f673979 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -34,7 +34,28 @@
                        clock-names = "dpaux", "parent";
                        resets = <&tegra_car 207>;
                        reset-names = "dpaux";
+                       power-domains = <&pd_sor>;
                        status = "disabled";
+
+                       state_dpaux1_aux: pinmux-aux {
+                               groups = "dpaux-io";
+                               function = "aux";
+                       };
+
+                       state_dpaux1_i2c: pinmux-i2c {
+                               groups = "dpaux-io";
+                               function = "i2c";
+                       };
+
+                       state_dpaux1_off: pinmux-off {
+                               groups = "dpaux-io";
+                               function = "off";
+                       };
+
+                       i2c-bus {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
                };
 
                vi@54080000 {
@@ -88,6 +109,7 @@
                        clock-names = "dsi", "lp", "parent";
                        resets = <&tegra_car 48>;
                        reset-names = "dsi";
+                       power-domains = <&pd_sor>;
                        nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */
 
                        status = "disabled";
@@ -117,6 +139,7 @@
                        clock-names = "dsi", "lp", "parent";
                        resets = <&tegra_car 82>;
                        reset-names = "dsi";
+                       power-domains = <&pd_sor>;
                        nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */
 
                        status = "disabled";
@@ -154,6 +177,11 @@
                        clock-names = "sor", "parent", "dp", "safe";
                        resets = <&tegra_car 182>;
                        reset-names = "sor";
+                       pinctrl-0 = <&state_dpaux_aux>;
+                       pinctrl-1 = <&state_dpaux_i2c>;
+                       pinctrl-2 = <&state_dpaux_off>;
+                       pinctrl-names = "aux", "i2c", "off";
+                       power-domains = <&pd_sor>;
                        status = "disabled";
                };
 
@@ -162,12 +190,18 @@
                        reg = <0x0 0x54580000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&tegra_car TEGRA210_CLK_SOR1>,
+                                <&tegra_car TEGRA210_CLK_SOR1_SRC>,
                                 <&tegra_car TEGRA210_CLK_PLL_D2_OUT0>,
                                 <&tegra_car TEGRA210_CLK_PLL_DP>,
                                 <&tegra_car TEGRA210_CLK_SOR_SAFE>;
-                       clock-names = "sor", "parent", "dp", "safe";
+                       clock-names = "sor", "source", "parent", "dp", "safe";
                        resets = <&tegra_car 183>;
                        reset-names = "sor";
+                       pinctrl-0 = <&state_dpaux1_aux>;
+                       pinctrl-1 = <&state_dpaux1_i2c>;
+                       pinctrl-2 = <&state_dpaux1_off>;
+                       pinctrl-names = "aux", "i2c", "off";
+                       power-domains = <&pd_sor>;
                        status = "disabled";
                };
 
@@ -180,7 +214,28 @@
                        clock-names = "dpaux", "parent";
                        resets = <&tegra_car 181>;
                        reset-names = "dpaux";
+                       power-domains = <&pd_sor>;
                        status = "disabled";
+
+                       state_dpaux_aux: pinmux-aux {
+                               groups = "dpaux-io";
+                               function = "aux";
+                       };
+
+                       state_dpaux_i2c: pinmux-i2c {
+                               groups = "dpaux-io";
+                               function = "i2c";
+                       };
+
+                       state_dpaux_off: pinmux-off {
+                               groups = "dpaux-io";
+                               function = "off";
+                       };
+
+                       i2c-bus {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
                };
 
                isp@54600000 {
@@ -276,7 +331,7 @@
        };
 
        gpio: gpio@6000d000 {
-               compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
+               compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
                reg = <0x0 0x6000d000 0x0 0x1000>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
@@ -478,6 +533,9 @@
                reset-names = "i2c";
                dmas = <&apbdma 26>, <&apbdma 26>;
                dma-names = "rx", "tx";
+               pinctrl-0 = <&state_dpaux1_i2c>;
+               pinctrl-1 = <&state_dpaux1_off>;
+               pinctrl-names = "default", "idle";
                status = "disabled";
        };
 
@@ -508,6 +566,9 @@
                reset-names = "i2c";
                dmas = <&apbdma 30>, <&apbdma 30>;
                dma-names = "rx", "tx";
+               pinctrl-0 = <&state_dpaux_i2c>;
+               pinctrl-1 = <&state_dpaux_off>;
+               pinctrl-names = "default", "idle";
                status = "disabled";
        };
 
@@ -584,6 +645,53 @@
                reg = <0x0 0x7000e400 0x0 0x400>;
                clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
+
+               powergates {
+                       pd_audio: aud {
+                               clocks = <&tegra_car TEGRA210_CLK_APE>,
+                                        <&tegra_car TEGRA210_CLK_APB2APE>;
+                               resets = <&tegra_car 198>;
+                               #power-domain-cells = <0>;
+                       };
+
+                       pd_sor: sor {
+                               clocks = <&tegra_car TEGRA210_CLK_SOR0>,
+                                        <&tegra_car TEGRA210_CLK_SOR1>,
+                                        <&tegra_car TEGRA210_CLK_CSI>,
+                                        <&tegra_car TEGRA210_CLK_DSIA>,
+                                        <&tegra_car TEGRA210_CLK_DSIB>,
+                                        <&tegra_car TEGRA210_CLK_DPAUX>,
+                                        <&tegra_car TEGRA210_CLK_DPAUX1>,
+                                        <&tegra_car TEGRA210_CLK_MIPI_CAL>;
+                               resets = <&tegra_car TEGRA210_CLK_SOR0>,
+                                        <&tegra_car TEGRA210_CLK_SOR1>,
+                                        <&tegra_car TEGRA210_CLK_CSI>,
+                                        <&tegra_car TEGRA210_CLK_DSIA>,
+                                        <&tegra_car TEGRA210_CLK_DSIB>,
+                                        <&tegra_car TEGRA210_CLK_DPAUX>,
+                                        <&tegra_car TEGRA210_CLK_DPAUX1>,
+                                        <&tegra_car TEGRA210_CLK_MIPI_CAL>;
+                               #power-domain-cells = <0>;
+                       };
+
+                       pd_xusbss: xusba {
+                               clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+                               resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+                               #power-domain-cells = <0>;
+                       };
+
+                       pd_xusbdev: xusbb {
+                               clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
+                               resets = <&tegra_car 95>;
+                               #power-domain-cells = <0>;
+                       };
+
+                       pd_xusbhost: xusbc {
+                               clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+                               resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+                               #power-domain-cells = <0>;
+                       };
+               };
        };
 
        fuse@7000f800 {
@@ -860,9 +968,66 @@
                reg = <0x0 0x700e3000 0x0 0x100>;
                clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>;
                clock-names = "mipi-cal";
+               power-domains = <&pd_sor>;
                #nvidia,mipi-calibrate-cells = <1>;
        };
 
+       aconnect@702c0000 {
+               compatible = "nvidia,tegra210-aconnect";
+               clocks = <&tegra_car TEGRA210_CLK_APE>,
+                        <&tegra_car TEGRA210_CLK_APB2APE>;
+               clock-names = "ape", "apb2ape";
+               power-domains = <&pd_audio>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
+               status = "disabled";
+
+               adma: dma@702e2000 {
+                       compatible = "nvidia,tegra210-adma";
+                       reg = <0x702e2000 0x2000>;
+                       interrupt-parent = <&agic>;
+                       interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
+                       clock-names = "d_audio";
+                       status = "disabled";
+               };
+
+               agic: agic@702f9000 {
+                       compatible = "nvidia,tegra210-agic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x702f9000 0x2000>,
+                             <0x702fa000 0x2000>;
+                       interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                       clocks = <&tegra_car TEGRA210_CLK_APE>;
+                       clock-names = "clk";
+                       status = "disabled";
+               };
+       };
+
        spi@70410000 {
                compatible = "nvidia,tegra210-qspi";
                reg = <0x0 0x70410000 0x0 0x1000>;
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