Merge tag 'cris-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper...

[cascardo/linux.git] / arch / arm64 / boot / dts / qcom / msm8996.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 5536bfc..338f82a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -97,6 +97,92 @@
                };
        };
 
+       thermal-zones {
+               cpu-thermal0 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&tsens0 3>;
+
+                       trips {
+                               cpu_alert0: trip0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               cpu_crit0: trip1 {
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               cpu-thermal1 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&tsens0 5>;
+
+                       trips {
+                               cpu_alert1: trip0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               cpu_crit1: trip1 {
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               cpu-thermal2 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&tsens0 8>;
+
+                       trips {
+                               cpu_alert2: trip0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               cpu_crit2: trip1 {
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               cpu-thermal3 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&tsens0 10>;
+
+                       trips {
+                               cpu_alert3: trip0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               cpu_crit3: trip1 {
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -151,6 +237,42 @@
                        reg = <0x300000 0x90000>;
                };
 
+               blsp1_spi0: spi@07575000 {
+                       compatible = "qcom,spi-qup-v2.2.1";
+                       reg = <0x07575000 0x600>;
+                       interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp1_spi0_default>;
+                       pinctrl-1 = <&blsp1_spi0_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               blsp2_i2c0: i2c@075b5000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       reg = <0x075b5000 0x1000>;
+                       interrupts = <GIC_SPI 101 0>;
+                       clocks = <&gcc GCC_BLSP2_AHB_CLK>,
+                               <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>;
+                       clock-names = "iface", "core";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp2_i2c0_default>;
+                       pinctrl-1 = <&blsp2_i2c0_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               tsens0: thermal-sensor@4a8000 {
+                       compatible = "qcom,msm8996-tsens";
+                       reg = <0x4a8000 0x2000>;
+                       #thermal-sensor-cells = <1>;
+               };
+
                blsp2_uart1: serial@75b0000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0x75b0000 0x1000>;
@@ -161,6 +283,21 @@
                        status = "disabled";
                };
 
+               blsp2_i2c1: i2c@075b6000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       reg = <0x075b6000 0x1000>;
+                       interrupts = <GIC_SPI 102 0>;
+                       clocks = <&gcc GCC_BLSP2_AHB_CLK>,
+                               <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>;
+                       clock-names = "iface", "core";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp2_i2c1_default>;
+                       pinctrl-1 = <&blsp2_i2c1_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                blsp2_uart2: serial@75b1000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0x075b1000 0x1000>;
@@ -186,6 +323,36 @@
                        status = "disabled";
                };
 
+               blsp2_spi5: spi@075ba000{
+                       compatible = "qcom,spi-qup-v2.2.1";
+                       reg = <0x075ba000 0x600>;
+                       interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP2_QUP5_SPI_APPS_CLK>,
+                                <&gcc GCC_BLSP2_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp2_spi5_default>;
+                       pinctrl-1 = <&blsp2_spi5_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               sdhc2: sdhci@74a4900 {
+                        status = "disabled";
+                        compatible = "qcom,sdhci-msm-v4";
+                        reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
+                        reg-names = "hc_mem", "core_mem";
+
+                        interrupts = <0 125 0>, <0 221 0>;
+                        interrupt-names = "hc_irq", "pwr_irq";
+
+                        clock-names = "iface", "core";
+                        clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+                        <&gcc GCC_SDCC2_APPS_CLK>;
+                        bus-width = <4>;
+                };
+
                msmgpio: pinctrl@1010000 {
                        compatible = "qcom,msm8996-pinctrl";
                        reg = <0x01010000 0x300000>;
@@ -264,7 +431,7 @@
                              <0x400a000 0x002100>;
                        reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
                        interrupt-names = "periph_irq";
-                       interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
                        qcom,ee = <0>;
                        qcom,channel = <0>;
                        #address-cells = <2>;