Merge tag 'cris-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper...
[cascardo/linux.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
index b902356..8c15040 100644 (file)
                };
 
                audma0: dma-controller@ec700000 {
-                       compatible = "renesas,rcar-dmac";
+                       compatible = "renesas,dmac-r8a7795",
+                                    "renesas,rcar-dmac";
                        reg = <0 0xec700000 0 0x10000>;
                        interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
                                      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
                };
 
                audma1: dma-controller@ec720000 {
-                       compatible = "renesas,rcar-dmac";
+                       compatible = "renesas,dmac-r8a7795",
+                                    "renesas,rcar-dmac";
                        reg = <0 0xec720000 0 0x10000>;
                        interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
                                      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
                        reg = <0 0xee100000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 314>;
+                       max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        status = "disabled";
                };
                        reg = <0 0xee120000 0 0x2000>;
                        interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 313>;
+                       max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        status = "disabled";
                };
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 312>;
+                       max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-                       cap-mmc-highspeed;
                        status = "disabled";
                };
 
                        reg = <0 0xee160000 0 0x2000>;
                        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 311>;
+                       max-frequency = <200000000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-                       cap-mmc-highspeed;
                        status = "disabled";
                };
 
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        status = "disabled";
                };
+
+               hsusb: usb@e6590000 {
+                       compatible = "renesas,usbhs-r8a7795",
+                                    "renesas,rcar-gen3-usbhs";
+                       reg = <0 0xe6590000 0 0x100>;
+                       interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 704>;
+                       dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+                              <&usb_dmac1 0>, <&usb_dmac1 1>;
+                       dma-names = "ch0", "ch1", "ch2", "ch3";
+                       renesas,buswait = <11>;
+                       phys = <&usb2_phy0>;
+                       phy-names = "usb";
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       status = "disabled";
+               };
+
                pciec0: pcie@fe000000 {
                        compatible = "renesas,pcie-r8a7795";
                        reg = <0 0xfe000000 0 0x80000>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        status = "disabled";
                };
+
+               vspbc: vsp@fe920000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe920000 0 0x8000>;
+                       interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 624>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+
+                       renesas,fcp = <&fcpvb1>;
+               };
+
+               fcpvb1: fcp@fe92f000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfe92f000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 606>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               fcpf0: fcp@fe950000 {
+                       compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+                       reg = <0 0xfe950000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 615>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               fcpf1: fcp@fe951000 {
+                       compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+                       reg = <0 0xfe951000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 614>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               fcpf2: fcp@fe952000 {
+                       compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+                       reg = <0 0xfe952000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 613>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               vspbd: vsp@fe960000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe960000 0 0x8000>;
+                       interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 626>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+
+                       renesas,fcp = <&fcpvb0>;
+               };
+
+               fcpvb0: fcp@fe96f000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfe96f000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 607>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               vspi0: vsp@fe9a0000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe9a0000 0 0x8000>;
+                       interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 631>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+
+                       renesas,fcp = <&fcpvi0>;
+               };
+
+               fcpvi0: fcp@fe9af000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfe9af000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 611>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               vspi1: vsp@fe9b0000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe9b0000 0 0x8000>;
+                       interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 630>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+
+                       renesas,fcp = <&fcpvi1>;
+               };
+
+               fcpvi1: fcp@fe9bf000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfe9bf000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 610>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               vspi2: vsp@fe9c0000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe9c0000 0 0x8000>;
+                       interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 629>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+
+                       renesas,fcp = <&fcpvi2>;
+               };
+
+               fcpvi2: fcp@fe9cf000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfe9cf000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 609>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+               };
+
+               vspd0: vsp@fea20000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea20000 0 0x4000>;
+                       interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 623>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+                       renesas,fcp = <&fcpvd0>;
+               };
+
+               fcpvd0: fcp@fea27000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfea27000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 603>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+               };
+
+               vspd1: vsp@fea28000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea28000 0 0x4000>;
+                       interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 622>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+                       renesas,fcp = <&fcpvd1>;
+               };
+
+               fcpvd1: fcp@fea2f000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfea2f000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 602>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+               };
+
+               vspd2: vsp@fea30000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea30000 0 0x4000>;
+                       interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 621>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+                       renesas,fcp = <&fcpvd2>;
+               };
+
+               fcpvd2: fcp@fea37000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfea37000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 601>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+               };
+
+               vspd3: vsp@fea38000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea38000 0 0x4000>;
+                       interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 620>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+                       renesas,fcp = <&fcpvd3>;
+               };
+
+               fcpvd3: fcp@fea3f000 {
+                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+                       reg = <0 0xfea3f000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 600>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+               };
+
+               fdp1@fe940000 {
+                       compatible = "renesas,fdp1";
+                       reg = <0 0xfe940000 0 0x2400>;
+                       interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 119>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+                       renesas,fcp = <&fcpf0>;
+               };
+
+               fdp1@fe944000 {
+                       compatible = "renesas,fdp1";
+                       reg = <0 0xfe944000 0 0x2400>;
+                       interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 118>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+                       renesas,fcp = <&fcpf1>;
+               };
+
+               fdp1@fe948000 {
+                       compatible = "renesas,fdp1";
+                       reg = <0 0xfe948000 0 0x2400>;
+                       interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 117>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+                       renesas,fcp = <&fcpf2>;
+               };
+
+               du: display@feb00000 {
+                       compatible = "renesas,du-r8a7795";
+                       reg = <0 0xfeb00000 0 0x80000>,
+                             <0 0xfeb90000 0 0x14>;
+                       reg-names = "du", "lvds.0";
+                       interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 724>,
+                                <&cpg CPG_MOD 723>,
+                                <&cpg CPG_MOD 722>,
+                                <&cpg CPG_MOD 721>,
+                                <&cpg CPG_MOD 727>;
+                       clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
+                       status = "disabled";
+
+                       vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       du_out_rgb: endpoint {
+                                       };
+                               };
+                               port@1 {
+                                       reg = <1>;
+                                       du_out_hdmi0: endpoint {
+                                       };
+                               };
+                               port@2 {
+                                       reg = <2>;
+                                       du_out_hdmi1: endpoint {
+                                       };
+                               };
+                               port@3 {
+                                       reg = <3>;
+                                       du_out_lvds0: endpoint {
+                                       };
+                               };
+                       };
+               };
        };
 };