Merge tag 'ceph-for-4.9-rc1' of git://github.com/ceph/ceph-client

[cascardo/linux.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
index 0d7c8ab..8e82497 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
@@ -49,6 +49,13 @@
        compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
                     "google,rk3399evb-rev2";
 
+       clkin_gmac: external-gmac-clock {
+               compatible = "fixed-clock";
+               clock-frequency = <125000000>;
+               clock-output-names = "clkin_gmac";
+               #clock-cells = <0>;
+       };
+
        vdd_center: vdd-center {
                compatible = "pwm-regulator";
                pwms = <&pwm3 0 25000 0>;
@@ -94,12 +101,36 @@
                regulator-always-on;
                regulator-boot-on;
        };
+
+       vcc_phy: vcc-phy-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc_phy";
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
 };
 
 &emmc_phy {
        status = "okay";
 };
 
+&gmac {
+       assigned-clocks = <&cru SCLK_RMII_SRC>;
+       assigned-clock-parents = <&clkin_gmac>;
+       clock_in_out = "input";
+       phy-supply = <&vcc_phy>;
+       phy-mode = "rgmii";
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
+       snps,reset-active-low;
+       snps,reset-delays-us = <0 10000 50000>;
+       tx_delay = <0x28>;
+       rx_delay = <0x11>;
+       status = "okay";
+};
+
 &pwm0 {
        status = "okay";
 };