Merge tag 'cris-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper...

[cascardo/linux.git] / arch / arm64 / boot / dts / rockchip / rk3399.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8494cef..b65c193 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -210,6 +210,26 @@
                };
        };
 
+       gmac: ethernet@fe300000 {
+               compatible = "rockchip,rk3399-gmac";
+               reg = <0x0 0xfe300000 0x0 0x10000>;
+               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "macirq";
+               clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
+                        <&cru SCLK_MAC_TX>, <&cru SCLK_MACREF>,
+                        <&cru SCLK_MACREF_OUT>, <&cru ACLK_GMAC>,
+                        <&cru PCLK_GMAC>;
+               clock-names = "stmmaceth", "mac_clk_rx",
+                             "mac_clk_tx", "clk_mac_ref",
+                             "clk_mac_refout", "aclk_mac",
+                             "pclk_mac";
+               power-domains = <&power RK3399_PD_GMAC>;
+               resets = <&cru SRST_A_GMAC>;
+               reset-names = "stmmaceth";
+               rockchip,grf = <&grf>;
+               status = "disabled";
+       };
+
        sdio0: dwmmc@fe310000 {
                compatible = "rockchip,rk3399-dw-mshc",
                             "rockchip,rk3288-dw-mshc";
@@ -1120,6 +1140,62 @@
                };
        };
 
+       tcphy0: phy@ff7c0000 {
+               compatible = "rockchip,rk3399-typec-phy";
+               reg = <0x0 0xff7c0000 0x0 0x40000>;
+               clocks = <&cru SCLK_UPHY0_TCPDCORE>,
+                        <&cru SCLK_UPHY0_TCPDPHY_REF>;
+               clock-names = "tcpdcore", "tcpdphy-ref";
+               assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
+               assigned-clock-rates = <50000000>;
+               resets = <&cru SRST_UPHY0>,
+                        <&cru SRST_UPHY0_PIPE_L00>,
+                        <&cru SRST_P_UPHY0_TCPHY>;
+               reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+               rockchip,grf = <&grf>;
+               rockchip,typec-conn-dir = <0xe580 0 16>;
+               rockchip,usb3tousb2-en = <0xe580 3 19>;
+               rockchip,external-psm = <0xe588 14 30>;
+               rockchip,pipe-status = <0xe5c0 0 0>;
+               status = "disabled";
+
+               tcphy0_dp: dp-port {
+                       #phy-cells = <0>;
+               };
+
+               tcphy0_usb3: usb3-port {
+                       #phy-cells = <0>;
+               };
+       };
+
+       tcphy1: phy@ff800000 {
+               compatible = "rockchip,rk3399-typec-phy";
+               reg = <0x0 0xff800000 0x0 0x40000>;
+               clocks = <&cru SCLK_UPHY1_TCPDCORE>,
+                        <&cru SCLK_UPHY1_TCPDPHY_REF>;
+               clock-names = "tcpdcore", "tcpdphy-ref";
+               assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
+               assigned-clock-rates = <50000000>;
+               resets = <&cru SRST_UPHY1>,
+                        <&cru SRST_UPHY1_PIPE_L00>,
+                        <&cru SRST_P_UPHY1_TCPHY>;
+               reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+               rockchip,grf = <&grf>;
+               rockchip,typec-conn-dir = <0xe58c 0 16>;
+               rockchip,usb3tousb2-en = <0xe58c 3 19>;
+               rockchip,external-psm = <0xe594 14 30>;
+               rockchip,pipe-status = <0xe5c0 16 16>;
+               status = "disabled";
+
+               tcphy1_dp: dp-port {
+                       #phy-cells = <0>;
+               };
+
+               tcphy1_usb3: usb3-port {
+                       #phy-cells = <0>;
+               };
+       };
+
        watchdog@ff848000 {
                compatible = "snps,dw-wdt";
                reg = <0x0 0xff848000 0x0 0x100>;
@@ -1307,6 +1383,66 @@
                        };
                };
 
+               gmac {
+                       rgmii_pins: rgmii-pins {
+                               rockchip,pins =
+                                       /* mac_txclk */
+                                       <3 17 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_rxclk */
+                                       <3 14 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_mdio */
+                                       <3 13 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txen */
+                                       <3 12 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_clk */
+                                       <3 11 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxdv */
+                                       <3 9 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_mdc */
+                                       <3 8 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd1 */
+                                       <3 7 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd0 */
+                                       <3 6 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txd1 */
+                                       <3 5 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_txd0 */
+                                       <3 4 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_rxd3 */
+                                       <3 3 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd2 */
+                                       <3 2 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txd3 */
+                                       <3 1 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_txd2 */
+                                       <3 0 RK_FUNC_1 &pcfg_pull_none_13ma>;
+                       };
+
+                       rmii_pins: rmii-pins {
+                               rockchip,pins =
+                                       /* mac_mdio */
+                                       <3 13 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txen */
+                                       <3 12 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_clk */
+                                       <3 11 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxer */
+                                       <3 10 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxdv */
+                                       <3 9 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_mdc */
+                                       <3 8 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd1 */
+                                       <3 7 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_rxd0 */
+                                       <3 6 RK_FUNC_1 &pcfg_pull_none>,
+                                       /* mac_txd1 */
+                                       <3 5 RK_FUNC_1 &pcfg_pull_none_13ma>,
+                                       /* mac_txd0 */
+                                       <3 4 RK_FUNC_1 &pcfg_pull_none_13ma>;
+                       };
+               };
+
                i2c0 {
                        i2c0_xfer: i2c0-xfer {
                                rockchip,pins =