Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

[cascardo/linux.git] / arch / mips / kernel / traps.c

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b7b50d5..3de85be 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -619,17 +619,17 @@ static int simulate_rdhwr(struct pt_regs *regs, int rd, int rt)
        perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
                        1, regs, 0);
        switch (rd) {
-       case 0:         /* CPU number */
+       case MIPS_HWR_CPUNUM:           /* CPU number */
                regs->regs[rt] = smp_processor_id();
                return 0;
-       case 1:         /* SYNCI length */
+       case MIPS_HWR_SYNCISTEP:        /* SYNCI length */
                regs->regs[rt] = min(current_cpu_data.dcache.linesz,
                                     current_cpu_data.icache.linesz);
                return 0;
-       case 2:         /* Read count register */
+       case MIPS_HWR_CC:               /* Read count register */
                regs->regs[rt] = read_c0_count();
                return 0;
-       case 3:         /* Count register resolution */
+       case MIPS_HWR_CCRES:            /* Count register resolution */
                switch (current_cpu_type()) {
                case CPU_20KC:
                case CPU_25KF:
@@ -639,7 +639,7 @@ static int simulate_rdhwr(struct pt_regs *regs, int rd, int rt)
                        regs->regs[rt] = 2;
                }
                return 0;
-       case 29:
+       case MIPS_HWR_ULR:              /* Read UserLocal register */
                regs->regs[rt] = ti->tp_value;
                return 0;
        default:
@@ -1861,6 +1861,7 @@ void __noreturn nmi_exception_handler(struct pt_regs *regs)
 #define VECTORSPACING 0x100    /* for EI/VI mode */
 
 unsigned long ebase;
+EXPORT_SYMBOL_GPL(ebase);
 unsigned long exception_handlers[32];
 unsigned long vi_handlers[64];
 
@@ -2065,16 +2066,22 @@ static void configure_status(void)
                         status_set);
 }
 
+unsigned int hwrena;
+EXPORT_SYMBOL_GPL(hwrena);
+
 /* configure HWRENA register */
 static void configure_hwrena(void)
 {
-       unsigned int hwrena = cpu_hwrena_impl_bits;
+       hwrena = cpu_hwrena_impl_bits;
 
        if (cpu_has_mips_r2_r6)
-               hwrena |= 0x0000000f;
+               hwrena |= MIPS_HWRENA_CPUNUM |
+                         MIPS_HWRENA_SYNCISTEP |
+                         MIPS_HWRENA_CC |
+                         MIPS_HWRENA_CCRES;
 
        if (!noulri && cpu_has_userlocal)
-               hwrena |= (1 << 29);
+               hwrena |= MIPS_HWRENA_ULR;
 
        if (hwrena)
                write_c0_hwrena(hwrena);