treewide: remove redundant #include <linux/kconfig.h>

[cascardo/linux.git] / arch / mips / math-emu / cp1emu.c

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index d96e912..f8b7bf8 100644 (file)
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -35,7 +35,6 @@
  */
 #include <linux/sched.h>
 #include <linux/debugfs.h>
-#include <linux/kconfig.h>
 #include <linux/percpu-defs.h>
 #include <linux/perf_event.h>
 
@@ -434,8 +433,8 @@ static int microMIPS32_to_MIPS32(union mips_instruction *insn_ptr)
  * a single subroutine should be used across both
  * modules.
  */
-static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
-                        unsigned long *contpc)
+int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
+                 unsigned long *contpc)
 {
        union mips_instruction insn = (union mips_instruction)dec_insn.insn;
        unsigned int fcr31;
@@ -627,8 +626,8 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                                dec_insn.pc_inc +
                                dec_insn.next_pc_inc;
                return 1;
-       case cbcond0_op:
-       case cbcond1_op:
+       case pop10_op:
+       case pop30_op:
                if (!cpu_has_mips_r6)
                        break;
                if (insn.i_format.rt && !insn.i_format.rs)
@@ -683,14 +682,14 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                        dec_insn.next_pc_inc;
 
                return 1;
-       case beqzcjic_op:
+       case pop66_op:
                if (!cpu_has_mips_r6)
                        break;
                *contpc = regs->cp0_epc + dec_insn.pc_inc +
                        dec_insn.next_pc_inc;
 
                return 1;
-       case bnezcjialc_op:
+       case pop76_op:
                if (!cpu_has_mips_r6)
                        break;
                if (!insn.i_format.rs)
@@ -784,10 +783,10 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
  */
 static inline int cop1_64bit(struct pt_regs *xcp)
 {
-       if (config_enabled(CONFIG_64BIT) && !config_enabled(CONFIG_MIPS32_O32))
+       if (IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_MIPS32_O32))
                return 1;
-       else if (config_enabled(CONFIG_32BIT) &&
-                !config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
+       else if (IS_ENABLED(CONFIG_32BIT) &&
+                !IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
                return 0;
 
        return !test_thread_flag(TIF_32BIT_FPREGS);
@@ -1268,7 +1267,7 @@ branch_common:
                                                 * instruction in the dslot.
                                                 */
                                                sig = mips_dsemul(xcp, ir,
-                                                                 contpc);
+                                                                 bcpc, contpc);
                                                if (sig < 0)
                                                        break;
                                                if (sig)
@@ -1323,7 +1322,7 @@ branch_common:
                                 * Single step the non-cp1
                                 * instruction in the dslot
                                 */
-                               sig = mips_dsemul(xcp, ir, contpc);
+                               sig = mips_dsemul(xcp, ir, bcpc, contpc);
                                if (sig < 0)
                                        break;
                                if (sig)