arch: Add lightweight memory barriers dma_rmb() and dma_wmb()
[cascardo/linux.git] / arch / powerpc / include / asm / barrier.h
index cb6d66c..a3bf5be 100644 (file)
@@ -36,8 +36,6 @@
 
 #define set_mb(var, value)     do { var = value; mb(); } while (0)
 
-#ifdef CONFIG_SMP
-
 #ifdef __SUBARCH_HAS_LWSYNC
 #    define SMPWMB      LWSYNC
 #else
 #endif
 
 #define __lwsync()     __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
+#define dma_rmb()      __lwsync()
+#define dma_wmb()      __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
+
+#ifdef CONFIG_SMP
+#define smp_lwsync()   __lwsync()
 
 #define smp_mb()       mb()
 #define smp_rmb()      __lwsync()
 #define smp_wmb()      __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
 #else
-#define __lwsync()     barrier()
+#define smp_lwsync()   barrier()
 
 #define smp_mb()       barrier()
 #define smp_rmb()      barrier()
@@ -72,7 +75,7 @@
 #define smp_store_release(p, v)                                                \
 do {                                                                   \
        compiletime_assert_atomic_type(*p);                             \
-       __lwsync();                                                     \
+       smp_lwsync();                                                   \
        ACCESS_ONCE(*p) = (v);                                          \
 } while (0)
 
@@ -80,7 +83,7 @@ do {                                                                  \
 ({                                                                     \
        typeof(*p) ___p1 = ACCESS_ONCE(*p);                             \
        compiletime_assert_atomic_type(*p);                             \
-       __lwsync();                                                     \
+       smp_lwsync();                                                   \
        ___p1;                                                          \
 })