Merge branch 'clocksource/physical-timers' into next/dt

[cascardo/linux.git] / drivers / clocksource / arm_arch_timer.c

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 43005d4..6a79fc4 100644 (file)
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -462,7 +462,10 @@ static void __init arch_counter_register(unsigned type)
 
        /* Register the CP15 based counter if we have one */
        if (type & ARCH_CP15_TIMER) {
-               arch_timer_read_counter = arch_counter_get_cntvct;
+               if (arch_timer_use_virtual)
+                       arch_timer_read_counter = arch_counter_get_cntvct;
+               else
+                       arch_timer_read_counter = arch_counter_get_cntpct;
        } else {
                arch_timer_read_counter = arch_counter_get_cntvct_mem;
 
@@ -701,6 +704,14 @@ static void __init arch_timer_init(struct device_node *np)
                arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
        arch_timer_detect_rate(NULL, np);
 
+       /*
+        * If we cannot rely on firmware initializing the timer registers then
+        * we should use the physical timers instead.
+        */
+       if (IS_ENABLED(CONFIG_ARM) &&
+           of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
+                       arch_timer_use_virtual = false;
+
        /*
         * If HYP mode is available, we know that the physical timer
         * has been configured to be accessible from PL1. Use it, so