qed: Add support for RoCE hw init
[cascardo/linux.git] / drivers / net / ethernet / qlogic / qed / qed_reg_addr.h
index 759cb04..b414a05 100644 (file)
        0x50196cUL
 #define NIG_REG_LLH_CLS_TYPE_DUALMODE \
        0x501964UL
+#define NIG_REG_LLH_FUNC_FILTER_VALUE \
+       0x501a00UL
+#define NIG_REG_LLH_FUNC_FILTER_VALUE_SIZE \
+       32
+#define NIG_REG_LLH_FUNC_FILTER_EN \
+       0x501a80UL
+#define NIG_REG_LLH_FUNC_FILTER_EN_SIZE        \
+       16
+#define NIG_REG_LLH_FUNC_FILTER_MODE \
+       0x501ac0UL
+#define NIG_REG_LLH_FUNC_FILTER_MODE_SIZE \
+       16
+#define NIG_REG_LLH_FUNC_FILTER_PROTOCOL_TYPE \
+       0x501b00UL
+#define NIG_REG_LLH_FUNC_FILTER_PROTOCOL_TYPE_SIZE \
+       16
+#define NIG_REG_LLH_FUNC_FILTER_HDR_SEL        \
+       0x501b40UL
+#define NIG_REG_LLH_FUNC_FILTER_HDR_SEL_SIZE \
+       16
 #define  NCSI_REG_CONFIG       \
        0x040200UL
 #define  PBF_REG_INIT \
        0x1f0a1cUL
 #define PRS_REG_ROCE_DEST_QP_MAX_PF \
        0x1f0430UL
+#define PRS_REG_USE_LIGHT_L2 \
+       0x1f096cUL
 #define  PSDM_REG_ENABLE_IN1 \
        0xfa0004UL
 #define  PSEM_REG_ENABLE_IN \
        0x620000UL
 #define PHY_PCIE_REG_PHY1 \
        0x624000UL
-
+#define NIG_REG_ROCE_DUPLICATE_TO_HOST 0x5088f0UL
+#define PRS_REG_LIGHT_L2_ETHERTYPE_EN 0x1f0968UL
+#define NIG_REG_LLH_ENG_CLS_ENG_ID_TBL 0x501b90UL
+#define DORQ_REG_PF_DPM_ENABLE 0x100510UL
+#define DORQ_REG_PF_ICID_BIT_SHIFT_NORM        0x100448UL
+#define DORQ_REG_PF_MIN_ADDR_REG1 0x100400UL
+#define DORQ_REG_PF_DPI_BIT_SHIFT 0x100450UL
 #endif