X-Git-Url: http://git.cascardo.info/?p=cascardo%2Flinux.git;a=blobdiff_plain;f=Documentation%2Fdevicetree%2Fbindings%2Fserial%2Fcdns%2Cuart.txt;fp=Documentation%2Fdevicetree%2Fbindings%2Fserial%2Fcdns%2Cuart.txt;h=227bb770b0276af8cb716bd89d88e8c055c168f8;hp=a3eb154c32caf9f273c8801811565722a3201e38;hb=37cc6bb8f28aee667835a97b4d00e6a20e0e4b62;hpb=9af6f26a1a7f152f7736c0c20247eef0ab3df190

diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt b/Documentation/devicetree/bindings/serial/cdns,uart.txt
index a3eb154c32ca..227bb770b027 100644
--- a/Documentation/devicetree/bindings/serial/cdns,uart.txt
+++ b/Documentation/devicetree/bindings/serial/cdns,uart.txt
@@ -1,7 +1,9 @@
 Binding for Cadence UART Controller
 
 Required properties:
-- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps"
+- compatible :
+  Use "xlnx,xuartps","cdns,uart-r1p8" for Zynq-7xxx SoC.
+  Use "xlnx,zynqmp-uart","cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC.
 - reg: Should contain UART controller registers location and length.
 - interrupts: Should contain UART controller interrupts.
 - clocks: Must contain phandles to the UART clocks