memory: omap-gpmc: Implement IRQ domain for NAND IRQs
authorRoger Quadros <rogerq@ti.com>
Thu, 30 Jul 2015 11:49:23 +0000 (14:49 +0300)
committerRoger Quadros <rogerq@ti.com>
Fri, 15 Apr 2016 08:52:28 +0000 (11:52 +0300)
commit384258f252727c67772bbd48dad3185a30ba50d3
treedd753eb5c2977384b4885878394f4bc0946d95f1
parent512d73d1c64f15da9cdcdcdfba3cd8db0d4d94cc
memory: omap-gpmc: Implement IRQ domain for NAND IRQs

GPMC provides 2 interrupts for NAND use. i.e. fifoevent and termcount.
Use IRQ domain for this. NAND device tree node can then
get the necessary interrupts by using gpmc as the interrupt parent.

Legacy boot uses gpmc_get_client_irq to get the
NAND interrupts from the GPMC IRQ domain.
Get rid of custom bitmasks and use IRQ domain for that
as well.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Documentation/devicetree/bindings/bus/ti-gpmc.txt
drivers/memory/omap-gpmc.c
include/linux/omap-gpmc.h