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(parent: 8fd763c) | patch
ARM: dts: r8a7792: add PLL1 divided by 2 clock
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Mon, 11 Jul 2016 21:51:58 +0000 (00:51 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Fri, 15 Jul 2016 04:20:39 +0000 (13:20 +0900)
commit4b9b7b3a2c91e1ebf8be9c7efd4839b91d66e87e
treebf9472a2ceab27ae04308e0008bf5bc8391ed9actree | snapshot
parent8fd763c75c3ab8e72e5d7f0d4c53531e6ff76197commit | diff
ARM: dts: r8a7792: add PLL1 divided by 2 clock

Despite the fact that QSPI clock has PLL1/VCOx1/4 clock as a parent, the
latter hasn't been added to the R8A7792 device tree. This patch corrects
that oversight.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7792.dtsi diff | blob | history
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