arm64: kernel: enforce pmuserenr_el0 initialization and restore
authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 18 Dec 2015 10:35:54 +0000 (10:35 +0000)
committerWill Deacon <will.deacon@arm.com>
Mon, 21 Dec 2015 14:43:04 +0000 (14:43 +0000)
commit60792ad349f3c6dc5735aafefe5dc9121c79e320
tree65f4937dff275596f5a9b4aa874b06efbab0e304
parentaae881ad73460e1b2aea01f079a0541bd5a9136c
arm64: kernel: enforce pmuserenr_el0 initialization and restore

The pmuserenr_el0 register value is architecturally UNKNOWN on reset.
Current kernel code resets that register value iff the core pmu device is
correctly probed in the kernel. On platforms with missing DT pmu nodes (or
disabled perf events in the kernel), the pmu is not probed, therefore the
pmuserenr_el0 register is not reset in the kernel, which means that its
value retains the reset value that is architecturally UNKNOWN (system
may run with eg pmuserenr_el0 == 0x1, which means that PMU counters access
is available at EL0, which must be disallowed).

This patch adds code that resets pmuserenr_el0 on cold boot and restores
it on core resume from shutdown, so that the pmuserenr_el0 setup is
always enforced in the kernel.

Cc: <stable@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/kernel/perf_event.c
arch/arm64/mm/proc.S