clk: keystone: Add gate control clock driver
authorSantosh Shilimkar <santosh.shilimkar@ti.com>
Thu, 26 Sep 2013 01:18:14 +0000 (21:18 -0400)
committerMike Turquette <mturquette@linaro.org>
Tue, 8 Oct 2013 01:16:30 +0000 (18:16 -0700)
commit7affe5685c962ed0bc0fadf307400484b2276c89
tree91022e1e58ea9c7593146e6d053a7ab0cd434303
parentb9e0d40c0d83805bc6feb86d602e73f2cdcb17f9
clk: keystone: Add gate control clock driver

Add the driver for the clock gate control which uses PSC (Power Sleep
Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and
disabling of the clocks for different IPs present in the SoC.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Documentation/devicetree/bindings/clock/keystone-gate.txt [new file with mode: 0644]
drivers/clk/keystone/gate.c [new file with mode: 0644]