powerpc/mm: Use read barrier when creating real_pte
authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Wed, 13 Aug 2014 07:02:03 +0000 (12:32 +0530)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 13 Aug 2014 08:20:41 +0000 (18:20 +1000)
commit85c1fafd7262e68ad821ee1808686b1392b1167d
tree9b454eb7a172d0b583f7132527fd3d5098f2defa
parent7e467245bf5226db34c4b12d3cbacfa2f7a15a8b
powerpc/mm: Use read barrier when creating real_pte

On ppc64 we support 4K hash pte with 64K page size. That requires
us to track the hash pte slot information on a per 4k basis. We do that
by storing the slot details in the second half of pte page. The pte bit
_PAGE_COMBO is used to indicate whether the second half need to be
looked while building real_pte. We need to use read memory barrier while
doing that so that load of hidx is not reordered w.r.t _PAGE_COMBO
check. On the store side we already do a lwsync in __hash_page_4K

CC: <stable@vger.kernel.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
arch/powerpc/include/asm/pte-hash64-64k.h