drm/i915: update last_vblank when disabling the power well
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Tue, 23 Jul 2013 13:48:11 +0000 (10:48 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 7 Aug 2013 09:57:06 +0000 (11:57 +0200)
commit9dbd8febb4dbc9199fcf340b882eb930e36b65b6
treeb95b5ad9f02fcb49a252c2719301a42a560e9d15
parent0ce99f749b3834edeb500e17d6ad17e86b60ff83
drm/i915: update last_vblank when disabling the power well

The DRM layer keeps track of our vblanks and it assumes our vblank
counters only go back to zero when they overflow. The problem is that
when we disable the power well our counters also go to zero, but it
doesn't mean they did overflow. So on this patch we grab the lock and
update last_vblank so the DRM layer won't think our counters
overflowed.

This patch fixes the following intel-gpu-tools test:
./kms_flip --run-subtest blocking-absolute-wf_vblank

Regression introduced by the following commit:

commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Wed Jul 3 17:12:13 2013 -0300
    drm/i915: switch disable_power_well default value to 1

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66808
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Added a comment that this might be better done in
drm_vblank_post_modeset in general.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c